1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Xilinx gpio driver for xps/axi_gpio IP.
4 *
5 * Copyright 2008 - 2013 Xilinx, Inc.
6 */
7
8#include <linux/bitops.h>
9#include <linux/init.h>
10#include <linux/errno.h>
11#include <linux/module.h>
12#include <linux/of_device.h>
13#include <linux/of_platform.h>
14#include <linux/io.h>
15#include <linux/gpio/driver.h>
16#include <linux/slab.h>
17
18/* Register Offset Definitions */
19#define XGPIO_DATA_OFFSET   (0x0)	/* Data register  */
20#define XGPIO_TRI_OFFSET    (0x4)	/* I/O direction register  */
21
22#define XGPIO_CHANNEL_OFFSET	0x8
23
24/* Read/Write access to the GPIO registers */
25#if defined(CONFIG_ARCH_ZYNQ) || defined(CONFIG_X86)
26# define xgpio_readreg(offset)		readl(offset)
27# define xgpio_writereg(offset, val)	writel(val, offset)
28#else
29# define xgpio_readreg(offset)		__raw_readl(offset)
30# define xgpio_writereg(offset, val)	__raw_writel(val, offset)
31#endif
32
33/**
34 * struct xgpio_instance - Stores information about GPIO device
35 * @gc: GPIO chip
36 * @regs: register block
37 * @gpio_width: GPIO width for every channel
38 * @gpio_state: GPIO state shadow register
39 * @gpio_dir: GPIO direction shadow register
40 * @gpio_lock: Lock used for synchronization
41 */
42struct xgpio_instance {
43	struct gpio_chip gc;
44	void __iomem *regs;
45	unsigned int gpio_width[2];
46	u32 gpio_state[2];
47	u32 gpio_dir[2];
48	spinlock_t gpio_lock[2];
49};
50
51static inline int xgpio_index(struct xgpio_instance *chip, int gpio)
52{
53	if (gpio >= chip->gpio_width[0])
54		return 1;
55
56	return 0;
57}
58
59static inline int xgpio_regoffset(struct xgpio_instance *chip, int gpio)
60{
61	if (xgpio_index(chip, gpio))
62		return XGPIO_CHANNEL_OFFSET;
63
64	return 0;
65}
66
67static inline int xgpio_offset(struct xgpio_instance *chip, int gpio)
68{
69	if (xgpio_index(chip, gpio))
70		return gpio - chip->gpio_width[0];
71
72	return gpio;
73}
74
75/**
76 * xgpio_get - Read the specified signal of the GPIO device.
77 * @gc:     Pointer to gpio_chip device structure.
78 * @gpio:   GPIO signal number.
79 *
80 * This function reads the specified signal of the GPIO device.
81 *
82 * Return:
83 * 0 if direction of GPIO signals is set as input otherwise it
84 * returns negative error value.
85 */
86static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
87{
88	struct xgpio_instance *chip = gpiochip_get_data(gc);
89	u32 val;
90
91	val = xgpio_readreg(chip->regs + XGPIO_DATA_OFFSET +
92			    xgpio_regoffset(chip, gpio));
93
94	return !!(val & BIT(xgpio_offset(chip, gpio)));
95}
96
97/**
98 * xgpio_set - Write the specified signal of the GPIO device.
99 * @gc:     Pointer to gpio_chip device structure.
100 * @gpio:   GPIO signal number.
101 * @val:    Value to be written to specified signal.
102 *
103 * This function writes the specified value in to the specified signal of the
104 * GPIO device.
105 */
106static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
107{
108	unsigned long flags;
109	struct xgpio_instance *chip = gpiochip_get_data(gc);
110	int index =  xgpio_index(chip, gpio);
111	int offset =  xgpio_offset(chip, gpio);
112
113	spin_lock_irqsave(&chip->gpio_lock[index], flags);
114
115	/* Write to GPIO signal and set its direction to output */
116	if (val)
117		chip->gpio_state[index] |= BIT(offset);
118	else
119		chip->gpio_state[index] &= ~BIT(offset);
120
121	xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
122		       xgpio_regoffset(chip, gpio), chip->gpio_state[index]);
123
124	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
125}
126
127/**
128 * xgpio_set_multiple - Write the specified signals of the GPIO device.
129 * @gc:     Pointer to gpio_chip device structure.
130 * @mask:   Mask of the GPIOS to modify.
131 * @bits:   Value to be wrote on each GPIO
132 *
133 * This function writes the specified values into the specified signals of the
134 * GPIO devices.
135 */
136static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
137			       unsigned long *bits)
138{
139	unsigned long flags;
140	struct xgpio_instance *chip = gpiochip_get_data(gc);
141	int index = xgpio_index(chip, 0);
142	int offset, i;
143
144	spin_lock_irqsave(&chip->gpio_lock[index], flags);
145
146	/* Write to GPIO signals */
147	for (i = 0; i < gc->ngpio; i++) {
148		if (*mask == 0)
149			break;
150		/* Once finished with an index write it out to the register */
151		if (index !=  xgpio_index(chip, i)) {
152			xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
153				       index * XGPIO_CHANNEL_OFFSET,
154				       chip->gpio_state[index]);
155			spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
156			index =  xgpio_index(chip, i);
157			spin_lock_irqsave(&chip->gpio_lock[index], flags);
158		}
159		if (__test_and_clear_bit(i, mask)) {
160			offset =  xgpio_offset(chip, i);
161			if (test_bit(i, bits))
162				chip->gpio_state[index] |= BIT(offset);
163			else
164				chip->gpio_state[index] &= ~BIT(offset);
165		}
166	}
167
168	xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
169		       index * XGPIO_CHANNEL_OFFSET, chip->gpio_state[index]);
170
171	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
172}
173
174/**
175 * xgpio_dir_in - Set the direction of the specified GPIO signal as input.
176 * @gc:     Pointer to gpio_chip device structure.
177 * @gpio:   GPIO signal number.
178 *
179 * Return:
180 * 0 - if direction of GPIO signals is set as input
181 * otherwise it returns negative error value.
182 */
183static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
184{
185	unsigned long flags;
186	struct xgpio_instance *chip = gpiochip_get_data(gc);
187	int index =  xgpio_index(chip, gpio);
188	int offset =  xgpio_offset(chip, gpio);
189
190	spin_lock_irqsave(&chip->gpio_lock[index], flags);
191
192	/* Set the GPIO bit in shadow register and set direction as input */
193	chip->gpio_dir[index] |= BIT(offset);
194	xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET +
195		       xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
196
197	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
198
199	return 0;
200}
201
202/**
203 * xgpio_dir_out - Set the direction of the specified GPIO signal as output.
204 * @gc:     Pointer to gpio_chip device structure.
205 * @gpio:   GPIO signal number.
206 * @val:    Value to be written to specified signal.
207 *
208 * This function sets the direction of specified GPIO signal as output.
209 *
210 * Return:
211 * If all GPIO signals of GPIO chip is configured as input then it returns
212 * error otherwise it returns 0.
213 */
214static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
215{
216	unsigned long flags;
217	struct xgpio_instance *chip = gpiochip_get_data(gc);
218	int index =  xgpio_index(chip, gpio);
219	int offset =  xgpio_offset(chip, gpio);
220
221	spin_lock_irqsave(&chip->gpio_lock[index], flags);
222
223	/* Write state of GPIO signal */
224	if (val)
225		chip->gpio_state[index] |= BIT(offset);
226	else
227		chip->gpio_state[index] &= ~BIT(offset);
228	xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
229			xgpio_regoffset(chip, gpio), chip->gpio_state[index]);
230
231	/* Clear the GPIO bit in shadow register and set direction as output */
232	chip->gpio_dir[index] &= ~BIT(offset);
233	xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET +
234			xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
235
236	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
237
238	return 0;
239}
240
241/**
242 * xgpio_save_regs - Set initial values of GPIO pins
243 * @chip: Pointer to GPIO instance
244 */
245static void xgpio_save_regs(struct xgpio_instance *chip)
246{
247	xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET,	chip->gpio_state[0]);
248	xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET, chip->gpio_dir[0]);
249
250	if (!chip->gpio_width[1])
251		return;
252
253	xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + XGPIO_CHANNEL_OFFSET,
254		       chip->gpio_state[1]);
255	xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET + XGPIO_CHANNEL_OFFSET,
256		       chip->gpio_dir[1]);
257}
258
259/**
260 * xgpio_of_probe - Probe method for the GPIO device.
261 * @pdev: pointer to the platform device
262 *
263 * Return:
264 * It returns 0, if the driver is bound to the GPIO device, or
265 * a negative value if there is an error.
266 */
267static int xgpio_probe(struct platform_device *pdev)
268{
269	struct xgpio_instance *chip;
270	int status = 0;
271	struct device_node *np = pdev->dev.of_node;
272	u32 is_dual;
273
274	chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
275	if (!chip)
276		return -ENOMEM;
277
278	platform_set_drvdata(pdev, chip);
279
280	/* Update GPIO state shadow register with default value */
281	of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state[0]);
282
283	/* Update GPIO direction shadow register with default value */
284	if (of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir[0]))
285		chip->gpio_dir[0] = 0xFFFFFFFF;
286
287	/*
288	 * Check device node and parent device node for device width
289	 * and assume default width of 32
290	 */
291	if (of_property_read_u32(np, "xlnx,gpio-width", &chip->gpio_width[0]))
292		chip->gpio_width[0] = 32;
293
294	spin_lock_init(&chip->gpio_lock[0]);
295
296	if (of_property_read_u32(np, "xlnx,is-dual", &is_dual))
297		is_dual = 0;
298
299	if (is_dual) {
300		/* Update GPIO state shadow register with default value */
301		of_property_read_u32(np, "xlnx,dout-default-2",
302				     &chip->gpio_state[1]);
303
304		/* Update GPIO direction shadow register with default value */
305		if (of_property_read_u32(np, "xlnx,tri-default-2",
306					 &chip->gpio_dir[1]))
307			chip->gpio_dir[1] = 0xFFFFFFFF;
308
309		/*
310		 * Check device node and parent device node for device width
311		 * and assume default width of 32
312		 */
313		if (of_property_read_u32(np, "xlnx,gpio2-width",
314					 &chip->gpio_width[1]))
315			chip->gpio_width[1] = 32;
316
317		spin_lock_init(&chip->gpio_lock[1]);
318	}
319
320	chip->gc.base = -1;
321	chip->gc.ngpio = chip->gpio_width[0] + chip->gpio_width[1];
322	chip->gc.parent = &pdev->dev;
323	chip->gc.direction_input = xgpio_dir_in;
324	chip->gc.direction_output = xgpio_dir_out;
325	chip->gc.get = xgpio_get;
326	chip->gc.set = xgpio_set;
327	chip->gc.set_multiple = xgpio_set_multiple;
328
329	chip->gc.label = dev_name(&pdev->dev);
330
331	chip->regs = devm_platform_ioremap_resource(pdev, 0);
332	if (IS_ERR(chip->regs)) {
333		dev_err(&pdev->dev, "failed to ioremap memory resource\n");
334		return PTR_ERR(chip->regs);
335	}
336
337	xgpio_save_regs(chip);
338
339	status = devm_gpiochip_add_data(&pdev->dev, &chip->gc, chip);
340	if (status) {
341		dev_err(&pdev->dev, "failed to add GPIO chip\n");
342		return status;
343	}
344
345	return 0;
346}
347
348static const struct of_device_id xgpio_of_match[] = {
349	{ .compatible = "xlnx,xps-gpio-1.00.a", },
350	{ /* end of list */ },
351};
352
353MODULE_DEVICE_TABLE(of, xgpio_of_match);
354
355static struct platform_driver xgpio_plat_driver = {
356	.probe		= xgpio_probe,
357	.driver		= {
358			.name = "gpio-xilinx",
359			.of_match_table	= xgpio_of_match,
360	},
361};
362
363static int __init xgpio_init(void)
364{
365	return platform_driver_register(&xgpio_plat_driver);
366}
367
368subsys_initcall(xgpio_init);
369
370static void __exit xgpio_exit(void)
371{
372	platform_driver_unregister(&xgpio_plat_driver);
373}
374module_exit(xgpio_exit);
375
376MODULE_AUTHOR("Xilinx, Inc.");
377MODULE_DESCRIPTION("Xilinx GPIO driver");
378MODULE_LICENSE("GPL");
379