18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * SAMA5D2 PIOBU GPIO controller
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries
68c2ecf20Sopenharmony_ci *
78c2ecf20Sopenharmony_ci * Author: Andrei Stefanescu <andrei.stefanescu@microchip.com>
88c2ecf20Sopenharmony_ci *
98c2ecf20Sopenharmony_ci */
108c2ecf20Sopenharmony_ci#include <linux/bits.h>
118c2ecf20Sopenharmony_ci#include <linux/gpio/driver.h>
128c2ecf20Sopenharmony_ci#include <linux/init.h>
138c2ecf20Sopenharmony_ci#include <linux/kernel.h>
148c2ecf20Sopenharmony_ci#include <linux/mfd/syscon.h>
158c2ecf20Sopenharmony_ci#include <linux/module.h>
168c2ecf20Sopenharmony_ci#include <linux/of.h>
178c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
188c2ecf20Sopenharmony_ci#include <linux/regmap.h>
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci#define PIOBU_NUM 8
218c2ecf20Sopenharmony_ci#define PIOBU_REG_SIZE 4
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci/*
248c2ecf20Sopenharmony_ci * backup mode protection register for tamper detection
258c2ecf20Sopenharmony_ci * normal mode protection register for tamper detection
268c2ecf20Sopenharmony_ci * wakeup signal generation
278c2ecf20Sopenharmony_ci */
288c2ecf20Sopenharmony_ci#define PIOBU_BMPR 0x7C
298c2ecf20Sopenharmony_ci#define PIOBU_NMPR 0x80
308c2ecf20Sopenharmony_ci#define PIOBU_WKPR 0x90
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_ci#define PIOBU_BASE 0x18 /* PIOBU offset from SECUMOD base register address. */
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_ci#define PIOBU_DET_OFFSET 16
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ci/* In the datasheet this bit is called OUTPUT */
378c2ecf20Sopenharmony_ci#define PIOBU_DIRECTION BIT(8)
388c2ecf20Sopenharmony_ci#define PIOBU_OUT BIT(8)
398c2ecf20Sopenharmony_ci#define PIOBU_IN 0
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_ci#define PIOBU_SOD BIT(9)
428c2ecf20Sopenharmony_ci#define PIOBU_PDS BIT(10)
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_ci#define PIOBU_HIGH BIT(9)
458c2ecf20Sopenharmony_ci#define PIOBU_LOW 0
468c2ecf20Sopenharmony_ci
478c2ecf20Sopenharmony_cistruct sama5d2_piobu {
488c2ecf20Sopenharmony_ci	struct gpio_chip chip;
498c2ecf20Sopenharmony_ci	struct regmap *regmap;
508c2ecf20Sopenharmony_ci};
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci/*
538c2ecf20Sopenharmony_ci * sama5d2_piobu_setup_pin() - prepares a pin for set_direction call
548c2ecf20Sopenharmony_ci *
558c2ecf20Sopenharmony_ci * Do not consider pin for tamper detection (normal and backup modes)
568c2ecf20Sopenharmony_ci * Do not consider pin as tamper wakeup interrupt source
578c2ecf20Sopenharmony_ci */
588c2ecf20Sopenharmony_cistatic int sama5d2_piobu_setup_pin(struct gpio_chip *chip, unsigned int pin)
598c2ecf20Sopenharmony_ci{
608c2ecf20Sopenharmony_ci	int ret;
618c2ecf20Sopenharmony_ci	struct sama5d2_piobu *piobu = container_of(chip, struct sama5d2_piobu,
628c2ecf20Sopenharmony_ci						   chip);
638c2ecf20Sopenharmony_ci	unsigned int mask = BIT(PIOBU_DET_OFFSET + pin);
648c2ecf20Sopenharmony_ci
658c2ecf20Sopenharmony_ci	ret = regmap_update_bits(piobu->regmap, PIOBU_BMPR, mask, 0);
668c2ecf20Sopenharmony_ci	if (ret)
678c2ecf20Sopenharmony_ci		return ret;
688c2ecf20Sopenharmony_ci
698c2ecf20Sopenharmony_ci	ret = regmap_update_bits(piobu->regmap, PIOBU_NMPR, mask, 0);
708c2ecf20Sopenharmony_ci	if (ret)
718c2ecf20Sopenharmony_ci		return ret;
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ci	return regmap_update_bits(piobu->regmap, PIOBU_WKPR, mask, 0);
748c2ecf20Sopenharmony_ci}
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_ci/*
778c2ecf20Sopenharmony_ci * sama5d2_piobu_write_value() - writes value & mask at the pin's PIOBU register
788c2ecf20Sopenharmony_ci */
798c2ecf20Sopenharmony_cistatic int sama5d2_piobu_write_value(struct gpio_chip *chip, unsigned int pin,
808c2ecf20Sopenharmony_ci				     unsigned int mask, unsigned int value)
818c2ecf20Sopenharmony_ci{
828c2ecf20Sopenharmony_ci	int reg;
838c2ecf20Sopenharmony_ci	struct sama5d2_piobu *piobu = container_of(chip, struct sama5d2_piobu,
848c2ecf20Sopenharmony_ci						   chip);
858c2ecf20Sopenharmony_ci
868c2ecf20Sopenharmony_ci	reg = PIOBU_BASE + pin * PIOBU_REG_SIZE;
878c2ecf20Sopenharmony_ci
888c2ecf20Sopenharmony_ci	return regmap_update_bits(piobu->regmap, reg, mask, value);
898c2ecf20Sopenharmony_ci}
908c2ecf20Sopenharmony_ci
918c2ecf20Sopenharmony_ci/*
928c2ecf20Sopenharmony_ci * sama5d2_piobu_read_value() - read the value with masking from the pin's PIOBU
938c2ecf20Sopenharmony_ci *			      register
948c2ecf20Sopenharmony_ci */
958c2ecf20Sopenharmony_cistatic int sama5d2_piobu_read_value(struct gpio_chip *chip, unsigned int pin,
968c2ecf20Sopenharmony_ci				    unsigned int mask)
978c2ecf20Sopenharmony_ci{
988c2ecf20Sopenharmony_ci	struct sama5d2_piobu *piobu = container_of(chip, struct sama5d2_piobu,
998c2ecf20Sopenharmony_ci						   chip);
1008c2ecf20Sopenharmony_ci	unsigned int val, reg;
1018c2ecf20Sopenharmony_ci	int ret;
1028c2ecf20Sopenharmony_ci
1038c2ecf20Sopenharmony_ci	reg = PIOBU_BASE + pin * PIOBU_REG_SIZE;
1048c2ecf20Sopenharmony_ci	ret = regmap_read(piobu->regmap, reg, &val);
1058c2ecf20Sopenharmony_ci	if (ret < 0)
1068c2ecf20Sopenharmony_ci		return ret;
1078c2ecf20Sopenharmony_ci
1088c2ecf20Sopenharmony_ci	return val & mask;
1098c2ecf20Sopenharmony_ci}
1108c2ecf20Sopenharmony_ci
1118c2ecf20Sopenharmony_ci/*
1128c2ecf20Sopenharmony_ci * sama5d2_piobu_get_direction() - gpiochip get_direction
1138c2ecf20Sopenharmony_ci */
1148c2ecf20Sopenharmony_cistatic int sama5d2_piobu_get_direction(struct gpio_chip *chip,
1158c2ecf20Sopenharmony_ci				       unsigned int pin)
1168c2ecf20Sopenharmony_ci{
1178c2ecf20Sopenharmony_ci	int ret = sama5d2_piobu_read_value(chip, pin, PIOBU_DIRECTION);
1188c2ecf20Sopenharmony_ci
1198c2ecf20Sopenharmony_ci	if (ret < 0)
1208c2ecf20Sopenharmony_ci		return ret;
1218c2ecf20Sopenharmony_ci
1228c2ecf20Sopenharmony_ci	return (ret == PIOBU_IN) ? GPIO_LINE_DIRECTION_IN :
1238c2ecf20Sopenharmony_ci				   GPIO_LINE_DIRECTION_OUT;
1248c2ecf20Sopenharmony_ci}
1258c2ecf20Sopenharmony_ci
1268c2ecf20Sopenharmony_ci/*
1278c2ecf20Sopenharmony_ci * sama5d2_piobu_direction_input() - gpiochip direction_input
1288c2ecf20Sopenharmony_ci */
1298c2ecf20Sopenharmony_cistatic int sama5d2_piobu_direction_input(struct gpio_chip *chip,
1308c2ecf20Sopenharmony_ci					 unsigned int pin)
1318c2ecf20Sopenharmony_ci{
1328c2ecf20Sopenharmony_ci	return sama5d2_piobu_write_value(chip, pin, PIOBU_DIRECTION, PIOBU_IN);
1338c2ecf20Sopenharmony_ci}
1348c2ecf20Sopenharmony_ci
1358c2ecf20Sopenharmony_ci/*
1368c2ecf20Sopenharmony_ci * sama5d2_piobu_direction_output() - gpiochip direction_output
1378c2ecf20Sopenharmony_ci */
1388c2ecf20Sopenharmony_cistatic int sama5d2_piobu_direction_output(struct gpio_chip *chip,
1398c2ecf20Sopenharmony_ci					  unsigned int pin, int value)
1408c2ecf20Sopenharmony_ci{
1418c2ecf20Sopenharmony_ci	unsigned int val = PIOBU_OUT;
1428c2ecf20Sopenharmony_ci
1438c2ecf20Sopenharmony_ci	if (value)
1448c2ecf20Sopenharmony_ci		val |= PIOBU_HIGH;
1458c2ecf20Sopenharmony_ci
1468c2ecf20Sopenharmony_ci	return sama5d2_piobu_write_value(chip, pin, PIOBU_DIRECTION | PIOBU_SOD,
1478c2ecf20Sopenharmony_ci					 val);
1488c2ecf20Sopenharmony_ci}
1498c2ecf20Sopenharmony_ci
1508c2ecf20Sopenharmony_ci/*
1518c2ecf20Sopenharmony_ci * sama5d2_piobu_get() - gpiochip get
1528c2ecf20Sopenharmony_ci */
1538c2ecf20Sopenharmony_cistatic int sama5d2_piobu_get(struct gpio_chip *chip, unsigned int pin)
1548c2ecf20Sopenharmony_ci{
1558c2ecf20Sopenharmony_ci	/* if pin is input, read value from PDS else read from SOD */
1568c2ecf20Sopenharmony_ci	int ret = sama5d2_piobu_get_direction(chip, pin);
1578c2ecf20Sopenharmony_ci
1588c2ecf20Sopenharmony_ci	if (ret == GPIO_LINE_DIRECTION_IN)
1598c2ecf20Sopenharmony_ci		ret = sama5d2_piobu_read_value(chip, pin, PIOBU_PDS);
1608c2ecf20Sopenharmony_ci	else if (ret == GPIO_LINE_DIRECTION_OUT)
1618c2ecf20Sopenharmony_ci		ret = sama5d2_piobu_read_value(chip, pin, PIOBU_SOD);
1628c2ecf20Sopenharmony_ci
1638c2ecf20Sopenharmony_ci	if (ret < 0)
1648c2ecf20Sopenharmony_ci		return ret;
1658c2ecf20Sopenharmony_ci
1668c2ecf20Sopenharmony_ci	return !!ret;
1678c2ecf20Sopenharmony_ci}
1688c2ecf20Sopenharmony_ci
1698c2ecf20Sopenharmony_ci/*
1708c2ecf20Sopenharmony_ci * sama5d2_piobu_set() - gpiochip set
1718c2ecf20Sopenharmony_ci */
1728c2ecf20Sopenharmony_cistatic void sama5d2_piobu_set(struct gpio_chip *chip, unsigned int pin,
1738c2ecf20Sopenharmony_ci			      int value)
1748c2ecf20Sopenharmony_ci{
1758c2ecf20Sopenharmony_ci	if (!value)
1768c2ecf20Sopenharmony_ci		value = PIOBU_LOW;
1778c2ecf20Sopenharmony_ci	else
1788c2ecf20Sopenharmony_ci		value = PIOBU_HIGH;
1798c2ecf20Sopenharmony_ci
1808c2ecf20Sopenharmony_ci	sama5d2_piobu_write_value(chip, pin, PIOBU_SOD, value);
1818c2ecf20Sopenharmony_ci}
1828c2ecf20Sopenharmony_ci
1838c2ecf20Sopenharmony_cistatic int sama5d2_piobu_probe(struct platform_device *pdev)
1848c2ecf20Sopenharmony_ci{
1858c2ecf20Sopenharmony_ci	struct sama5d2_piobu *piobu;
1868c2ecf20Sopenharmony_ci	int ret, i;
1878c2ecf20Sopenharmony_ci
1888c2ecf20Sopenharmony_ci	piobu = devm_kzalloc(&pdev->dev, sizeof(*piobu), GFP_KERNEL);
1898c2ecf20Sopenharmony_ci	if (!piobu)
1908c2ecf20Sopenharmony_ci		return -ENOMEM;
1918c2ecf20Sopenharmony_ci
1928c2ecf20Sopenharmony_ci	platform_set_drvdata(pdev, piobu);
1938c2ecf20Sopenharmony_ci	piobu->chip.label = pdev->name;
1948c2ecf20Sopenharmony_ci	piobu->chip.parent = &pdev->dev;
1958c2ecf20Sopenharmony_ci	piobu->chip.of_node = pdev->dev.of_node;
1968c2ecf20Sopenharmony_ci	piobu->chip.owner = THIS_MODULE,
1978c2ecf20Sopenharmony_ci	piobu->chip.get_direction = sama5d2_piobu_get_direction,
1988c2ecf20Sopenharmony_ci	piobu->chip.direction_input = sama5d2_piobu_direction_input,
1998c2ecf20Sopenharmony_ci	piobu->chip.direction_output = sama5d2_piobu_direction_output,
2008c2ecf20Sopenharmony_ci	piobu->chip.get = sama5d2_piobu_get,
2018c2ecf20Sopenharmony_ci	piobu->chip.set = sama5d2_piobu_set,
2028c2ecf20Sopenharmony_ci	piobu->chip.base = -1,
2038c2ecf20Sopenharmony_ci	piobu->chip.ngpio = PIOBU_NUM,
2048c2ecf20Sopenharmony_ci	piobu->chip.can_sleep = 0,
2058c2ecf20Sopenharmony_ci
2068c2ecf20Sopenharmony_ci	piobu->regmap = syscon_node_to_regmap(pdev->dev.of_node);
2078c2ecf20Sopenharmony_ci	if (IS_ERR(piobu->regmap)) {
2088c2ecf20Sopenharmony_ci		dev_err(&pdev->dev, "Failed to get syscon regmap %ld\n",
2098c2ecf20Sopenharmony_ci			PTR_ERR(piobu->regmap));
2108c2ecf20Sopenharmony_ci		return PTR_ERR(piobu->regmap);
2118c2ecf20Sopenharmony_ci	}
2128c2ecf20Sopenharmony_ci
2138c2ecf20Sopenharmony_ci	ret = devm_gpiochip_add_data(&pdev->dev, &piobu->chip, piobu);
2148c2ecf20Sopenharmony_ci	if (ret) {
2158c2ecf20Sopenharmony_ci		dev_err(&pdev->dev, "Failed to add gpiochip %d\n", ret);
2168c2ecf20Sopenharmony_ci		return ret;
2178c2ecf20Sopenharmony_ci	}
2188c2ecf20Sopenharmony_ci
2198c2ecf20Sopenharmony_ci	for (i = 0; i < PIOBU_NUM; ++i) {
2208c2ecf20Sopenharmony_ci		ret = sama5d2_piobu_setup_pin(&piobu->chip, i);
2218c2ecf20Sopenharmony_ci		if (ret) {
2228c2ecf20Sopenharmony_ci			dev_err(&pdev->dev, "Failed to setup pin: %d %d\n",
2238c2ecf20Sopenharmony_ci				i, ret);
2248c2ecf20Sopenharmony_ci			return ret;
2258c2ecf20Sopenharmony_ci		}
2268c2ecf20Sopenharmony_ci	}
2278c2ecf20Sopenharmony_ci
2288c2ecf20Sopenharmony_ci	return 0;
2298c2ecf20Sopenharmony_ci}
2308c2ecf20Sopenharmony_ci
2318c2ecf20Sopenharmony_cistatic const struct of_device_id sama5d2_piobu_ids[] = {
2328c2ecf20Sopenharmony_ci	{ .compatible = "atmel,sama5d2-secumod" },
2338c2ecf20Sopenharmony_ci	{},
2348c2ecf20Sopenharmony_ci};
2358c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, sama5d2_piobu_ids);
2368c2ecf20Sopenharmony_ci
2378c2ecf20Sopenharmony_cistatic struct platform_driver sama5d2_piobu_driver = {
2388c2ecf20Sopenharmony_ci	.driver = {
2398c2ecf20Sopenharmony_ci		.name		= "sama5d2-piobu",
2408c2ecf20Sopenharmony_ci		.of_match_table	= of_match_ptr(sama5d2_piobu_ids)
2418c2ecf20Sopenharmony_ci	},
2428c2ecf20Sopenharmony_ci	.probe = sama5d2_piobu_probe,
2438c2ecf20Sopenharmony_ci};
2448c2ecf20Sopenharmony_ci
2458c2ecf20Sopenharmony_cimodule_platform_driver(sama5d2_piobu_driver);
2468c2ecf20Sopenharmony_ci
2478c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL v2");
2488c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("SAMA5D2 PIOBU controller driver");
2498c2ecf20Sopenharmony_ciMODULE_AUTHOR("Andrei Stefanescu <andrei.stefanescu@microchip.com>");
250