1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
4 *
5 * Copyright (C) 2007 David Brownell
6 */
7
8#include <linux/gpio/driver.h>
9#include <linux/i2c.h>
10#include <linux/platform_data/pcf857x.h>
11#include <linux/interrupt.h>
12#include <linux/irq.h>
13#include <linux/irqdomain.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/of.h>
17#include <linux/of_device.h>
18#include <linux/slab.h>
19#include <linux/spinlock.h>
20
21
22static const struct i2c_device_id pcf857x_id[] = {
23	{ "pcf8574", 8 },
24	{ "pcf8574a", 8 },
25	{ "pca8574", 8 },
26	{ "pca9670", 8 },
27	{ "pca9672", 8 },
28	{ "pca9674", 8 },
29	{ "pcf8575", 16 },
30	{ "pca8575", 16 },
31	{ "pca9671", 16 },
32	{ "pca9673", 16 },
33	{ "pca9675", 16 },
34	{ "max7328", 8 },
35	{ "max7329", 8 },
36	{ }
37};
38MODULE_DEVICE_TABLE(i2c, pcf857x_id);
39
40#ifdef CONFIG_OF
41static const struct of_device_id pcf857x_of_table[] = {
42	{ .compatible = "nxp,pcf8574" },
43	{ .compatible = "nxp,pcf8574a" },
44	{ .compatible = "nxp,pca8574" },
45	{ .compatible = "nxp,pca9670" },
46	{ .compatible = "nxp,pca9672" },
47	{ .compatible = "nxp,pca9674" },
48	{ .compatible = "nxp,pcf8575" },
49	{ .compatible = "nxp,pca8575" },
50	{ .compatible = "nxp,pca9671" },
51	{ .compatible = "nxp,pca9673" },
52	{ .compatible = "nxp,pca9675" },
53	{ .compatible = "maxim,max7328" },
54	{ .compatible = "maxim,max7329" },
55	{ }
56};
57MODULE_DEVICE_TABLE(of, pcf857x_of_table);
58#endif
59
60/*
61 * The pcf857x, pca857x, and pca967x chips only expose one read and one
62 * write register.  Writing a "one" bit (to match the reset state) lets
63 * that pin be used as an input; it's not an open-drain model, but acts
64 * a bit like one.  This is described as "quasi-bidirectional"; read the
65 * chip documentation for details.
66 *
67 * Many other I2C GPIO expander chips (like the pca953x models) have
68 * more complex register models and more conventional circuitry using
69 * push/pull drivers.  They often use the same 0x20..0x27 addresses as
70 * pcf857x parts, making the "legacy" I2C driver model problematic.
71 */
72struct pcf857x {
73	struct gpio_chip	chip;
74	struct irq_chip		irqchip;
75	struct i2c_client	*client;
76	struct mutex		lock;		/* protect 'out' */
77	unsigned		out;		/* software latch */
78	unsigned		status;		/* current status */
79	unsigned		irq_enabled;	/* enabled irqs */
80
81	int (*write)(struct i2c_client *client, unsigned data);
82	int (*read)(struct i2c_client *client);
83};
84
85/*-------------------------------------------------------------------------*/
86
87/* Talk to 8-bit I/O expander */
88
89static int i2c_write_le8(struct i2c_client *client, unsigned data)
90{
91	return i2c_smbus_write_byte(client, data);
92}
93
94static int i2c_read_le8(struct i2c_client *client)
95{
96	return (int)i2c_smbus_read_byte(client);
97}
98
99/* Talk to 16-bit I/O expander */
100
101static int i2c_write_le16(struct i2c_client *client, unsigned word)
102{
103	u8 buf[2] = { word & 0xff, word >> 8, };
104	int status;
105
106	status = i2c_master_send(client, buf, 2);
107	return (status < 0) ? status : 0;
108}
109
110static int i2c_read_le16(struct i2c_client *client)
111{
112	u8 buf[2];
113	int status;
114
115	status = i2c_master_recv(client, buf, 2);
116	if (status < 0)
117		return status;
118	return (buf[1] << 8) | buf[0];
119}
120
121/*-------------------------------------------------------------------------*/
122
123static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
124{
125	struct pcf857x	*gpio = gpiochip_get_data(chip);
126	int		status;
127
128	mutex_lock(&gpio->lock);
129	gpio->out |= (1 << offset);
130	status = gpio->write(gpio->client, gpio->out);
131	mutex_unlock(&gpio->lock);
132
133	return status;
134}
135
136static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
137{
138	struct pcf857x	*gpio = gpiochip_get_data(chip);
139	int		value;
140
141	value = gpio->read(gpio->client);
142	return (value < 0) ? value : !!(value & (1 << offset));
143}
144
145static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
146{
147	struct pcf857x	*gpio = gpiochip_get_data(chip);
148	unsigned	bit = 1 << offset;
149	int		status;
150
151	mutex_lock(&gpio->lock);
152	if (value)
153		gpio->out |= bit;
154	else
155		gpio->out &= ~bit;
156	status = gpio->write(gpio->client, gpio->out);
157	mutex_unlock(&gpio->lock);
158
159	return status;
160}
161
162static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
163{
164	pcf857x_output(chip, offset, value);
165}
166
167/*-------------------------------------------------------------------------*/
168
169static irqreturn_t pcf857x_irq(int irq, void *data)
170{
171	struct pcf857x  *gpio = data;
172	unsigned long change, i, status;
173
174	status = gpio->read(gpio->client);
175
176	/*
177	 * call the interrupt handler iff gpio is used as
178	 * interrupt source, just to avoid bad irqs
179	 */
180	mutex_lock(&gpio->lock);
181	change = (gpio->status ^ status) & gpio->irq_enabled;
182	gpio->status = status;
183	mutex_unlock(&gpio->lock);
184
185	for_each_set_bit(i, &change, gpio->chip.ngpio)
186		handle_nested_irq(irq_find_mapping(gpio->chip.irq.domain, i));
187
188	return IRQ_HANDLED;
189}
190
191/*
192 * NOP functions
193 */
194static void noop(struct irq_data *data) { }
195
196static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on)
197{
198	struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
199
200	return irq_set_irq_wake(gpio->client->irq, on);
201}
202
203static void pcf857x_irq_enable(struct irq_data *data)
204{
205	struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
206
207	gpio->irq_enabled |= (1 << data->hwirq);
208}
209
210static void pcf857x_irq_disable(struct irq_data *data)
211{
212	struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
213
214	gpio->irq_enabled &= ~(1 << data->hwirq);
215}
216
217static void pcf857x_irq_bus_lock(struct irq_data *data)
218{
219	struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
220
221	mutex_lock(&gpio->lock);
222}
223
224static void pcf857x_irq_bus_sync_unlock(struct irq_data *data)
225{
226	struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
227
228	mutex_unlock(&gpio->lock);
229}
230
231/*-------------------------------------------------------------------------*/
232
233static int pcf857x_probe(struct i2c_client *client,
234			 const struct i2c_device_id *id)
235{
236	struct pcf857x_platform_data	*pdata = dev_get_platdata(&client->dev);
237	struct device_node		*np = client->dev.of_node;
238	struct pcf857x			*gpio;
239	unsigned int			n_latch = 0;
240	int				status;
241
242	if (IS_ENABLED(CONFIG_OF) && np)
243		of_property_read_u32(np, "lines-initial-states", &n_latch);
244	else if (pdata)
245		n_latch = pdata->n_latch;
246	else
247		dev_dbg(&client->dev, "no platform data\n");
248
249	/* Allocate, initialize, and register this gpio_chip. */
250	gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
251	if (!gpio)
252		return -ENOMEM;
253
254	mutex_init(&gpio->lock);
255
256	gpio->chip.base			= pdata ? pdata->gpio_base : -1;
257	gpio->chip.can_sleep		= true;
258	gpio->chip.parent		= &client->dev;
259	gpio->chip.owner		= THIS_MODULE;
260	gpio->chip.get			= pcf857x_get;
261	gpio->chip.set			= pcf857x_set;
262	gpio->chip.direction_input	= pcf857x_input;
263	gpio->chip.direction_output	= pcf857x_output;
264	gpio->chip.ngpio		= id->driver_data;
265
266	/* NOTE:  the OnSemi jlc1562b is also largely compatible with
267	 * these parts, notably for output.  It has a low-resolution
268	 * DAC instead of pin change IRQs; and its inputs can be the
269	 * result of comparators.
270	 */
271
272	/* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
273	 * 9670, 9672, 9764, and 9764a use quite a variety.
274	 *
275	 * NOTE: we don't distinguish here between *4 and *4a parts.
276	 */
277	if (gpio->chip.ngpio == 8) {
278		gpio->write	= i2c_write_le8;
279		gpio->read	= i2c_read_le8;
280
281		if (!i2c_check_functionality(client->adapter,
282				I2C_FUNC_SMBUS_BYTE))
283			status = -EIO;
284
285		/* fail if there's no chip present */
286		else
287			status = i2c_smbus_read_byte(client);
288
289	/* '75/'75c addresses are 0x20..0x27, just like the '74;
290	 * the '75c doesn't have a current source pulling high.
291	 * 9671, 9673, and 9765 use quite a variety of addresses.
292	 *
293	 * NOTE: we don't distinguish here between '75 and '75c parts.
294	 */
295	} else if (gpio->chip.ngpio == 16) {
296		gpio->write	= i2c_write_le16;
297		gpio->read	= i2c_read_le16;
298
299		if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
300			status = -EIO;
301
302		/* fail if there's no chip present */
303		else
304			status = i2c_read_le16(client);
305
306	} else {
307		dev_dbg(&client->dev, "unsupported number of gpios\n");
308		status = -EINVAL;
309	}
310
311	if (status < 0)
312		goto fail;
313
314	gpio->chip.label = client->name;
315
316	gpio->client = client;
317	i2c_set_clientdata(client, gpio);
318
319	/* NOTE:  these chips have strange "quasi-bidirectional" I/O pins.
320	 * We can't actually know whether a pin is configured (a) as output
321	 * and driving the signal low, or (b) as input and reporting a low
322	 * value ... without knowing the last value written since the chip
323	 * came out of reset (if any).  We can't read the latched output.
324	 *
325	 * In short, the only reliable solution for setting up pin direction
326	 * is to do it explicitly.  The setup() method can do that, but it
327	 * may cause transient glitching since it can't know the last value
328	 * written (some pins may need to be driven low).
329	 *
330	 * Using n_latch avoids that trouble.  When left initialized to zero,
331	 * our software copy of the "latch" then matches the chip's all-ones
332	 * reset state.  Otherwise it flags pins to be driven low.
333	 */
334	gpio->out = ~n_latch;
335	gpio->status = gpio->read(gpio->client);
336
337	/* Enable irqchip if we have an interrupt */
338	if (client->irq) {
339		struct gpio_irq_chip *girq;
340
341		gpio->irqchip.name = "pcf857x";
342		gpio->irqchip.irq_enable = pcf857x_irq_enable;
343		gpio->irqchip.irq_disable = pcf857x_irq_disable;
344		gpio->irqchip.irq_ack = noop;
345		gpio->irqchip.irq_mask = noop;
346		gpio->irqchip.irq_unmask = noop;
347		gpio->irqchip.irq_set_wake = pcf857x_irq_set_wake;
348		gpio->irqchip.irq_bus_lock = pcf857x_irq_bus_lock;
349		gpio->irqchip.irq_bus_sync_unlock = pcf857x_irq_bus_sync_unlock;
350
351		status = devm_request_threaded_irq(&client->dev, client->irq,
352					NULL, pcf857x_irq, IRQF_ONESHOT |
353					IRQF_TRIGGER_FALLING | IRQF_SHARED,
354					dev_name(&client->dev), gpio);
355		if (status)
356			goto fail;
357
358		girq = &gpio->chip.irq;
359		girq->chip = &gpio->irqchip;
360		/* This will let us handle the parent IRQ in the driver */
361		girq->parent_handler = NULL;
362		girq->num_parents = 0;
363		girq->parents = NULL;
364		girq->default_type = IRQ_TYPE_NONE;
365		girq->handler = handle_level_irq;
366		girq->threaded = true;
367	}
368
369	status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio);
370	if (status < 0)
371		goto fail;
372
373	/* Let platform code set up the GPIOs and their users.
374	 * Now is the first time anyone could use them.
375	 */
376	if (pdata && pdata->setup) {
377		status = pdata->setup(client,
378				gpio->chip.base, gpio->chip.ngpio,
379				pdata->context);
380		if (status < 0)
381			dev_warn(&client->dev, "setup --> %d\n", status);
382	}
383
384	dev_info(&client->dev, "probed\n");
385
386	return 0;
387
388fail:
389	dev_dbg(&client->dev, "probe error %d for '%s'\n", status,
390		client->name);
391
392	return status;
393}
394
395static int pcf857x_remove(struct i2c_client *client)
396{
397	struct pcf857x_platform_data	*pdata = dev_get_platdata(&client->dev);
398	struct pcf857x			*gpio = i2c_get_clientdata(client);
399	int				status = 0;
400
401	if (pdata && pdata->teardown) {
402		status = pdata->teardown(client,
403				gpio->chip.base, gpio->chip.ngpio,
404				pdata->context);
405		if (status < 0) {
406			dev_err(&client->dev, "%s --> %d\n",
407					"teardown", status);
408			return status;
409		}
410	}
411
412	return status;
413}
414
415static void pcf857x_shutdown(struct i2c_client *client)
416{
417	struct pcf857x *gpio = i2c_get_clientdata(client);
418
419	/* Drive all the I/O lines high */
420	gpio->write(gpio->client, BIT(gpio->chip.ngpio) - 1);
421}
422
423static struct i2c_driver pcf857x_driver = {
424	.driver = {
425		.name	= "pcf857x",
426		.of_match_table = of_match_ptr(pcf857x_of_table),
427	},
428	.probe	= pcf857x_probe,
429	.remove	= pcf857x_remove,
430	.shutdown = pcf857x_shutdown,
431	.id_table = pcf857x_id,
432};
433
434static int __init pcf857x_init(void)
435{
436	return i2c_add_driver(&pcf857x_driver);
437}
438/* register after i2c postcore initcall and before
439 * subsys initcalls that may rely on these GPIOs
440 */
441subsys_initcall(pcf857x_init);
442
443static void __exit pcf857x_exit(void)
444{
445	i2c_del_driver(&pcf857x_driver);
446}
447module_exit(pcf857x_exit);
448
449MODULE_LICENSE("GPL");
450MODULE_AUTHOR("David Brownell");
451