1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * PCA953x 4/8/16/24/40 bit I/O ports 4 * 5 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> 6 * Copyright (C) 2007 Marvell International Ltd. 7 * 8 * Derived from drivers/i2c/chips/pca9539.c 9 */ 10 11#include <linux/acpi.h> 12#include <linux/bitmap.h> 13#include <linux/gpio/driver.h> 14#include <linux/gpio/consumer.h> 15#include <linux/i2c.h> 16#include <linux/init.h> 17#include <linux/interrupt.h> 18#include <linux/module.h> 19#include <linux/of_platform.h> 20#include <linux/platform_data/pca953x.h> 21#include <linux/regmap.h> 22#include <linux/regulator/consumer.h> 23#include <linux/slab.h> 24 25#include <asm/unaligned.h> 26 27#define PCA953X_INPUT 0x00 28#define PCA953X_OUTPUT 0x01 29#define PCA953X_INVERT 0x02 30#define PCA953X_DIRECTION 0x03 31 32#define REG_ADDR_MASK GENMASK(5, 0) 33#define REG_ADDR_EXT BIT(6) 34#define REG_ADDR_AI BIT(7) 35 36#define PCA957X_IN 0x00 37#define PCA957X_INVRT 0x01 38#define PCA957X_BKEN 0x02 39#define PCA957X_PUPD 0x03 40#define PCA957X_CFG 0x04 41#define PCA957X_OUT 0x05 42#define PCA957X_MSK 0x06 43#define PCA957X_INTS 0x07 44 45#define PCAL953X_OUT_STRENGTH 0x20 46#define PCAL953X_IN_LATCH 0x22 47#define PCAL953X_PULL_EN 0x23 48#define PCAL953X_PULL_SEL 0x24 49#define PCAL953X_INT_MASK 0x25 50#define PCAL953X_INT_STAT 0x26 51#define PCAL953X_OUT_CONF 0x27 52 53#define PCAL6524_INT_EDGE 0x28 54#define PCAL6524_INT_CLR 0x2a 55#define PCAL6524_IN_STATUS 0x2b 56#define PCAL6524_OUT_INDCONF 0x2c 57#define PCAL6524_DEBOUNCE 0x2d 58 59#define PCA_GPIO_MASK GENMASK(7, 0) 60 61#define PCAL_GPIO_MASK GENMASK(4, 0) 62#define PCAL_PINCTRL_MASK GENMASK(6, 5) 63 64#define PCA_INT BIT(8) 65#define PCA_PCAL BIT(9) 66#define PCA_LATCH_INT (PCA_PCAL | PCA_INT) 67#define PCA953X_TYPE BIT(12) 68#define PCA957X_TYPE BIT(13) 69#define PCA_TYPE_MASK GENMASK(15, 12) 70 71#define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK) 72 73static const struct i2c_device_id pca953x_id[] = { 74 { "pca6416", 16 | PCA953X_TYPE | PCA_INT, }, 75 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, }, 76 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, 77 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, 78 { "pca9536", 4 | PCA953X_TYPE, }, 79 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, 80 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, 81 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, 82 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, 83 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, 84 { "pca9556", 8 | PCA953X_TYPE, }, 85 { "pca9557", 8 | PCA953X_TYPE, }, 86 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, 87 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, 88 { "pca9698", 40 | PCA953X_TYPE, }, 89 90 { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, 91 { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, }, 92 { "pcal9535", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, 93 { "pcal9554b", 8 | PCA953X_TYPE | PCA_LATCH_INT, }, 94 { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, 95 96 { "max7310", 8 | PCA953X_TYPE, }, 97 { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, 98 { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, 99 { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, 100 { "max7318", 16 | PCA953X_TYPE | PCA_INT, }, 101 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, 102 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, 103 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, 104 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, }, 105 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, }, 106 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, }, 107 { "xra1202", 8 | PCA953X_TYPE }, 108 { } 109}; 110MODULE_DEVICE_TABLE(i2c, pca953x_id); 111 112#ifdef CONFIG_GPIO_PCA953X_IRQ 113 114#include <linux/dmi.h> 115 116static const struct acpi_gpio_params pca953x_irq_gpios = { 0, 0, true }; 117 118static const struct acpi_gpio_mapping pca953x_acpi_irq_gpios[] = { 119 { "irq-gpios", &pca953x_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER }, 120 { } 121}; 122 123static int pca953x_acpi_get_irq(struct device *dev) 124{ 125 int ret; 126 127 ret = devm_acpi_dev_add_driver_gpios(dev, pca953x_acpi_irq_gpios); 128 if (ret) 129 dev_warn(dev, "can't add GPIO ACPI mapping\n"); 130 131 ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0); 132 if (ret < 0) 133 return ret; 134 135 dev_info(dev, "ACPI interrupt quirk (IRQ %d)\n", ret); 136 return ret; 137} 138 139static const struct dmi_system_id pca953x_dmi_acpi_irq_info[] = { 140 { 141 /* 142 * On Intel Galileo Gen 2 board the IRQ pin of one of 143 * the I²C GPIO expanders, which has GpioInt() resource, 144 * is provided as an absolute number instead of being 145 * relative. Since first controller (gpio-sch.c) and 146 * second (gpio-dwapb.c) are at the fixed bases, we may 147 * safely refer to the number in the global space to get 148 * an IRQ out of it. 149 */ 150 .matches = { 151 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"), 152 }, 153 }, 154 {} 155}; 156#endif 157 158static const struct acpi_device_id pca953x_acpi_ids[] = { 159 { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, 160 { } 161}; 162MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids); 163 164#define MAX_BANK 5 165#define BANK_SZ 8 166#define MAX_LINE (MAX_BANK * BANK_SZ) 167 168#define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ) 169 170struct pca953x_reg_config { 171 int direction; 172 int output; 173 int input; 174 int invert; 175}; 176 177static const struct pca953x_reg_config pca953x_regs = { 178 .direction = PCA953X_DIRECTION, 179 .output = PCA953X_OUTPUT, 180 .input = PCA953X_INPUT, 181 .invert = PCA953X_INVERT, 182}; 183 184static const struct pca953x_reg_config pca957x_regs = { 185 .direction = PCA957X_CFG, 186 .output = PCA957X_OUT, 187 .input = PCA957X_IN, 188 .invert = PCA957X_INVRT, 189}; 190 191struct pca953x_chip { 192 unsigned gpio_start; 193 struct mutex i2c_lock; 194 struct regmap *regmap; 195 196#ifdef CONFIG_GPIO_PCA953X_IRQ 197 struct mutex irq_lock; 198 DECLARE_BITMAP(irq_mask, MAX_LINE); 199 DECLARE_BITMAP(irq_stat, MAX_LINE); 200 DECLARE_BITMAP(irq_trig_raise, MAX_LINE); 201 DECLARE_BITMAP(irq_trig_fall, MAX_LINE); 202 struct irq_chip irq_chip; 203#endif 204 atomic_t wakeup_path; 205 206 struct i2c_client *client; 207 struct gpio_chip gpio_chip; 208 const char *const *names; 209 unsigned long driver_data; 210 struct regulator *regulator; 211 212 const struct pca953x_reg_config *regs; 213}; 214 215static int pca953x_bank_shift(struct pca953x_chip *chip) 216{ 217 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 218} 219 220#define PCA953x_BANK_INPUT BIT(0) 221#define PCA953x_BANK_OUTPUT BIT(1) 222#define PCA953x_BANK_POLARITY BIT(2) 223#define PCA953x_BANK_CONFIG BIT(3) 224 225#define PCA957x_BANK_INPUT BIT(0) 226#define PCA957x_BANK_POLARITY BIT(1) 227#define PCA957x_BANK_BUSHOLD BIT(2) 228#define PCA957x_BANK_CONFIG BIT(4) 229#define PCA957x_BANK_OUTPUT BIT(5) 230 231#define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2) 232#define PCAL9xxx_BANK_PULL_EN BIT(8 + 3) 233#define PCAL9xxx_BANK_PULL_SEL BIT(8 + 4) 234#define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5) 235#define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6) 236 237/* 238 * We care about the following registers: 239 * - Standard set, below 0x40, each port can be replicated up to 8 times 240 * - PCA953x standard 241 * Input port 0x00 + 0 * bank_size R 242 * Output port 0x00 + 1 * bank_size RW 243 * Polarity Inversion port 0x00 + 2 * bank_size RW 244 * Configuration port 0x00 + 3 * bank_size RW 245 * - PCA957x with mixed up registers 246 * Input port 0x00 + 0 * bank_size R 247 * Polarity Inversion port 0x00 + 1 * bank_size RW 248 * Bus hold port 0x00 + 2 * bank_size RW 249 * Configuration port 0x00 + 4 * bank_size RW 250 * Output port 0x00 + 5 * bank_size RW 251 * 252 * - Extended set, above 0x40, often chip specific. 253 * - PCAL6524/PCAL9555A with custom PCAL IRQ handling: 254 * Input latch register 0x40 + 2 * bank_size RW 255 * Pull-up/pull-down enable reg 0x40 + 3 * bank_size RW 256 * Pull-up/pull-down select reg 0x40 + 4 * bank_size RW 257 * Interrupt mask register 0x40 + 5 * bank_size RW 258 * Interrupt status register 0x40 + 6 * bank_size R 259 * 260 * - Registers with bit 0x80 set, the AI bit 261 * The bit is cleared and the registers fall into one of the 262 * categories above. 263 */ 264 265static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg, 266 u32 checkbank) 267{ 268 int bank_shift = pca953x_bank_shift(chip); 269 int bank = (reg & REG_ADDR_MASK) >> bank_shift; 270 int offset = reg & (BIT(bank_shift) - 1); 271 272 /* Special PCAL extended register check. */ 273 if (reg & REG_ADDR_EXT) { 274 if (!(chip->driver_data & PCA_PCAL)) 275 return false; 276 bank += 8; 277 } 278 279 /* Register is not in the matching bank. */ 280 if (!(BIT(bank) & checkbank)) 281 return false; 282 283 /* Register is not within allowed range of bank. */ 284 if (offset >= NBANK(chip)) 285 return false; 286 287 return true; 288} 289 290static bool pca953x_readable_register(struct device *dev, unsigned int reg) 291{ 292 struct pca953x_chip *chip = dev_get_drvdata(dev); 293 u32 bank; 294 295 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { 296 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT | 297 PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG; 298 } else { 299 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT | 300 PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG | 301 PCA957x_BANK_BUSHOLD; 302 } 303 304 if (chip->driver_data & PCA_PCAL) { 305 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN | 306 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK | 307 PCAL9xxx_BANK_IRQ_STAT; 308 } 309 310 return pca953x_check_register(chip, reg, bank); 311} 312 313static bool pca953x_writeable_register(struct device *dev, unsigned int reg) 314{ 315 struct pca953x_chip *chip = dev_get_drvdata(dev); 316 u32 bank; 317 318 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { 319 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY | 320 PCA953x_BANK_CONFIG; 321 } else { 322 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY | 323 PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD; 324 } 325 326 if (chip->driver_data & PCA_PCAL) 327 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN | 328 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK; 329 330 return pca953x_check_register(chip, reg, bank); 331} 332 333static bool pca953x_volatile_register(struct device *dev, unsigned int reg) 334{ 335 struct pca953x_chip *chip = dev_get_drvdata(dev); 336 u32 bank; 337 338 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) 339 bank = PCA953x_BANK_INPUT; 340 else 341 bank = PCA957x_BANK_INPUT; 342 343 if (chip->driver_data & PCA_PCAL) 344 bank |= PCAL9xxx_BANK_IRQ_STAT; 345 346 return pca953x_check_register(chip, reg, bank); 347} 348 349static const struct regmap_config pca953x_i2c_regmap = { 350 .reg_bits = 8, 351 .val_bits = 8, 352 353 .use_single_read = true, 354 .use_single_write = true, 355 356 .readable_reg = pca953x_readable_register, 357 .writeable_reg = pca953x_writeable_register, 358 .volatile_reg = pca953x_volatile_register, 359 360 .disable_locking = true, 361 .cache_type = REGCACHE_RBTREE, 362 .max_register = 0x7f, 363}; 364 365static const struct regmap_config pca953x_ai_i2c_regmap = { 366 .reg_bits = 8, 367 .val_bits = 8, 368 369 .read_flag_mask = REG_ADDR_AI, 370 .write_flag_mask = REG_ADDR_AI, 371 372 .readable_reg = pca953x_readable_register, 373 .writeable_reg = pca953x_writeable_register, 374 .volatile_reg = pca953x_volatile_register, 375 376 .disable_locking = true, 377 .cache_type = REGCACHE_RBTREE, 378 .max_register = 0x7f, 379}; 380 381static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off) 382{ 383 int bank_shift = pca953x_bank_shift(chip); 384 int addr = (reg & PCAL_GPIO_MASK) << bank_shift; 385 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; 386 u8 regaddr = pinctrl | addr | (off / BANK_SZ); 387 388 return regaddr; 389} 390 391static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long *val) 392{ 393 u8 regaddr = pca953x_recalc_addr(chip, reg, 0); 394 u8 value[MAX_BANK]; 395 int i, ret; 396 397 for (i = 0; i < NBANK(chip); i++) 398 value[i] = bitmap_get_value8(val, i * BANK_SZ); 399 400 ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip)); 401 if (ret < 0) { 402 dev_err(&chip->client->dev, "failed writing register\n"); 403 return ret; 404 } 405 406 return 0; 407} 408 409static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *val) 410{ 411 u8 regaddr = pca953x_recalc_addr(chip, reg, 0); 412 u8 value[MAX_BANK]; 413 int i, ret; 414 415 ret = regmap_bulk_read(chip->regmap, regaddr, value, NBANK(chip)); 416 if (ret < 0) { 417 dev_err(&chip->client->dev, "failed reading register\n"); 418 return ret; 419 } 420 421 for (i = 0; i < NBANK(chip); i++) 422 bitmap_set_value8(val, value[i], i * BANK_SZ); 423 424 return 0; 425} 426 427static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) 428{ 429 struct pca953x_chip *chip = gpiochip_get_data(gc); 430 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); 431 u8 bit = BIT(off % BANK_SZ); 432 int ret; 433 434 mutex_lock(&chip->i2c_lock); 435 ret = regmap_write_bits(chip->regmap, dirreg, bit, bit); 436 mutex_unlock(&chip->i2c_lock); 437 return ret; 438} 439 440static int pca953x_gpio_direction_output(struct gpio_chip *gc, 441 unsigned off, int val) 442{ 443 struct pca953x_chip *chip = gpiochip_get_data(gc); 444 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); 445 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off); 446 u8 bit = BIT(off % BANK_SZ); 447 int ret; 448 449 mutex_lock(&chip->i2c_lock); 450 /* set output level */ 451 ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); 452 if (ret) 453 goto exit; 454 455 /* then direction */ 456 ret = regmap_write_bits(chip->regmap, dirreg, bit, 0); 457exit: 458 mutex_unlock(&chip->i2c_lock); 459 return ret; 460} 461 462static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) 463{ 464 struct pca953x_chip *chip = gpiochip_get_data(gc); 465 u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off); 466 u8 bit = BIT(off % BANK_SZ); 467 u32 reg_val; 468 int ret; 469 470 mutex_lock(&chip->i2c_lock); 471 ret = regmap_read(chip->regmap, inreg, ®_val); 472 mutex_unlock(&chip->i2c_lock); 473 if (ret < 0) 474 return ret; 475 476 return !!(reg_val & bit); 477} 478 479static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) 480{ 481 struct pca953x_chip *chip = gpiochip_get_data(gc); 482 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off); 483 u8 bit = BIT(off % BANK_SZ); 484 485 mutex_lock(&chip->i2c_lock); 486 regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); 487 mutex_unlock(&chip->i2c_lock); 488} 489 490static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off) 491{ 492 struct pca953x_chip *chip = gpiochip_get_data(gc); 493 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); 494 u8 bit = BIT(off % BANK_SZ); 495 u32 reg_val; 496 int ret; 497 498 mutex_lock(&chip->i2c_lock); 499 ret = regmap_read(chip->regmap, dirreg, ®_val); 500 mutex_unlock(&chip->i2c_lock); 501 if (ret < 0) 502 return ret; 503 504 if (reg_val & bit) 505 return GPIO_LINE_DIRECTION_IN; 506 507 return GPIO_LINE_DIRECTION_OUT; 508} 509 510static int pca953x_gpio_get_multiple(struct gpio_chip *gc, 511 unsigned long *mask, unsigned long *bits) 512{ 513 struct pca953x_chip *chip = gpiochip_get_data(gc); 514 DECLARE_BITMAP(reg_val, MAX_LINE); 515 int ret; 516 517 mutex_lock(&chip->i2c_lock); 518 ret = pca953x_read_regs(chip, chip->regs->input, reg_val); 519 mutex_unlock(&chip->i2c_lock); 520 if (ret) 521 return ret; 522 523 bitmap_replace(bits, bits, reg_val, mask, gc->ngpio); 524 return 0; 525} 526 527static void pca953x_gpio_set_multiple(struct gpio_chip *gc, 528 unsigned long *mask, unsigned long *bits) 529{ 530 struct pca953x_chip *chip = gpiochip_get_data(gc); 531 DECLARE_BITMAP(reg_val, MAX_LINE); 532 int ret; 533 534 mutex_lock(&chip->i2c_lock); 535 ret = pca953x_read_regs(chip, chip->regs->output, reg_val); 536 if (ret) 537 goto exit; 538 539 bitmap_replace(reg_val, reg_val, bits, mask, gc->ngpio); 540 541 pca953x_write_regs(chip, chip->regs->output, reg_val); 542exit: 543 mutex_unlock(&chip->i2c_lock); 544} 545 546static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip, 547 unsigned int offset, 548 unsigned long config) 549{ 550 u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset); 551 u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset); 552 u8 bit = BIT(offset % BANK_SZ); 553 int ret; 554 555 /* 556 * pull-up/pull-down configuration requires PCAL extended 557 * registers 558 */ 559 if (!(chip->driver_data & PCA_PCAL)) 560 return -ENOTSUPP; 561 562 mutex_lock(&chip->i2c_lock); 563 564 /* Configure pull-up/pull-down */ 565 if (config == PIN_CONFIG_BIAS_PULL_UP) 566 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit); 567 else if (config == PIN_CONFIG_BIAS_PULL_DOWN) 568 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0); 569 else 570 ret = 0; 571 if (ret) 572 goto exit; 573 574 /* Disable/Enable pull-up/pull-down */ 575 if (config == PIN_CONFIG_BIAS_DISABLE) 576 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0); 577 else 578 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit); 579 580exit: 581 mutex_unlock(&chip->i2c_lock); 582 return ret; 583} 584 585static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset, 586 unsigned long config) 587{ 588 struct pca953x_chip *chip = gpiochip_get_data(gc); 589 590 switch (pinconf_to_config_param(config)) { 591 case PIN_CONFIG_BIAS_PULL_UP: 592 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: 593 case PIN_CONFIG_BIAS_PULL_DOWN: 594 case PIN_CONFIG_BIAS_DISABLE: 595 return pca953x_gpio_set_pull_up_down(chip, offset, config); 596 default: 597 return -ENOTSUPP; 598 } 599} 600 601static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) 602{ 603 struct gpio_chip *gc; 604 605 gc = &chip->gpio_chip; 606 607 gc->direction_input = pca953x_gpio_direction_input; 608 gc->direction_output = pca953x_gpio_direction_output; 609 gc->get = pca953x_gpio_get_value; 610 gc->set = pca953x_gpio_set_value; 611 gc->get_direction = pca953x_gpio_get_direction; 612 gc->get_multiple = pca953x_gpio_get_multiple; 613 gc->set_multiple = pca953x_gpio_set_multiple; 614 gc->set_config = pca953x_gpio_set_config; 615 gc->can_sleep = true; 616 617 gc->base = chip->gpio_start; 618 gc->ngpio = gpios; 619 gc->label = dev_name(&chip->client->dev); 620 gc->parent = &chip->client->dev; 621 gc->owner = THIS_MODULE; 622 gc->names = chip->names; 623} 624 625#ifdef CONFIG_GPIO_PCA953X_IRQ 626static void pca953x_irq_mask(struct irq_data *d) 627{ 628 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 629 struct pca953x_chip *chip = gpiochip_get_data(gc); 630 irq_hw_number_t hwirq = irqd_to_hwirq(d); 631 632 clear_bit(hwirq, chip->irq_mask); 633} 634 635static void pca953x_irq_unmask(struct irq_data *d) 636{ 637 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 638 struct pca953x_chip *chip = gpiochip_get_data(gc); 639 irq_hw_number_t hwirq = irqd_to_hwirq(d); 640 641 set_bit(hwirq, chip->irq_mask); 642} 643 644static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on) 645{ 646 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 647 struct pca953x_chip *chip = gpiochip_get_data(gc); 648 649 if (on) 650 atomic_inc(&chip->wakeup_path); 651 else 652 atomic_dec(&chip->wakeup_path); 653 654 return irq_set_irq_wake(chip->client->irq, on); 655} 656 657static void pca953x_irq_bus_lock(struct irq_data *d) 658{ 659 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 660 struct pca953x_chip *chip = gpiochip_get_data(gc); 661 662 mutex_lock(&chip->irq_lock); 663} 664 665static void pca953x_irq_bus_sync_unlock(struct irq_data *d) 666{ 667 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 668 struct pca953x_chip *chip = gpiochip_get_data(gc); 669 DECLARE_BITMAP(irq_mask, MAX_LINE); 670 DECLARE_BITMAP(reg_direction, MAX_LINE); 671 int level; 672 673 if (chip->driver_data & PCA_PCAL) { 674 /* Enable latch on interrupt-enabled inputs */ 675 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask); 676 677 bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio); 678 679 /* Unmask enabled interrupts */ 680 pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask); 681 } 682 683 /* Switch direction to input if needed */ 684 pca953x_read_regs(chip, chip->regs->direction, reg_direction); 685 686 bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio); 687 bitmap_complement(reg_direction, reg_direction, gc->ngpio); 688 bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio); 689 690 /* Look for any newly setup interrupt */ 691 for_each_set_bit(level, irq_mask, gc->ngpio) 692 pca953x_gpio_direction_input(&chip->gpio_chip, level); 693 694 mutex_unlock(&chip->irq_lock); 695} 696 697static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) 698{ 699 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 700 struct pca953x_chip *chip = gpiochip_get_data(gc); 701 irq_hw_number_t hwirq = irqd_to_hwirq(d); 702 703 if (!(type & IRQ_TYPE_EDGE_BOTH)) { 704 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", 705 d->irq, type); 706 return -EINVAL; 707 } 708 709 assign_bit(hwirq, chip->irq_trig_fall, type & IRQ_TYPE_EDGE_FALLING); 710 assign_bit(hwirq, chip->irq_trig_raise, type & IRQ_TYPE_EDGE_RISING); 711 712 return 0; 713} 714 715static void pca953x_irq_shutdown(struct irq_data *d) 716{ 717 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 718 struct pca953x_chip *chip = gpiochip_get_data(gc); 719 irq_hw_number_t hwirq = irqd_to_hwirq(d); 720 721 clear_bit(hwirq, chip->irq_trig_raise); 722 clear_bit(hwirq, chip->irq_trig_fall); 723} 724 725static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pending) 726{ 727 struct gpio_chip *gc = &chip->gpio_chip; 728 DECLARE_BITMAP(reg_direction, MAX_LINE); 729 DECLARE_BITMAP(old_stat, MAX_LINE); 730 DECLARE_BITMAP(cur_stat, MAX_LINE); 731 DECLARE_BITMAP(new_stat, MAX_LINE); 732 DECLARE_BITMAP(trigger, MAX_LINE); 733 int ret; 734 735 if (chip->driver_data & PCA_PCAL) { 736 /* Read the current interrupt status from the device */ 737 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger); 738 if (ret) 739 return false; 740 741 /* Check latched inputs and clear interrupt status */ 742 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat); 743 if (ret) 744 return false; 745 746 /* Apply filter for rising/falling edge selection */ 747 bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio); 748 749 bitmap_and(pending, new_stat, trigger, gc->ngpio); 750 751 return !bitmap_empty(pending, gc->ngpio); 752 } 753 754 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat); 755 if (ret) 756 return false; 757 758 /* Remove output pins from the equation */ 759 pca953x_read_regs(chip, chip->regs->direction, reg_direction); 760 761 bitmap_copy(old_stat, chip->irq_stat, gc->ngpio); 762 763 bitmap_and(new_stat, cur_stat, reg_direction, gc->ngpio); 764 bitmap_xor(cur_stat, new_stat, old_stat, gc->ngpio); 765 bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio); 766 767 bitmap_copy(chip->irq_stat, new_stat, gc->ngpio); 768 769 if (bitmap_empty(trigger, gc->ngpio)) 770 return false; 771 772 bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio); 773 bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio); 774 bitmap_or(new_stat, old_stat, cur_stat, gc->ngpio); 775 bitmap_and(pending, new_stat, trigger, gc->ngpio); 776 777 return !bitmap_empty(pending, gc->ngpio); 778} 779 780static irqreturn_t pca953x_irq_handler(int irq, void *devid) 781{ 782 struct pca953x_chip *chip = devid; 783 struct gpio_chip *gc = &chip->gpio_chip; 784 DECLARE_BITMAP(pending, MAX_LINE); 785 int level; 786 bool ret; 787 788 bitmap_zero(pending, MAX_LINE); 789 790 mutex_lock(&chip->i2c_lock); 791 ret = pca953x_irq_pending(chip, pending); 792 mutex_unlock(&chip->i2c_lock); 793 794 if (ret) { 795 ret = 0; 796 797 for_each_set_bit(level, pending, gc->ngpio) { 798 int nested_irq = irq_find_mapping(gc->irq.domain, level); 799 800 if (unlikely(nested_irq <= 0)) { 801 dev_warn_ratelimited(gc->parent, "unmapped interrupt %d\n", level); 802 continue; 803 } 804 805 handle_nested_irq(nested_irq); 806 ret = 1; 807 } 808 } 809 810 return IRQ_RETVAL(ret); 811} 812 813static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base) 814{ 815 struct i2c_client *client = chip->client; 816 struct irq_chip *irq_chip = &chip->irq_chip; 817 DECLARE_BITMAP(reg_direction, MAX_LINE); 818 DECLARE_BITMAP(irq_stat, MAX_LINE); 819 struct gpio_irq_chip *girq; 820 int ret; 821 822 if (dmi_first_match(pca953x_dmi_acpi_irq_info)) { 823 ret = pca953x_acpi_get_irq(&client->dev); 824 if (ret > 0) 825 client->irq = ret; 826 } 827 828 if (!client->irq) 829 return 0; 830 831 if (irq_base == -1) 832 return 0; 833 834 if (!(chip->driver_data & PCA_INT)) 835 return 0; 836 837 ret = pca953x_read_regs(chip, chip->regs->input, irq_stat); 838 if (ret) 839 return ret; 840 841 /* 842 * There is no way to know which GPIO line generated the 843 * interrupt. We have to rely on the previous read for 844 * this purpose. 845 */ 846 pca953x_read_regs(chip, chip->regs->direction, reg_direction); 847 bitmap_and(chip->irq_stat, irq_stat, reg_direction, chip->gpio_chip.ngpio); 848 mutex_init(&chip->irq_lock); 849 850 irq_chip->name = dev_name(&client->dev); 851 irq_chip->irq_mask = pca953x_irq_mask; 852 irq_chip->irq_unmask = pca953x_irq_unmask; 853 irq_chip->irq_set_wake = pca953x_irq_set_wake; 854 irq_chip->irq_bus_lock = pca953x_irq_bus_lock; 855 irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock; 856 irq_chip->irq_set_type = pca953x_irq_set_type; 857 irq_chip->irq_shutdown = pca953x_irq_shutdown; 858 859 girq = &chip->gpio_chip.irq; 860 girq->chip = irq_chip; 861 /* This will let us handle the parent IRQ in the driver */ 862 girq->parent_handler = NULL; 863 girq->num_parents = 0; 864 girq->parents = NULL; 865 girq->default_type = IRQ_TYPE_NONE; 866 girq->handler = handle_simple_irq; 867 girq->threaded = true; 868 girq->first = irq_base; /* FIXME: get rid of this */ 869 870 ret = devm_request_threaded_irq(&client->dev, client->irq, 871 NULL, pca953x_irq_handler, 872 IRQF_ONESHOT | IRQF_SHARED, 873 dev_name(&client->dev), chip); 874 if (ret) { 875 dev_err(&client->dev, "failed to request irq %d\n", 876 client->irq); 877 return ret; 878 } 879 880 return 0; 881} 882 883#else /* CONFIG_GPIO_PCA953X_IRQ */ 884static int pca953x_irq_setup(struct pca953x_chip *chip, 885 int irq_base) 886{ 887 struct i2c_client *client = chip->client; 888 889 if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT)) 890 dev_warn(&client->dev, "interrupt support not compiled in\n"); 891 892 return 0; 893} 894#endif 895 896static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert) 897{ 898 DECLARE_BITMAP(val, MAX_LINE); 899 u8 regaddr; 900 int ret; 901 902 regaddr = pca953x_recalc_addr(chip, chip->regs->output, 0); 903 ret = regcache_sync_region(chip->regmap, regaddr, 904 regaddr + NBANK(chip) - 1); 905 if (ret) 906 goto out; 907 908 regaddr = pca953x_recalc_addr(chip, chip->regs->direction, 0); 909 ret = regcache_sync_region(chip->regmap, regaddr, 910 regaddr + NBANK(chip) - 1); 911 if (ret) 912 goto out; 913 914 /* set platform specific polarity inversion */ 915 if (invert) 916 bitmap_fill(val, MAX_LINE); 917 else 918 bitmap_zero(val, MAX_LINE); 919 920 ret = pca953x_write_regs(chip, chip->regs->invert, val); 921out: 922 return ret; 923} 924 925static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) 926{ 927 DECLARE_BITMAP(val, MAX_LINE); 928 unsigned int i; 929 int ret; 930 931 ret = device_pca95xx_init(chip, invert); 932 if (ret) 933 goto out; 934 935 /* To enable register 6, 7 to control pull up and pull down */ 936 for (i = 0; i < NBANK(chip); i++) 937 bitmap_set_value8(val, 0x02, i * BANK_SZ); 938 939 ret = pca953x_write_regs(chip, PCA957X_BKEN, val); 940 if (ret) 941 goto out; 942 943 return 0; 944out: 945 return ret; 946} 947 948static int pca953x_probe(struct i2c_client *client, 949 const struct i2c_device_id *i2c_id) 950{ 951 struct pca953x_platform_data *pdata; 952 struct pca953x_chip *chip; 953 int irq_base = 0; 954 int ret; 955 u32 invert = 0; 956 struct regulator *reg; 957 const struct regmap_config *regmap_config; 958 959 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); 960 if (chip == NULL) 961 return -ENOMEM; 962 963 pdata = dev_get_platdata(&client->dev); 964 if (pdata) { 965 irq_base = pdata->irq_base; 966 chip->gpio_start = pdata->gpio_base; 967 invert = pdata->invert; 968 chip->names = pdata->names; 969 } else { 970 struct gpio_desc *reset_gpio; 971 972 chip->gpio_start = -1; 973 irq_base = 0; 974 975 /* 976 * See if we need to de-assert a reset pin. 977 * 978 * There is no known ACPI-enabled platforms that are 979 * using "reset" GPIO. Otherwise any of those platform 980 * must use _DSD method with corresponding property. 981 */ 982 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset", 983 GPIOD_OUT_LOW); 984 if (IS_ERR(reset_gpio)) 985 return PTR_ERR(reset_gpio); 986 } 987 988 chip->client = client; 989 990 reg = devm_regulator_get(&client->dev, "vcc"); 991 if (IS_ERR(reg)) 992 return dev_err_probe(&client->dev, PTR_ERR(reg), "reg get err\n"); 993 994 ret = regulator_enable(reg); 995 if (ret) { 996 dev_err(&client->dev, "reg en err: %d\n", ret); 997 return ret; 998 } 999 chip->regulator = reg; 1000 1001 if (i2c_id) { 1002 chip->driver_data = i2c_id->driver_data; 1003 } else { 1004 const void *match; 1005 1006 match = device_get_match_data(&client->dev); 1007 if (!match) { 1008 ret = -ENODEV; 1009 goto err_exit; 1010 } 1011 1012 chip->driver_data = (uintptr_t)match; 1013 } 1014 1015 i2c_set_clientdata(client, chip); 1016 1017 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); 1018 1019 if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) { 1020 dev_info(&client->dev, "using AI\n"); 1021 regmap_config = &pca953x_ai_i2c_regmap; 1022 } else { 1023 dev_info(&client->dev, "using no AI\n"); 1024 regmap_config = &pca953x_i2c_regmap; 1025 } 1026 1027 chip->regmap = devm_regmap_init_i2c(client, regmap_config); 1028 if (IS_ERR(chip->regmap)) { 1029 ret = PTR_ERR(chip->regmap); 1030 goto err_exit; 1031 } 1032 1033 regcache_mark_dirty(chip->regmap); 1034 1035 mutex_init(&chip->i2c_lock); 1036 /* 1037 * In case we have an i2c-mux controlled by a GPIO provided by an 1038 * expander using the same driver higher on the device tree, read the 1039 * i2c adapter nesting depth and use the retrieved value as lockdep 1040 * subclass for chip->i2c_lock. 1041 * 1042 * REVISIT: This solution is not complete. It protects us from lockdep 1043 * false positives when the expander controlling the i2c-mux is on 1044 * a different level on the device tree, but not when it's on the same 1045 * level on a different branch (in which case the subclass number 1046 * would be the same). 1047 * 1048 * TODO: Once a correct solution is developed, a similar fix should be 1049 * applied to all other i2c-controlled GPIO expanders (and potentially 1050 * regmap-i2c). 1051 */ 1052 lockdep_set_subclass(&chip->i2c_lock, 1053 i2c_adapter_depth(client->adapter)); 1054 1055 /* initialize cached registers from their original values. 1056 * we can't share this chip with another i2c master. 1057 */ 1058 1059 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { 1060 chip->regs = &pca953x_regs; 1061 ret = device_pca95xx_init(chip, invert); 1062 } else { 1063 chip->regs = &pca957x_regs; 1064 ret = device_pca957x_init(chip, invert); 1065 } 1066 if (ret) 1067 goto err_exit; 1068 1069 ret = pca953x_irq_setup(chip, irq_base); 1070 if (ret) 1071 goto err_exit; 1072 1073 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip); 1074 if (ret) 1075 goto err_exit; 1076 1077 if (pdata && pdata->setup) { 1078 ret = pdata->setup(client, chip->gpio_chip.base, 1079 chip->gpio_chip.ngpio, pdata->context); 1080 if (ret < 0) 1081 dev_warn(&client->dev, "setup failed, %d\n", ret); 1082 } 1083 1084 return 0; 1085 1086err_exit: 1087 regulator_disable(chip->regulator); 1088 return ret; 1089} 1090 1091static int pca953x_remove(struct i2c_client *client) 1092{ 1093 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev); 1094 struct pca953x_chip *chip = i2c_get_clientdata(client); 1095 int ret; 1096 1097 if (pdata && pdata->teardown) { 1098 ret = pdata->teardown(client, chip->gpio_chip.base, 1099 chip->gpio_chip.ngpio, pdata->context); 1100 if (ret < 0) 1101 dev_err(&client->dev, "teardown failed, %d\n", ret); 1102 } else { 1103 ret = 0; 1104 } 1105 1106 regulator_disable(chip->regulator); 1107 1108 return ret; 1109} 1110 1111#ifdef CONFIG_PM_SLEEP 1112static int pca953x_regcache_sync(struct device *dev) 1113{ 1114 struct pca953x_chip *chip = dev_get_drvdata(dev); 1115 int ret; 1116 u8 regaddr; 1117 1118 /* 1119 * The ordering between direction and output is important, 1120 * sync these registers first and only then sync the rest. 1121 */ 1122 regaddr = pca953x_recalc_addr(chip, chip->regs->direction, 0); 1123 ret = regcache_sync_region(chip->regmap, regaddr, regaddr + NBANK(chip) - 1); 1124 if (ret) { 1125 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret); 1126 return ret; 1127 } 1128 1129 regaddr = pca953x_recalc_addr(chip, chip->regs->output, 0); 1130 ret = regcache_sync_region(chip->regmap, regaddr, regaddr + NBANK(chip) - 1); 1131 if (ret) { 1132 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret); 1133 return ret; 1134 } 1135 1136#ifdef CONFIG_GPIO_PCA953X_IRQ 1137 if (chip->driver_data & PCA_PCAL) { 1138 regaddr = pca953x_recalc_addr(chip, PCAL953X_IN_LATCH, 0); 1139 ret = regcache_sync_region(chip->regmap, regaddr, 1140 regaddr + NBANK(chip) - 1); 1141 if (ret) { 1142 dev_err(dev, "Failed to sync INT latch registers: %d\n", 1143 ret); 1144 return ret; 1145 } 1146 1147 regaddr = pca953x_recalc_addr(chip, PCAL953X_INT_MASK, 0); 1148 ret = regcache_sync_region(chip->regmap, regaddr, 1149 regaddr + NBANK(chip) - 1); 1150 if (ret) { 1151 dev_err(dev, "Failed to sync INT mask registers: %d\n", 1152 ret); 1153 return ret; 1154 } 1155 } 1156#endif 1157 1158 return 0; 1159} 1160 1161static int pca953x_suspend(struct device *dev) 1162{ 1163 struct pca953x_chip *chip = dev_get_drvdata(dev); 1164 1165 mutex_lock(&chip->i2c_lock); 1166 regcache_cache_only(chip->regmap, true); 1167 mutex_unlock(&chip->i2c_lock); 1168 1169 if (atomic_read(&chip->wakeup_path)) 1170 device_set_wakeup_path(dev); 1171 else 1172 regulator_disable(chip->regulator); 1173 1174 return 0; 1175} 1176 1177static int pca953x_resume(struct device *dev) 1178{ 1179 struct pca953x_chip *chip = dev_get_drvdata(dev); 1180 int ret; 1181 1182 if (!atomic_read(&chip->wakeup_path)) { 1183 ret = regulator_enable(chip->regulator); 1184 if (ret) { 1185 dev_err(dev, "Failed to enable regulator: %d\n", ret); 1186 return 0; 1187 } 1188 } 1189 1190 mutex_lock(&chip->i2c_lock); 1191 regcache_cache_only(chip->regmap, false); 1192 regcache_mark_dirty(chip->regmap); 1193 ret = pca953x_regcache_sync(dev); 1194 if (ret) { 1195 mutex_unlock(&chip->i2c_lock); 1196 return ret; 1197 } 1198 1199 ret = regcache_sync(chip->regmap); 1200 mutex_unlock(&chip->i2c_lock); 1201 if (ret) { 1202 dev_err(dev, "Failed to restore register map: %d\n", ret); 1203 return ret; 1204 } 1205 1206 return 0; 1207} 1208#endif 1209 1210/* convenience to stop overlong match-table lines */ 1211#define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int) 1212#define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int) 1213 1214static const struct of_device_id pca953x_dt_ids[] = { 1215 { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), }, 1216 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), }, 1217 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), }, 1218 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), }, 1219 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), }, 1220 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), }, 1221 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), }, 1222 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), }, 1223 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), }, 1224 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), }, 1225 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), }, 1226 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), }, 1227 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), }, 1228 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), }, 1229 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), }, 1230 1231 { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), }, 1232 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), }, 1233 { .compatible = "nxp,pcal9535", .data = OF_953X(16, PCA_LATCH_INT), }, 1234 { .compatible = "nxp,pcal9554b", .data = OF_953X( 8, PCA_LATCH_INT), }, 1235 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), }, 1236 1237 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), }, 1238 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), }, 1239 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), }, 1240 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), }, 1241 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), }, 1242 1243 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), }, 1244 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), }, 1245 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), }, 1246 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), }, 1247 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), }, 1248 { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), }, 1249 1250 { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), }, 1251 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), }, 1252 { .compatible = "onnn,pca9655", .data = OF_953X(16, PCA_INT), }, 1253 1254 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), }, 1255 { } 1256}; 1257 1258MODULE_DEVICE_TABLE(of, pca953x_dt_ids); 1259 1260static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume); 1261 1262static struct i2c_driver pca953x_driver = { 1263 .driver = { 1264 .name = "pca953x", 1265 .pm = &pca953x_pm_ops, 1266 .of_match_table = pca953x_dt_ids, 1267 .acpi_match_table = pca953x_acpi_ids, 1268 }, 1269 .probe = pca953x_probe, 1270 .remove = pca953x_remove, 1271 .id_table = pca953x_id, 1272}; 1273 1274static int __init pca953x_init(void) 1275{ 1276 return i2c_add_driver(&pca953x_driver); 1277} 1278/* register after i2c postcore initcall and before 1279 * subsys initcalls that may rely on these GPIOs 1280 */ 1281subsys_initcall(pca953x_init); 1282 1283static void __exit pca953x_exit(void) 1284{ 1285 i2c_del_driver(&pca953x_driver); 1286} 1287module_exit(pca953x_exit); 1288 1289MODULE_AUTHOR("eric miao <eric.miao@marvell.com>"); 1290MODULE_DESCRIPTION("GPIO expander driver for PCA953x"); 1291MODULE_LICENSE("GPL"); 1292