18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ci// 38c2ecf20Sopenharmony_ci// Copyright (C) 2018 BayLibre SAS 48c2ecf20Sopenharmony_ci// Author: Bartosz Golaszewski <bgolaszewski@baylibre.com> 58c2ecf20Sopenharmony_ci// 68c2ecf20Sopenharmony_ci// GPIO driver for MAXIM 77650/77651 charger/power-supply. 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#include <linux/gpio/driver.h> 98c2ecf20Sopenharmony_ci#include <linux/i2c.h> 108c2ecf20Sopenharmony_ci#include <linux/mfd/max77650.h> 118c2ecf20Sopenharmony_ci#include <linux/module.h> 128c2ecf20Sopenharmony_ci#include <linux/platform_device.h> 138c2ecf20Sopenharmony_ci#include <linux/regmap.h> 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci#define MAX77650_GPIO_DIR_MASK BIT(0) 168c2ecf20Sopenharmony_ci#define MAX77650_GPIO_INVAL_MASK BIT(1) 178c2ecf20Sopenharmony_ci#define MAX77650_GPIO_DRV_MASK BIT(2) 188c2ecf20Sopenharmony_ci#define MAX77650_GPIO_OUTVAL_MASK BIT(3) 198c2ecf20Sopenharmony_ci#define MAX77650_GPIO_DEBOUNCE_MASK BIT(4) 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci#define MAX77650_GPIO_DIR_OUT 0x00 228c2ecf20Sopenharmony_ci#define MAX77650_GPIO_DIR_IN BIT(0) 238c2ecf20Sopenharmony_ci#define MAX77650_GPIO_OUT_LOW 0x00 248c2ecf20Sopenharmony_ci#define MAX77650_GPIO_OUT_HIGH BIT(3) 258c2ecf20Sopenharmony_ci#define MAX77650_GPIO_DRV_OPEN_DRAIN 0x00 268c2ecf20Sopenharmony_ci#define MAX77650_GPIO_DRV_PUSH_PULL BIT(2) 278c2ecf20Sopenharmony_ci#define MAX77650_GPIO_DEBOUNCE BIT(4) 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci#define MAX77650_GPIO_DIR_BITS(_reg) \ 308c2ecf20Sopenharmony_ci ((_reg) & MAX77650_GPIO_DIR_MASK) 318c2ecf20Sopenharmony_ci#define MAX77650_GPIO_INVAL_BITS(_reg) \ 328c2ecf20Sopenharmony_ci (((_reg) & MAX77650_GPIO_INVAL_MASK) >> 1) 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_cistruct max77650_gpio_chip { 358c2ecf20Sopenharmony_ci struct regmap *map; 368c2ecf20Sopenharmony_ci struct gpio_chip gc; 378c2ecf20Sopenharmony_ci int irq; 388c2ecf20Sopenharmony_ci}; 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_cistatic int max77650_gpio_direction_input(struct gpio_chip *gc, 418c2ecf20Sopenharmony_ci unsigned int offset) 428c2ecf20Sopenharmony_ci{ 438c2ecf20Sopenharmony_ci struct max77650_gpio_chip *chip = gpiochip_get_data(gc); 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci return regmap_update_bits(chip->map, 468c2ecf20Sopenharmony_ci MAX77650_REG_CNFG_GPIO, 478c2ecf20Sopenharmony_ci MAX77650_GPIO_DIR_MASK, 488c2ecf20Sopenharmony_ci MAX77650_GPIO_DIR_IN); 498c2ecf20Sopenharmony_ci} 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_cistatic int max77650_gpio_direction_output(struct gpio_chip *gc, 528c2ecf20Sopenharmony_ci unsigned int offset, int value) 538c2ecf20Sopenharmony_ci{ 548c2ecf20Sopenharmony_ci struct max77650_gpio_chip *chip = gpiochip_get_data(gc); 558c2ecf20Sopenharmony_ci int mask, regval; 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_ci mask = MAX77650_GPIO_DIR_MASK | MAX77650_GPIO_OUTVAL_MASK; 588c2ecf20Sopenharmony_ci regval = value ? MAX77650_GPIO_OUT_HIGH : MAX77650_GPIO_OUT_LOW; 598c2ecf20Sopenharmony_ci regval |= MAX77650_GPIO_DIR_OUT; 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ci return regmap_update_bits(chip->map, 628c2ecf20Sopenharmony_ci MAX77650_REG_CNFG_GPIO, mask, regval); 638c2ecf20Sopenharmony_ci} 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_cistatic void max77650_gpio_set_value(struct gpio_chip *gc, 668c2ecf20Sopenharmony_ci unsigned int offset, int value) 678c2ecf20Sopenharmony_ci{ 688c2ecf20Sopenharmony_ci struct max77650_gpio_chip *chip = gpiochip_get_data(gc); 698c2ecf20Sopenharmony_ci int rv, regval; 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ci regval = value ? MAX77650_GPIO_OUT_HIGH : MAX77650_GPIO_OUT_LOW; 728c2ecf20Sopenharmony_ci 738c2ecf20Sopenharmony_ci rv = regmap_update_bits(chip->map, MAX77650_REG_CNFG_GPIO, 748c2ecf20Sopenharmony_ci MAX77650_GPIO_OUTVAL_MASK, regval); 758c2ecf20Sopenharmony_ci if (rv) 768c2ecf20Sopenharmony_ci dev_err(gc->parent, "cannot set GPIO value: %d\n", rv); 778c2ecf20Sopenharmony_ci} 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_cistatic int max77650_gpio_get_value(struct gpio_chip *gc, 808c2ecf20Sopenharmony_ci unsigned int offset) 818c2ecf20Sopenharmony_ci{ 828c2ecf20Sopenharmony_ci struct max77650_gpio_chip *chip = gpiochip_get_data(gc); 838c2ecf20Sopenharmony_ci unsigned int val; 848c2ecf20Sopenharmony_ci int rv; 858c2ecf20Sopenharmony_ci 868c2ecf20Sopenharmony_ci rv = regmap_read(chip->map, MAX77650_REG_CNFG_GPIO, &val); 878c2ecf20Sopenharmony_ci if (rv) 888c2ecf20Sopenharmony_ci return rv; 898c2ecf20Sopenharmony_ci 908c2ecf20Sopenharmony_ci return MAX77650_GPIO_INVAL_BITS(val); 918c2ecf20Sopenharmony_ci} 928c2ecf20Sopenharmony_ci 938c2ecf20Sopenharmony_cistatic int max77650_gpio_get_direction(struct gpio_chip *gc, 948c2ecf20Sopenharmony_ci unsigned int offset) 958c2ecf20Sopenharmony_ci{ 968c2ecf20Sopenharmony_ci struct max77650_gpio_chip *chip = gpiochip_get_data(gc); 978c2ecf20Sopenharmony_ci unsigned int val; 988c2ecf20Sopenharmony_ci int rv; 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_ci rv = regmap_read(chip->map, MAX77650_REG_CNFG_GPIO, &val); 1018c2ecf20Sopenharmony_ci if (rv) 1028c2ecf20Sopenharmony_ci return rv; 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ci return MAX77650_GPIO_DIR_BITS(val); 1058c2ecf20Sopenharmony_ci} 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_cistatic int max77650_gpio_set_config(struct gpio_chip *gc, 1088c2ecf20Sopenharmony_ci unsigned int offset, unsigned long cfg) 1098c2ecf20Sopenharmony_ci{ 1108c2ecf20Sopenharmony_ci struct max77650_gpio_chip *chip = gpiochip_get_data(gc); 1118c2ecf20Sopenharmony_ci 1128c2ecf20Sopenharmony_ci switch (pinconf_to_config_param(cfg)) { 1138c2ecf20Sopenharmony_ci case PIN_CONFIG_DRIVE_OPEN_DRAIN: 1148c2ecf20Sopenharmony_ci return regmap_update_bits(chip->map, 1158c2ecf20Sopenharmony_ci MAX77650_REG_CNFG_GPIO, 1168c2ecf20Sopenharmony_ci MAX77650_GPIO_DRV_MASK, 1178c2ecf20Sopenharmony_ci MAX77650_GPIO_DRV_OPEN_DRAIN); 1188c2ecf20Sopenharmony_ci case PIN_CONFIG_DRIVE_PUSH_PULL: 1198c2ecf20Sopenharmony_ci return regmap_update_bits(chip->map, 1208c2ecf20Sopenharmony_ci MAX77650_REG_CNFG_GPIO, 1218c2ecf20Sopenharmony_ci MAX77650_GPIO_DRV_MASK, 1228c2ecf20Sopenharmony_ci MAX77650_GPIO_DRV_PUSH_PULL); 1238c2ecf20Sopenharmony_ci case PIN_CONFIG_INPUT_DEBOUNCE: 1248c2ecf20Sopenharmony_ci return regmap_update_bits(chip->map, 1258c2ecf20Sopenharmony_ci MAX77650_REG_CNFG_GPIO, 1268c2ecf20Sopenharmony_ci MAX77650_GPIO_DEBOUNCE_MASK, 1278c2ecf20Sopenharmony_ci MAX77650_GPIO_DEBOUNCE); 1288c2ecf20Sopenharmony_ci default: 1298c2ecf20Sopenharmony_ci return -ENOTSUPP; 1308c2ecf20Sopenharmony_ci } 1318c2ecf20Sopenharmony_ci} 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_cistatic int max77650_gpio_to_irq(struct gpio_chip *gc, unsigned int offset) 1348c2ecf20Sopenharmony_ci{ 1358c2ecf20Sopenharmony_ci struct max77650_gpio_chip *chip = gpiochip_get_data(gc); 1368c2ecf20Sopenharmony_ci 1378c2ecf20Sopenharmony_ci return chip->irq; 1388c2ecf20Sopenharmony_ci} 1398c2ecf20Sopenharmony_ci 1408c2ecf20Sopenharmony_cistatic int max77650_gpio_probe(struct platform_device *pdev) 1418c2ecf20Sopenharmony_ci{ 1428c2ecf20Sopenharmony_ci struct max77650_gpio_chip *chip; 1438c2ecf20Sopenharmony_ci struct device *dev, *parent; 1448c2ecf20Sopenharmony_ci struct i2c_client *i2c; 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_ci dev = &pdev->dev; 1478c2ecf20Sopenharmony_ci parent = dev->parent; 1488c2ecf20Sopenharmony_ci i2c = to_i2c_client(parent); 1498c2ecf20Sopenharmony_ci 1508c2ecf20Sopenharmony_ci chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); 1518c2ecf20Sopenharmony_ci if (!chip) 1528c2ecf20Sopenharmony_ci return -ENOMEM; 1538c2ecf20Sopenharmony_ci 1548c2ecf20Sopenharmony_ci chip->map = dev_get_regmap(parent, NULL); 1558c2ecf20Sopenharmony_ci if (!chip->map) 1568c2ecf20Sopenharmony_ci return -ENODEV; 1578c2ecf20Sopenharmony_ci 1588c2ecf20Sopenharmony_ci chip->irq = platform_get_irq_byname(pdev, "GPI"); 1598c2ecf20Sopenharmony_ci if (chip->irq < 0) 1608c2ecf20Sopenharmony_ci return chip->irq; 1618c2ecf20Sopenharmony_ci 1628c2ecf20Sopenharmony_ci chip->gc.base = -1; 1638c2ecf20Sopenharmony_ci chip->gc.ngpio = 1; 1648c2ecf20Sopenharmony_ci chip->gc.label = i2c->name; 1658c2ecf20Sopenharmony_ci chip->gc.parent = dev; 1668c2ecf20Sopenharmony_ci chip->gc.owner = THIS_MODULE; 1678c2ecf20Sopenharmony_ci chip->gc.can_sleep = true; 1688c2ecf20Sopenharmony_ci 1698c2ecf20Sopenharmony_ci chip->gc.direction_input = max77650_gpio_direction_input; 1708c2ecf20Sopenharmony_ci chip->gc.direction_output = max77650_gpio_direction_output; 1718c2ecf20Sopenharmony_ci chip->gc.set = max77650_gpio_set_value; 1728c2ecf20Sopenharmony_ci chip->gc.get = max77650_gpio_get_value; 1738c2ecf20Sopenharmony_ci chip->gc.get_direction = max77650_gpio_get_direction; 1748c2ecf20Sopenharmony_ci chip->gc.set_config = max77650_gpio_set_config; 1758c2ecf20Sopenharmony_ci chip->gc.to_irq = max77650_gpio_to_irq; 1768c2ecf20Sopenharmony_ci 1778c2ecf20Sopenharmony_ci return devm_gpiochip_add_data(dev, &chip->gc, chip); 1788c2ecf20Sopenharmony_ci} 1798c2ecf20Sopenharmony_ci 1808c2ecf20Sopenharmony_cistatic struct platform_driver max77650_gpio_driver = { 1818c2ecf20Sopenharmony_ci .driver = { 1828c2ecf20Sopenharmony_ci .name = "max77650-gpio", 1838c2ecf20Sopenharmony_ci }, 1848c2ecf20Sopenharmony_ci .probe = max77650_gpio_probe, 1858c2ecf20Sopenharmony_ci}; 1868c2ecf20Sopenharmony_cimodule_platform_driver(max77650_gpio_driver); 1878c2ecf20Sopenharmony_ci 1888c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("MAXIM 77650/77651 GPIO driver"); 1898c2ecf20Sopenharmony_ciMODULE_AUTHOR("Bartosz Golaszewski <bgolaszewski@baylibre.com>"); 1908c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL v2"); 1918c2ecf20Sopenharmony_ciMODULE_ALIAS("platform:max77650-gpio"); 192