18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Janz MODULbus VMOD-TTL GPIO Driver 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu> 68c2ecf20Sopenharmony_ci */ 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#include <linux/kernel.h> 98c2ecf20Sopenharmony_ci#include <linux/module.h> 108c2ecf20Sopenharmony_ci#include <linux/init.h> 118c2ecf20Sopenharmony_ci#include <linux/interrupt.h> 128c2ecf20Sopenharmony_ci#include <linux/delay.h> 138c2ecf20Sopenharmony_ci#include <linux/platform_device.h> 148c2ecf20Sopenharmony_ci#include <linux/io.h> 158c2ecf20Sopenharmony_ci#include <linux/gpio/driver.h> 168c2ecf20Sopenharmony_ci#include <linux/slab.h> 178c2ecf20Sopenharmony_ci#include <linux/bitops.h> 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci#include <linux/mfd/janz.h> 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci#define DRV_NAME "janz-ttl" 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci#define PORTA_DIRECTION 0x23 248c2ecf20Sopenharmony_ci#define PORTB_DIRECTION 0x2B 258c2ecf20Sopenharmony_ci#define PORTC_DIRECTION 0x06 268c2ecf20Sopenharmony_ci#define PORTA_IOCTL 0x24 278c2ecf20Sopenharmony_ci#define PORTB_IOCTL 0x2C 288c2ecf20Sopenharmony_ci#define PORTC_IOCTL 0x07 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci#define MASTER_INT_CTL 0x00 318c2ecf20Sopenharmony_ci#define MASTER_CONF_CTL 0x01 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci#define CONF_PAE BIT(2) 348c2ecf20Sopenharmony_ci#define CONF_PBE BIT(7) 358c2ecf20Sopenharmony_ci#define CONF_PCE BIT(4) 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_cistruct ttl_control_regs { 388c2ecf20Sopenharmony_ci __be16 portc; 398c2ecf20Sopenharmony_ci __be16 portb; 408c2ecf20Sopenharmony_ci __be16 porta; 418c2ecf20Sopenharmony_ci __be16 control; 428c2ecf20Sopenharmony_ci}; 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_cistruct ttl_module { 458c2ecf20Sopenharmony_ci struct gpio_chip gpio; 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci /* base address of registers */ 488c2ecf20Sopenharmony_ci struct ttl_control_regs __iomem *regs; 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci u8 portc_shadow; 518c2ecf20Sopenharmony_ci u8 portb_shadow; 528c2ecf20Sopenharmony_ci u8 porta_shadow; 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci spinlock_t lock; 558c2ecf20Sopenharmony_ci}; 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_cistatic int ttl_get_value(struct gpio_chip *gpio, unsigned offset) 588c2ecf20Sopenharmony_ci{ 598c2ecf20Sopenharmony_ci struct ttl_module *mod = dev_get_drvdata(gpio->parent); 608c2ecf20Sopenharmony_ci u8 *shadow; 618c2ecf20Sopenharmony_ci int ret; 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci if (offset < 8) { 648c2ecf20Sopenharmony_ci shadow = &mod->porta_shadow; 658c2ecf20Sopenharmony_ci } else if (offset < 16) { 668c2ecf20Sopenharmony_ci shadow = &mod->portb_shadow; 678c2ecf20Sopenharmony_ci offset -= 8; 688c2ecf20Sopenharmony_ci } else { 698c2ecf20Sopenharmony_ci shadow = &mod->portc_shadow; 708c2ecf20Sopenharmony_ci offset -= 16; 718c2ecf20Sopenharmony_ci } 728c2ecf20Sopenharmony_ci 738c2ecf20Sopenharmony_ci spin_lock(&mod->lock); 748c2ecf20Sopenharmony_ci ret = *shadow & BIT(offset); 758c2ecf20Sopenharmony_ci spin_unlock(&mod->lock); 768c2ecf20Sopenharmony_ci return !!ret; 778c2ecf20Sopenharmony_ci} 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_cistatic void ttl_set_value(struct gpio_chip *gpio, unsigned offset, int value) 808c2ecf20Sopenharmony_ci{ 818c2ecf20Sopenharmony_ci struct ttl_module *mod = dev_get_drvdata(gpio->parent); 828c2ecf20Sopenharmony_ci void __iomem *port; 838c2ecf20Sopenharmony_ci u8 *shadow; 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_ci if (offset < 8) { 868c2ecf20Sopenharmony_ci port = &mod->regs->porta; 878c2ecf20Sopenharmony_ci shadow = &mod->porta_shadow; 888c2ecf20Sopenharmony_ci } else if (offset < 16) { 898c2ecf20Sopenharmony_ci port = &mod->regs->portb; 908c2ecf20Sopenharmony_ci shadow = &mod->portb_shadow; 918c2ecf20Sopenharmony_ci offset -= 8; 928c2ecf20Sopenharmony_ci } else { 938c2ecf20Sopenharmony_ci port = &mod->regs->portc; 948c2ecf20Sopenharmony_ci shadow = &mod->portc_shadow; 958c2ecf20Sopenharmony_ci offset -= 16; 968c2ecf20Sopenharmony_ci } 978c2ecf20Sopenharmony_ci 988c2ecf20Sopenharmony_ci spin_lock(&mod->lock); 998c2ecf20Sopenharmony_ci if (value) 1008c2ecf20Sopenharmony_ci *shadow |= BIT(offset); 1018c2ecf20Sopenharmony_ci else 1028c2ecf20Sopenharmony_ci *shadow &= ~BIT(offset); 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ci iowrite16be(*shadow, port); 1058c2ecf20Sopenharmony_ci spin_unlock(&mod->lock); 1068c2ecf20Sopenharmony_ci} 1078c2ecf20Sopenharmony_ci 1088c2ecf20Sopenharmony_cistatic void ttl_write_reg(struct ttl_module *mod, u8 reg, u16 val) 1098c2ecf20Sopenharmony_ci{ 1108c2ecf20Sopenharmony_ci iowrite16be(reg, &mod->regs->control); 1118c2ecf20Sopenharmony_ci iowrite16be(val, &mod->regs->control); 1128c2ecf20Sopenharmony_ci} 1138c2ecf20Sopenharmony_ci 1148c2ecf20Sopenharmony_cistatic void ttl_setup_device(struct ttl_module *mod) 1158c2ecf20Sopenharmony_ci{ 1168c2ecf20Sopenharmony_ci /* reset the device to a known state */ 1178c2ecf20Sopenharmony_ci iowrite16be(0x0000, &mod->regs->control); 1188c2ecf20Sopenharmony_ci iowrite16be(0x0001, &mod->regs->control); 1198c2ecf20Sopenharmony_ci iowrite16be(0x0000, &mod->regs->control); 1208c2ecf20Sopenharmony_ci 1218c2ecf20Sopenharmony_ci /* put all ports in open-drain mode */ 1228c2ecf20Sopenharmony_ci ttl_write_reg(mod, PORTA_IOCTL, 0x00ff); 1238c2ecf20Sopenharmony_ci ttl_write_reg(mod, PORTB_IOCTL, 0x00ff); 1248c2ecf20Sopenharmony_ci ttl_write_reg(mod, PORTC_IOCTL, 0x000f); 1258c2ecf20Sopenharmony_ci 1268c2ecf20Sopenharmony_ci /* set all ports as outputs */ 1278c2ecf20Sopenharmony_ci ttl_write_reg(mod, PORTA_DIRECTION, 0x0000); 1288c2ecf20Sopenharmony_ci ttl_write_reg(mod, PORTB_DIRECTION, 0x0000); 1298c2ecf20Sopenharmony_ci ttl_write_reg(mod, PORTC_DIRECTION, 0x0000); 1308c2ecf20Sopenharmony_ci 1318c2ecf20Sopenharmony_ci /* set all ports to drive zeroes */ 1328c2ecf20Sopenharmony_ci iowrite16be(0x0000, &mod->regs->porta); 1338c2ecf20Sopenharmony_ci iowrite16be(0x0000, &mod->regs->portb); 1348c2ecf20Sopenharmony_ci iowrite16be(0x0000, &mod->regs->portc); 1358c2ecf20Sopenharmony_ci 1368c2ecf20Sopenharmony_ci /* enable all ports */ 1378c2ecf20Sopenharmony_ci ttl_write_reg(mod, MASTER_CONF_CTL, CONF_PAE | CONF_PBE | CONF_PCE); 1388c2ecf20Sopenharmony_ci} 1398c2ecf20Sopenharmony_ci 1408c2ecf20Sopenharmony_cistatic int ttl_probe(struct platform_device *pdev) 1418c2ecf20Sopenharmony_ci{ 1428c2ecf20Sopenharmony_ci struct janz_platform_data *pdata; 1438c2ecf20Sopenharmony_ci struct ttl_module *mod; 1448c2ecf20Sopenharmony_ci struct gpio_chip *gpio; 1458c2ecf20Sopenharmony_ci int ret; 1468c2ecf20Sopenharmony_ci 1478c2ecf20Sopenharmony_ci pdata = dev_get_platdata(&pdev->dev); 1488c2ecf20Sopenharmony_ci if (!pdata) { 1498c2ecf20Sopenharmony_ci dev_err(&pdev->dev, "no platform data\n"); 1508c2ecf20Sopenharmony_ci return -ENXIO; 1518c2ecf20Sopenharmony_ci } 1528c2ecf20Sopenharmony_ci 1538c2ecf20Sopenharmony_ci mod = devm_kzalloc(&pdev->dev, sizeof(*mod), GFP_KERNEL); 1548c2ecf20Sopenharmony_ci if (!mod) 1558c2ecf20Sopenharmony_ci return -ENOMEM; 1568c2ecf20Sopenharmony_ci 1578c2ecf20Sopenharmony_ci platform_set_drvdata(pdev, mod); 1588c2ecf20Sopenharmony_ci spin_lock_init(&mod->lock); 1598c2ecf20Sopenharmony_ci 1608c2ecf20Sopenharmony_ci /* get access to the MODULbus registers for this module */ 1618c2ecf20Sopenharmony_ci mod->regs = devm_platform_ioremap_resource(pdev, 0); 1628c2ecf20Sopenharmony_ci if (IS_ERR(mod->regs)) 1638c2ecf20Sopenharmony_ci return PTR_ERR(mod->regs); 1648c2ecf20Sopenharmony_ci 1658c2ecf20Sopenharmony_ci ttl_setup_device(mod); 1668c2ecf20Sopenharmony_ci 1678c2ecf20Sopenharmony_ci /* Initialize the GPIO data structures */ 1688c2ecf20Sopenharmony_ci gpio = &mod->gpio; 1698c2ecf20Sopenharmony_ci gpio->parent = &pdev->dev; 1708c2ecf20Sopenharmony_ci gpio->label = pdev->name; 1718c2ecf20Sopenharmony_ci gpio->get = ttl_get_value; 1728c2ecf20Sopenharmony_ci gpio->set = ttl_set_value; 1738c2ecf20Sopenharmony_ci gpio->owner = THIS_MODULE; 1748c2ecf20Sopenharmony_ci 1758c2ecf20Sopenharmony_ci /* request dynamic allocation */ 1768c2ecf20Sopenharmony_ci gpio->base = -1; 1778c2ecf20Sopenharmony_ci gpio->ngpio = 20; 1788c2ecf20Sopenharmony_ci 1798c2ecf20Sopenharmony_ci ret = devm_gpiochip_add_data(&pdev->dev, gpio, NULL); 1808c2ecf20Sopenharmony_ci if (ret) { 1818c2ecf20Sopenharmony_ci dev_err(&pdev->dev, "unable to add GPIO chip\n"); 1828c2ecf20Sopenharmony_ci return ret; 1838c2ecf20Sopenharmony_ci } 1848c2ecf20Sopenharmony_ci 1858c2ecf20Sopenharmony_ci return 0; 1868c2ecf20Sopenharmony_ci} 1878c2ecf20Sopenharmony_ci 1888c2ecf20Sopenharmony_cistatic struct platform_driver ttl_driver = { 1898c2ecf20Sopenharmony_ci .driver = { 1908c2ecf20Sopenharmony_ci .name = DRV_NAME, 1918c2ecf20Sopenharmony_ci }, 1928c2ecf20Sopenharmony_ci .probe = ttl_probe, 1938c2ecf20Sopenharmony_ci}; 1948c2ecf20Sopenharmony_ci 1958c2ecf20Sopenharmony_cimodule_platform_driver(ttl_driver); 1968c2ecf20Sopenharmony_ci 1978c2ecf20Sopenharmony_ciMODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>"); 1988c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("Janz MODULbus VMOD-TTL Driver"); 1998c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL"); 2008c2ecf20Sopenharmony_ciMODULE_ALIAS("platform:janz-ttl"); 201