18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Minimalist driver for a generic PCI-to-EISA bridge. 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * (C) 2003 Marc Zyngier <maz@wild-wind.fr.eu.org> 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * Ivan Kokshaysky <ink@jurassic.park.msu.ru> : 88c2ecf20Sopenharmony_ci * Generalisation from i82375 to PCI_CLASS_BRIDGE_EISA. 98c2ecf20Sopenharmony_ci */ 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci#include <linux/kernel.h> 128c2ecf20Sopenharmony_ci#include <linux/device.h> 138c2ecf20Sopenharmony_ci#include <linux/eisa.h> 148c2ecf20Sopenharmony_ci#include <linux/pci.h> 158c2ecf20Sopenharmony_ci#include <linux/module.h> 168c2ecf20Sopenharmony_ci#include <linux/init.h> 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci/* There is only *one* pci_eisa device per machine, right ? */ 198c2ecf20Sopenharmony_cistatic struct eisa_root_device pci_eisa_root; 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_cistatic int __init pci_eisa_init(struct pci_dev *pdev) 228c2ecf20Sopenharmony_ci{ 238c2ecf20Sopenharmony_ci int rc, i; 248c2ecf20Sopenharmony_ci struct resource *res, *bus_res = NULL; 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci if ((rc = pci_enable_device (pdev))) { 278c2ecf20Sopenharmony_ci dev_err(&pdev->dev, "Could not enable device\n"); 288c2ecf20Sopenharmony_ci return rc; 298c2ecf20Sopenharmony_ci } 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci /* 328c2ecf20Sopenharmony_ci * The Intel 82375 PCI-EISA bridge is a subtractive-decode PCI 338c2ecf20Sopenharmony_ci * device, so the resources available on EISA are the same as those 348c2ecf20Sopenharmony_ci * available on the 82375 bus. This works the same as a PCI-PCI 358c2ecf20Sopenharmony_ci * bridge in subtractive-decode mode (see pci_read_bridge_bases()). 368c2ecf20Sopenharmony_ci * We assume other PCI-EISA bridges are similar. 378c2ecf20Sopenharmony_ci * 388c2ecf20Sopenharmony_ci * eisa_root_register() can only deal with a single io port resource, 398c2ecf20Sopenharmony_ci * so we use the first valid io port resource. 408c2ecf20Sopenharmony_ci */ 418c2ecf20Sopenharmony_ci pci_bus_for_each_resource(pdev->bus, res, i) 428c2ecf20Sopenharmony_ci if (res && (res->flags & IORESOURCE_IO)) { 438c2ecf20Sopenharmony_ci bus_res = res; 448c2ecf20Sopenharmony_ci break; 458c2ecf20Sopenharmony_ci } 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci if (!bus_res) { 488c2ecf20Sopenharmony_ci dev_err(&pdev->dev, "No resources available\n"); 498c2ecf20Sopenharmony_ci return -1; 508c2ecf20Sopenharmony_ci } 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci pci_eisa_root.dev = &pdev->dev; 538c2ecf20Sopenharmony_ci pci_eisa_root.res = bus_res; 548c2ecf20Sopenharmony_ci pci_eisa_root.bus_base_addr = bus_res->start; 558c2ecf20Sopenharmony_ci pci_eisa_root.slots = EISA_MAX_SLOTS; 568c2ecf20Sopenharmony_ci pci_eisa_root.dma_mask = pdev->dma_mask; 578c2ecf20Sopenharmony_ci dev_set_drvdata(pci_eisa_root.dev, &pci_eisa_root); 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ci if (eisa_root_register (&pci_eisa_root)) { 608c2ecf20Sopenharmony_ci dev_err(&pdev->dev, "Could not register EISA root\n"); 618c2ecf20Sopenharmony_ci return -1; 628c2ecf20Sopenharmony_ci } 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci return 0; 658c2ecf20Sopenharmony_ci} 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ci/* 688c2ecf20Sopenharmony_ci * We have to call pci_eisa_init_early() before pnpacpi_init()/isapnp_init(). 698c2ecf20Sopenharmony_ci * Otherwise pnp resource will get enabled early and could prevent eisa 708c2ecf20Sopenharmony_ci * to be initialized. 718c2ecf20Sopenharmony_ci * Also need to make sure pci_eisa_init_early() is called after 728c2ecf20Sopenharmony_ci * x86/pci_subsys_init(). 738c2ecf20Sopenharmony_ci * So need to use subsys_initcall_sync with it. 748c2ecf20Sopenharmony_ci */ 758c2ecf20Sopenharmony_cistatic int __init pci_eisa_init_early(void) 768c2ecf20Sopenharmony_ci{ 778c2ecf20Sopenharmony_ci struct pci_dev *dev = NULL; 788c2ecf20Sopenharmony_ci int ret; 798c2ecf20Sopenharmony_ci 808c2ecf20Sopenharmony_ci for_each_pci_dev(dev) 818c2ecf20Sopenharmony_ci if ((dev->class >> 8) == PCI_CLASS_BRIDGE_EISA) { 828c2ecf20Sopenharmony_ci ret = pci_eisa_init(dev); 838c2ecf20Sopenharmony_ci if (ret) 848c2ecf20Sopenharmony_ci return ret; 858c2ecf20Sopenharmony_ci } 868c2ecf20Sopenharmony_ci 878c2ecf20Sopenharmony_ci return 0; 888c2ecf20Sopenharmony_ci} 898c2ecf20Sopenharmony_cisubsys_initcall_sync(pci_eisa_init_early); 90