18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Driver for the Synopsys DesignWare DMA Controller
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright (C) 2013 Intel Corporation
68c2ecf20Sopenharmony_ci */
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci#ifndef _DMA_DW_INTERNAL_H
98c2ecf20Sopenharmony_ci#define _DMA_DW_INTERNAL_H
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci#include <linux/dma/dw.h>
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ci#include "regs.h"
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ciint do_dma_probe(struct dw_dma_chip *chip);
168c2ecf20Sopenharmony_ciint do_dma_remove(struct dw_dma_chip *chip);
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_civoid do_dw_dma_on(struct dw_dma *dw);
198c2ecf20Sopenharmony_civoid do_dw_dma_off(struct dw_dma *dw);
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ciint do_dw_dma_disable(struct dw_dma_chip *chip);
228c2ecf20Sopenharmony_ciint do_dw_dma_enable(struct dw_dma_chip *chip);
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ciextern bool dw_dma_filter(struct dma_chan *chan, void *param);
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci#ifdef CONFIG_ACPI
278c2ecf20Sopenharmony_civoid dw_dma_acpi_controller_register(struct dw_dma *dw);
288c2ecf20Sopenharmony_civoid dw_dma_acpi_controller_free(struct dw_dma *dw);
298c2ecf20Sopenharmony_ci#else /* !CONFIG_ACPI */
308c2ecf20Sopenharmony_cistatic inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
318c2ecf20Sopenharmony_cistatic inline void dw_dma_acpi_controller_free(struct dw_dma *dw) {}
328c2ecf20Sopenharmony_ci#endif /* !CONFIG_ACPI */
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_cistruct platform_device;
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ci#ifdef CONFIG_OF
378c2ecf20Sopenharmony_cistruct dw_dma_platform_data *dw_dma_parse_dt(struct platform_device *pdev);
388c2ecf20Sopenharmony_civoid dw_dma_of_controller_register(struct dw_dma *dw);
398c2ecf20Sopenharmony_civoid dw_dma_of_controller_free(struct dw_dma *dw);
408c2ecf20Sopenharmony_ci#else
418c2ecf20Sopenharmony_cistatic inline struct dw_dma_platform_data *dw_dma_parse_dt(struct platform_device *pdev)
428c2ecf20Sopenharmony_ci{
438c2ecf20Sopenharmony_ci	return NULL;
448c2ecf20Sopenharmony_ci}
458c2ecf20Sopenharmony_cistatic inline void dw_dma_of_controller_register(struct dw_dma *dw) {}
468c2ecf20Sopenharmony_cistatic inline void dw_dma_of_controller_free(struct dw_dma *dw) {}
478c2ecf20Sopenharmony_ci#endif
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_cistruct dw_dma_chip_pdata {
508c2ecf20Sopenharmony_ci	const struct dw_dma_platform_data *pdata;
518c2ecf20Sopenharmony_ci	int (*probe)(struct dw_dma_chip *chip);
528c2ecf20Sopenharmony_ci	int (*remove)(struct dw_dma_chip *chip);
538c2ecf20Sopenharmony_ci	struct dw_dma_chip *chip;
548c2ecf20Sopenharmony_ci};
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_cistatic __maybe_unused const struct dw_dma_chip_pdata dw_dma_chip_pdata = {
578c2ecf20Sopenharmony_ci	.probe = dw_dma_probe,
588c2ecf20Sopenharmony_ci	.remove = dw_dma_remove,
598c2ecf20Sopenharmony_ci};
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_cistatic const struct dw_dma_platform_data idma32_pdata = {
628c2ecf20Sopenharmony_ci	.nr_channels = 8,
638c2ecf20Sopenharmony_ci	.chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
648c2ecf20Sopenharmony_ci	.chan_priority = CHAN_PRIORITY_ASCENDING,
658c2ecf20Sopenharmony_ci	.block_size = 131071,
668c2ecf20Sopenharmony_ci	.nr_masters = 1,
678c2ecf20Sopenharmony_ci	.data_width = {4},
688c2ecf20Sopenharmony_ci	.multi_block = {1, 1, 1, 1, 1, 1, 1, 1},
698c2ecf20Sopenharmony_ci};
708c2ecf20Sopenharmony_ci
718c2ecf20Sopenharmony_cistatic __maybe_unused const struct dw_dma_chip_pdata idma32_chip_pdata = {
728c2ecf20Sopenharmony_ci	.pdata = &idma32_pdata,
738c2ecf20Sopenharmony_ci	.probe = idma32_dma_probe,
748c2ecf20Sopenharmony_ci	.remove = idma32_dma_remove,
758c2ecf20Sopenharmony_ci};
768c2ecf20Sopenharmony_ci
778c2ecf20Sopenharmony_ci#endif /* _DMA_DW_INTERNAL_H */
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