18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_cimenuconfig PM_DEVFREQ 38c2ecf20Sopenharmony_ci bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support" 48c2ecf20Sopenharmony_ci select SRCU 58c2ecf20Sopenharmony_ci select PM_OPP 68c2ecf20Sopenharmony_ci help 78c2ecf20Sopenharmony_ci A device may have a list of frequencies and voltages available. 88c2ecf20Sopenharmony_ci devfreq, a generic DVFS framework can be registered for a device 98c2ecf20Sopenharmony_ci in order to let the governor provided to devfreq choose an 108c2ecf20Sopenharmony_ci operating frequency based on the device driver's policy. 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci Each device may have its own governor and policy. Devfreq can 138c2ecf20Sopenharmony_ci reevaluate the device state periodically and/or based on the 148c2ecf20Sopenharmony_ci notification to "nb", a notifier block, of devfreq. 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci Like some CPUs with CPUfreq, a device may have multiple clocks. 178c2ecf20Sopenharmony_ci However, because the clock frequencies of a single device are 188c2ecf20Sopenharmony_ci determined by the single device's state, an instance of devfreq 198c2ecf20Sopenharmony_ci is attached to a single device and returns a "representative" 208c2ecf20Sopenharmony_ci clock frequency of the device, which is also attached 218c2ecf20Sopenharmony_ci to a device by 1-to-1. The device registering devfreq takes the 228c2ecf20Sopenharmony_ci responsibility to "interpret" the representative frequency and 238c2ecf20Sopenharmony_ci to set its every clock accordingly with the "target" callback 248c2ecf20Sopenharmony_ci given to devfreq. 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci When OPP is used with the devfreq device, it is recommended to 278c2ecf20Sopenharmony_ci register devfreq's nb to the OPP's notifier head. If OPP is 288c2ecf20Sopenharmony_ci used with the devfreq device, you may use OPP helper 298c2ecf20Sopenharmony_ci functions defined in devfreq.h. 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ciif PM_DEVFREQ 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_cicomment "DEVFREQ Governors" 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ciconfig DEVFREQ_GOV_SIMPLE_ONDEMAND 368c2ecf20Sopenharmony_ci tristate "Simple Ondemand" 378c2ecf20Sopenharmony_ci help 388c2ecf20Sopenharmony_ci Chooses frequency based on the recent load on the device. Works 398c2ecf20Sopenharmony_ci similar as ONDEMAND governor of CPUFREQ does. A device with 408c2ecf20Sopenharmony_ci Simple-Ondemand should be able to provide busy/total counter 418c2ecf20Sopenharmony_ci values that imply the usage rate. A device may provide tuned 428c2ecf20Sopenharmony_ci values to the governor with data field at devfreq_add_device(). 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_ciconfig DEVFREQ_GOV_PERFORMANCE 458c2ecf20Sopenharmony_ci tristate "Performance" 468c2ecf20Sopenharmony_ci help 478c2ecf20Sopenharmony_ci Sets the frequency at the maximum available frequency. 488c2ecf20Sopenharmony_ci This governor always returns UINT_MAX as frequency so that 498c2ecf20Sopenharmony_ci the DEVFREQ framework returns the highest frequency available 508c2ecf20Sopenharmony_ci at any time. 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ciconfig DEVFREQ_GOV_POWERSAVE 538c2ecf20Sopenharmony_ci tristate "Powersave" 548c2ecf20Sopenharmony_ci help 558c2ecf20Sopenharmony_ci Sets the frequency at the minimum available frequency. 568c2ecf20Sopenharmony_ci This governor always returns 0 as frequency so that 578c2ecf20Sopenharmony_ci the DEVFREQ framework returns the lowest frequency available 588c2ecf20Sopenharmony_ci at any time. 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ciconfig DEVFREQ_GOV_USERSPACE 618c2ecf20Sopenharmony_ci tristate "Userspace" 628c2ecf20Sopenharmony_ci help 638c2ecf20Sopenharmony_ci Sets the frequency at the user specified one. 648c2ecf20Sopenharmony_ci This governor returns the user configured frequency if there 658c2ecf20Sopenharmony_ci has been an input to /sys/devices/.../power/devfreq_set_freq. 668c2ecf20Sopenharmony_ci Otherwise, the governor does not change the frequency 678c2ecf20Sopenharmony_ci given at the initialization. 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ciconfig DEVFREQ_GOV_PASSIVE 708c2ecf20Sopenharmony_ci tristate "Passive" 718c2ecf20Sopenharmony_ci help 728c2ecf20Sopenharmony_ci Sets the frequency based on the frequency of its parent devfreq 738c2ecf20Sopenharmony_ci device. This governor does not change the frequency by itself 748c2ecf20Sopenharmony_ci through sysfs entries. The passive governor recommends that 758c2ecf20Sopenharmony_ci devfreq device uses the OPP table to get the frequency/voltage. 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_cicomment "DEVFREQ Drivers" 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_ciconfig ARM_EXYNOS_BUS_DEVFREQ 808c2ecf20Sopenharmony_ci tristate "ARM Exynos Generic Memory Bus DEVFREQ Driver" 818c2ecf20Sopenharmony_ci depends on ARCH_EXYNOS || COMPILE_TEST 828c2ecf20Sopenharmony_ci select DEVFREQ_GOV_SIMPLE_ONDEMAND 838c2ecf20Sopenharmony_ci select DEVFREQ_GOV_PASSIVE 848c2ecf20Sopenharmony_ci select DEVFREQ_EVENT_EXYNOS_PPMU 858c2ecf20Sopenharmony_ci select PM_DEVFREQ_EVENT 868c2ecf20Sopenharmony_ci help 878c2ecf20Sopenharmony_ci This adds the common DEVFREQ driver for Exynos Memory bus. Exynos 888c2ecf20Sopenharmony_ci Memory bus has one more group of memory bus (e.g, MIF and INT block). 898c2ecf20Sopenharmony_ci Each memory bus group could contain many memoby bus block. It reads 908c2ecf20Sopenharmony_ci PPMU counters of memory controllers by using DEVFREQ-event device 918c2ecf20Sopenharmony_ci and adjusts the operating frequencies and voltages with OPP support. 928c2ecf20Sopenharmony_ci This does not yet operate with optimal voltages. 938c2ecf20Sopenharmony_ci 948c2ecf20Sopenharmony_ciconfig ARM_IMX_BUS_DEVFREQ 958c2ecf20Sopenharmony_ci tristate "i.MX Generic Bus DEVFREQ Driver" 968c2ecf20Sopenharmony_ci depends on ARCH_MXC || COMPILE_TEST 978c2ecf20Sopenharmony_ci select DEVFREQ_GOV_USERSPACE 988c2ecf20Sopenharmony_ci help 998c2ecf20Sopenharmony_ci This adds the generic DEVFREQ driver for i.MX interconnects. It 1008c2ecf20Sopenharmony_ci allows adjusting NIC/NOC frequency. 1018c2ecf20Sopenharmony_ci 1028c2ecf20Sopenharmony_ciconfig ARM_IMX8M_DDRC_DEVFREQ 1038c2ecf20Sopenharmony_ci tristate "i.MX8M DDRC DEVFREQ Driver" 1048c2ecf20Sopenharmony_ci depends on (ARCH_MXC && HAVE_ARM_SMCCC) || \ 1058c2ecf20Sopenharmony_ci (COMPILE_TEST && HAVE_ARM_SMCCC) 1068c2ecf20Sopenharmony_ci select DEVFREQ_GOV_SIMPLE_ONDEMAND 1078c2ecf20Sopenharmony_ci select DEVFREQ_GOV_USERSPACE 1088c2ecf20Sopenharmony_ci help 1098c2ecf20Sopenharmony_ci This adds the DEVFREQ driver for the i.MX8M DDR Controller. It allows 1108c2ecf20Sopenharmony_ci adjusting DRAM frequency. 1118c2ecf20Sopenharmony_ci 1128c2ecf20Sopenharmony_ciconfig ARM_TEGRA_DEVFREQ 1138c2ecf20Sopenharmony_ci tristate "NVIDIA Tegra30/114/124/210 DEVFREQ Driver" 1148c2ecf20Sopenharmony_ci depends on ARCH_TEGRA_3x_SOC || ARCH_TEGRA_114_SOC || \ 1158c2ecf20Sopenharmony_ci ARCH_TEGRA_132_SOC || ARCH_TEGRA_124_SOC || \ 1168c2ecf20Sopenharmony_ci ARCH_TEGRA_210_SOC || \ 1178c2ecf20Sopenharmony_ci COMPILE_TEST 1188c2ecf20Sopenharmony_ci depends on COMMON_CLK 1198c2ecf20Sopenharmony_ci help 1208c2ecf20Sopenharmony_ci This adds the DEVFREQ driver for the Tegra family of SoCs. 1218c2ecf20Sopenharmony_ci It reads ACTMON counters of memory controllers and adjusts the 1228c2ecf20Sopenharmony_ci operating frequencies and voltages with OPP support. 1238c2ecf20Sopenharmony_ci 1248c2ecf20Sopenharmony_ciconfig ARM_TEGRA20_DEVFREQ 1258c2ecf20Sopenharmony_ci tristate "NVIDIA Tegra20 DEVFREQ Driver" 1268c2ecf20Sopenharmony_ci depends on (TEGRA_MC && TEGRA20_EMC) || COMPILE_TEST 1278c2ecf20Sopenharmony_ci depends on COMMON_CLK 1288c2ecf20Sopenharmony_ci select DEVFREQ_GOV_SIMPLE_ONDEMAND 1298c2ecf20Sopenharmony_ci help 1308c2ecf20Sopenharmony_ci This adds the DEVFREQ driver for the Tegra20 family of SoCs. 1318c2ecf20Sopenharmony_ci It reads Memory Controller counters and adjusts the operating 1328c2ecf20Sopenharmony_ci frequencies and voltages with OPP support. 1338c2ecf20Sopenharmony_ci 1348c2ecf20Sopenharmony_ciconfig ARM_RK3399_DMC_DEVFREQ 1358c2ecf20Sopenharmony_ci tristate "ARM RK3399 DMC DEVFREQ Driver" 1368c2ecf20Sopenharmony_ci depends on (ARCH_ROCKCHIP && HAVE_ARM_SMCCC) || \ 1378c2ecf20Sopenharmony_ci (COMPILE_TEST && HAVE_ARM_SMCCC) 1388c2ecf20Sopenharmony_ci select DEVFREQ_EVENT_ROCKCHIP_DFI 1398c2ecf20Sopenharmony_ci select DEVFREQ_GOV_SIMPLE_ONDEMAND 1408c2ecf20Sopenharmony_ci select PM_DEVFREQ_EVENT 1418c2ecf20Sopenharmony_ci help 1428c2ecf20Sopenharmony_ci This adds the DEVFREQ driver for the RK3399 DMC(Dynamic Memory Controller). 1438c2ecf20Sopenharmony_ci It sets the frequency for the memory controller and reads the usage counts 1448c2ecf20Sopenharmony_ci from hardware. 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_cisource "drivers/devfreq/event/Kconfig" 1478c2ecf20Sopenharmony_ci 1488c2ecf20Sopenharmony_ciendif # PM_DEVFREQ 149