18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci *  CPU frequency scaling for OMAP using OPP information
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci *  Copyright (C) 2005 Nokia Corporation
68c2ecf20Sopenharmony_ci *  Written by Tony Lindgren <tony@atomide.com>
78c2ecf20Sopenharmony_ci *
88c2ecf20Sopenharmony_ci *  Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
98c2ecf20Sopenharmony_ci *
108c2ecf20Sopenharmony_ci * Copyright (C) 2007-2011 Texas Instruments, Inc.
118c2ecf20Sopenharmony_ci * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar
128c2ecf20Sopenharmony_ci */
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ci#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ci#include <linux/types.h>
178c2ecf20Sopenharmony_ci#include <linux/kernel.h>
188c2ecf20Sopenharmony_ci#include <linux/sched.h>
198c2ecf20Sopenharmony_ci#include <linux/cpufreq.h>
208c2ecf20Sopenharmony_ci#include <linux/delay.h>
218c2ecf20Sopenharmony_ci#include <linux/init.h>
228c2ecf20Sopenharmony_ci#include <linux/err.h>
238c2ecf20Sopenharmony_ci#include <linux/clk.h>
248c2ecf20Sopenharmony_ci#include <linux/io.h>
258c2ecf20Sopenharmony_ci#include <linux/pm_opp.h>
268c2ecf20Sopenharmony_ci#include <linux/cpu.h>
278c2ecf20Sopenharmony_ci#include <linux/module.h>
288c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
298c2ecf20Sopenharmony_ci#include <linux/regulator/consumer.h>
308c2ecf20Sopenharmony_ci
318c2ecf20Sopenharmony_ci#include <asm/smp_plat.h>
328c2ecf20Sopenharmony_ci#include <asm/cpu.h>
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_ci/* OPP tolerance in percentage */
358c2ecf20Sopenharmony_ci#define	OPP_TOLERANCE	4
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_cistatic struct cpufreq_frequency_table *freq_table;
388c2ecf20Sopenharmony_cistatic atomic_t freq_table_users = ATOMIC_INIT(0);
398c2ecf20Sopenharmony_cistatic struct device *mpu_dev;
408c2ecf20Sopenharmony_cistatic struct regulator *mpu_reg;
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_cistatic int omap_target(struct cpufreq_policy *policy, unsigned int index)
438c2ecf20Sopenharmony_ci{
448c2ecf20Sopenharmony_ci	int r, ret;
458c2ecf20Sopenharmony_ci	struct dev_pm_opp *opp;
468c2ecf20Sopenharmony_ci	unsigned long freq, volt = 0, volt_old = 0, tol = 0;
478c2ecf20Sopenharmony_ci	unsigned int old_freq, new_freq;
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci	old_freq = policy->cur;
508c2ecf20Sopenharmony_ci	new_freq = freq_table[index].frequency;
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci	freq = new_freq * 1000;
538c2ecf20Sopenharmony_ci	ret = clk_round_rate(policy->clk, freq);
548c2ecf20Sopenharmony_ci	if (ret < 0) {
558c2ecf20Sopenharmony_ci		dev_warn(mpu_dev,
568c2ecf20Sopenharmony_ci			 "CPUfreq: Cannot find matching frequency for %lu\n",
578c2ecf20Sopenharmony_ci			 freq);
588c2ecf20Sopenharmony_ci		return ret;
598c2ecf20Sopenharmony_ci	}
608c2ecf20Sopenharmony_ci	freq = ret;
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_ci	if (mpu_reg) {
638c2ecf20Sopenharmony_ci		opp = dev_pm_opp_find_freq_ceil(mpu_dev, &freq);
648c2ecf20Sopenharmony_ci		if (IS_ERR(opp)) {
658c2ecf20Sopenharmony_ci			dev_err(mpu_dev, "%s: unable to find MPU OPP for %d\n",
668c2ecf20Sopenharmony_ci				__func__, new_freq);
678c2ecf20Sopenharmony_ci			return -EINVAL;
688c2ecf20Sopenharmony_ci		}
698c2ecf20Sopenharmony_ci		volt = dev_pm_opp_get_voltage(opp);
708c2ecf20Sopenharmony_ci		dev_pm_opp_put(opp);
718c2ecf20Sopenharmony_ci		tol = volt * OPP_TOLERANCE / 100;
728c2ecf20Sopenharmony_ci		volt_old = regulator_get_voltage(mpu_reg);
738c2ecf20Sopenharmony_ci	}
748c2ecf20Sopenharmony_ci
758c2ecf20Sopenharmony_ci	dev_dbg(mpu_dev, "cpufreq-omap: %u MHz, %ld mV --> %u MHz, %ld mV\n",
768c2ecf20Sopenharmony_ci		old_freq / 1000, volt_old ? volt_old / 1000 : -1,
778c2ecf20Sopenharmony_ci		new_freq / 1000, volt ? volt / 1000 : -1);
788c2ecf20Sopenharmony_ci
798c2ecf20Sopenharmony_ci	/* scaling up?  scale voltage before frequency */
808c2ecf20Sopenharmony_ci	if (mpu_reg && (new_freq > old_freq)) {
818c2ecf20Sopenharmony_ci		r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol);
828c2ecf20Sopenharmony_ci		if (r < 0) {
838c2ecf20Sopenharmony_ci			dev_warn(mpu_dev, "%s: unable to scale voltage up.\n",
848c2ecf20Sopenharmony_ci				 __func__);
858c2ecf20Sopenharmony_ci			return r;
868c2ecf20Sopenharmony_ci		}
878c2ecf20Sopenharmony_ci	}
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_ci	ret = clk_set_rate(policy->clk, new_freq * 1000);
908c2ecf20Sopenharmony_ci
918c2ecf20Sopenharmony_ci	/* scaling down?  scale voltage after frequency */
928c2ecf20Sopenharmony_ci	if (mpu_reg && (new_freq < old_freq)) {
938c2ecf20Sopenharmony_ci		r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol);
948c2ecf20Sopenharmony_ci		if (r < 0) {
958c2ecf20Sopenharmony_ci			dev_warn(mpu_dev, "%s: unable to scale voltage down.\n",
968c2ecf20Sopenharmony_ci				 __func__);
978c2ecf20Sopenharmony_ci			clk_set_rate(policy->clk, old_freq * 1000);
988c2ecf20Sopenharmony_ci			return r;
998c2ecf20Sopenharmony_ci		}
1008c2ecf20Sopenharmony_ci	}
1018c2ecf20Sopenharmony_ci
1028c2ecf20Sopenharmony_ci	return ret;
1038c2ecf20Sopenharmony_ci}
1048c2ecf20Sopenharmony_ci
1058c2ecf20Sopenharmony_cistatic inline void freq_table_free(void)
1068c2ecf20Sopenharmony_ci{
1078c2ecf20Sopenharmony_ci	if (atomic_dec_and_test(&freq_table_users))
1088c2ecf20Sopenharmony_ci		dev_pm_opp_free_cpufreq_table(mpu_dev, &freq_table);
1098c2ecf20Sopenharmony_ci}
1108c2ecf20Sopenharmony_ci
1118c2ecf20Sopenharmony_cistatic int omap_cpu_init(struct cpufreq_policy *policy)
1128c2ecf20Sopenharmony_ci{
1138c2ecf20Sopenharmony_ci	int result;
1148c2ecf20Sopenharmony_ci
1158c2ecf20Sopenharmony_ci	policy->clk = clk_get(NULL, "cpufreq_ck");
1168c2ecf20Sopenharmony_ci	if (IS_ERR(policy->clk))
1178c2ecf20Sopenharmony_ci		return PTR_ERR(policy->clk);
1188c2ecf20Sopenharmony_ci
1198c2ecf20Sopenharmony_ci	if (!freq_table) {
1208c2ecf20Sopenharmony_ci		result = dev_pm_opp_init_cpufreq_table(mpu_dev, &freq_table);
1218c2ecf20Sopenharmony_ci		if (result) {
1228c2ecf20Sopenharmony_ci			dev_err(mpu_dev,
1238c2ecf20Sopenharmony_ci				"%s: cpu%d: failed creating freq table[%d]\n",
1248c2ecf20Sopenharmony_ci				__func__, policy->cpu, result);
1258c2ecf20Sopenharmony_ci			clk_put(policy->clk);
1268c2ecf20Sopenharmony_ci			return result;
1278c2ecf20Sopenharmony_ci		}
1288c2ecf20Sopenharmony_ci	}
1298c2ecf20Sopenharmony_ci
1308c2ecf20Sopenharmony_ci	atomic_inc_return(&freq_table_users);
1318c2ecf20Sopenharmony_ci
1328c2ecf20Sopenharmony_ci	/* FIXME: what's the actual transition time? */
1338c2ecf20Sopenharmony_ci	cpufreq_generic_init(policy, freq_table, 300 * 1000);
1348c2ecf20Sopenharmony_ci	dev_pm_opp_of_register_em(mpu_dev, policy->cpus);
1358c2ecf20Sopenharmony_ci
1368c2ecf20Sopenharmony_ci	return 0;
1378c2ecf20Sopenharmony_ci}
1388c2ecf20Sopenharmony_ci
1398c2ecf20Sopenharmony_cistatic int omap_cpu_exit(struct cpufreq_policy *policy)
1408c2ecf20Sopenharmony_ci{
1418c2ecf20Sopenharmony_ci	freq_table_free();
1428c2ecf20Sopenharmony_ci	clk_put(policy->clk);
1438c2ecf20Sopenharmony_ci	return 0;
1448c2ecf20Sopenharmony_ci}
1458c2ecf20Sopenharmony_ci
1468c2ecf20Sopenharmony_cistatic struct cpufreq_driver omap_driver = {
1478c2ecf20Sopenharmony_ci	.flags		= CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
1488c2ecf20Sopenharmony_ci	.verify		= cpufreq_generic_frequency_table_verify,
1498c2ecf20Sopenharmony_ci	.target_index	= omap_target,
1508c2ecf20Sopenharmony_ci	.get		= cpufreq_generic_get,
1518c2ecf20Sopenharmony_ci	.init		= omap_cpu_init,
1528c2ecf20Sopenharmony_ci	.exit		= omap_cpu_exit,
1538c2ecf20Sopenharmony_ci	.name		= "omap",
1548c2ecf20Sopenharmony_ci	.attr		= cpufreq_generic_attr,
1558c2ecf20Sopenharmony_ci};
1568c2ecf20Sopenharmony_ci
1578c2ecf20Sopenharmony_cistatic int omap_cpufreq_probe(struct platform_device *pdev)
1588c2ecf20Sopenharmony_ci{
1598c2ecf20Sopenharmony_ci	mpu_dev = get_cpu_device(0);
1608c2ecf20Sopenharmony_ci	if (!mpu_dev) {
1618c2ecf20Sopenharmony_ci		pr_warn("%s: unable to get the MPU device\n", __func__);
1628c2ecf20Sopenharmony_ci		return -EINVAL;
1638c2ecf20Sopenharmony_ci	}
1648c2ecf20Sopenharmony_ci
1658c2ecf20Sopenharmony_ci	mpu_reg = regulator_get(mpu_dev, "vcc");
1668c2ecf20Sopenharmony_ci	if (IS_ERR(mpu_reg)) {
1678c2ecf20Sopenharmony_ci		pr_warn("%s: unable to get MPU regulator\n", __func__);
1688c2ecf20Sopenharmony_ci		mpu_reg = NULL;
1698c2ecf20Sopenharmony_ci	} else {
1708c2ecf20Sopenharmony_ci		/*
1718c2ecf20Sopenharmony_ci		 * Ensure physical regulator is present.
1728c2ecf20Sopenharmony_ci		 * (e.g. could be dummy regulator.)
1738c2ecf20Sopenharmony_ci		 */
1748c2ecf20Sopenharmony_ci		if (regulator_get_voltage(mpu_reg) < 0) {
1758c2ecf20Sopenharmony_ci			pr_warn("%s: physical regulator not present for MPU\n",
1768c2ecf20Sopenharmony_ci				__func__);
1778c2ecf20Sopenharmony_ci			regulator_put(mpu_reg);
1788c2ecf20Sopenharmony_ci			mpu_reg = NULL;
1798c2ecf20Sopenharmony_ci		}
1808c2ecf20Sopenharmony_ci	}
1818c2ecf20Sopenharmony_ci
1828c2ecf20Sopenharmony_ci	return cpufreq_register_driver(&omap_driver);
1838c2ecf20Sopenharmony_ci}
1848c2ecf20Sopenharmony_ci
1858c2ecf20Sopenharmony_cistatic int omap_cpufreq_remove(struct platform_device *pdev)
1868c2ecf20Sopenharmony_ci{
1878c2ecf20Sopenharmony_ci	return cpufreq_unregister_driver(&omap_driver);
1888c2ecf20Sopenharmony_ci}
1898c2ecf20Sopenharmony_ci
1908c2ecf20Sopenharmony_cistatic struct platform_driver omap_cpufreq_platdrv = {
1918c2ecf20Sopenharmony_ci	.driver = {
1928c2ecf20Sopenharmony_ci		.name	= "omap-cpufreq",
1938c2ecf20Sopenharmony_ci	},
1948c2ecf20Sopenharmony_ci	.probe		= omap_cpufreq_probe,
1958c2ecf20Sopenharmony_ci	.remove		= omap_cpufreq_remove,
1968c2ecf20Sopenharmony_ci};
1978c2ecf20Sopenharmony_cimodule_platform_driver(omap_cpufreq_platdrv);
1988c2ecf20Sopenharmony_ci
1998c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("cpufreq driver for OMAP SoCs");
2008c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL");
201