18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright 2017 Icenowy Zheng <icenowy@aosc.io> 48c2ecf20Sopenharmony_ci */ 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ci#ifndef _CCU_SUN8I_R40_H_ 78c2ecf20Sopenharmony_ci#define _CCU_SUN8I_R40_H_ 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci#include <dt-bindings/clock/sun8i-r40-ccu.h> 108c2ecf20Sopenharmony_ci#include <dt-bindings/reset/sun8i-r40-ccu.h> 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci#define CLK_OSC_12M 0 138c2ecf20Sopenharmony_ci#define CLK_PLL_CPU 1 148c2ecf20Sopenharmony_ci#define CLK_PLL_AUDIO_BASE 2 158c2ecf20Sopenharmony_ci#define CLK_PLL_AUDIO 3 168c2ecf20Sopenharmony_ci#define CLK_PLL_AUDIO_2X 4 178c2ecf20Sopenharmony_ci#define CLK_PLL_AUDIO_4X 5 188c2ecf20Sopenharmony_ci#define CLK_PLL_AUDIO_8X 6 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci/* PLL_VIDEO0 is exported */ 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci#define CLK_PLL_VIDEO0_2X 8 238c2ecf20Sopenharmony_ci#define CLK_PLL_VE 9 248c2ecf20Sopenharmony_ci#define CLK_PLL_DDR0 10 258c2ecf20Sopenharmony_ci#define CLK_PLL_PERIPH0 11 268c2ecf20Sopenharmony_ci#define CLK_PLL_PERIPH0_SATA 12 278c2ecf20Sopenharmony_ci#define CLK_PLL_PERIPH0_2X 13 288c2ecf20Sopenharmony_ci#define CLK_PLL_PERIPH1 14 298c2ecf20Sopenharmony_ci#define CLK_PLL_PERIPH1_2X 15 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci/* PLL_VIDEO1 is exported */ 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci#define CLK_PLL_VIDEO1_2X 17 348c2ecf20Sopenharmony_ci#define CLK_PLL_SATA 18 358c2ecf20Sopenharmony_ci#define CLK_PLL_SATA_OUT 19 368c2ecf20Sopenharmony_ci#define CLK_PLL_GPU 20 378c2ecf20Sopenharmony_ci#define CLK_PLL_MIPI 21 388c2ecf20Sopenharmony_ci#define CLK_PLL_DE 22 398c2ecf20Sopenharmony_ci#define CLK_PLL_DDR1 23 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci/* The CPU clock is exported */ 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ci#define CLK_AXI 25 448c2ecf20Sopenharmony_ci#define CLK_AHB1 26 458c2ecf20Sopenharmony_ci#define CLK_APB1 27 468c2ecf20Sopenharmony_ci#define CLK_APB2 28 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci/* All the bus gates are exported */ 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci/* The first bunch of module clocks are exported */ 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci#define CLK_DRAM 132 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci/* All the DRAM gates are exported */ 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_ci/* Some more module clocks are exported */ 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ci#define CLK_NUMBER (CLK_OUTB + 1) 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ci#endif /* _CCU_SUN8I_R40_H_ */ 61