18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Copyright 2016 Maxime Ripard
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Maxime Ripard <maxime.ripard@free-electrons.com>
68c2ecf20Sopenharmony_ci */
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci#ifndef _CCU_SUN8I_A23_A33_H_
98c2ecf20Sopenharmony_ci#define _CCU_SUN8I_A23_A33_H_
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci#include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
128c2ecf20Sopenharmony_ci#include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ci#define CLK_PLL_CPUX		0
158c2ecf20Sopenharmony_ci#define CLK_PLL_AUDIO_BASE	1
168c2ecf20Sopenharmony_ci#define CLK_PLL_AUDIO		2
178c2ecf20Sopenharmony_ci#define CLK_PLL_AUDIO_2X	3
188c2ecf20Sopenharmony_ci#define CLK_PLL_AUDIO_4X	4
198c2ecf20Sopenharmony_ci#define CLK_PLL_AUDIO_8X	5
208c2ecf20Sopenharmony_ci#define CLK_PLL_VIDEO		6
218c2ecf20Sopenharmony_ci#define CLK_PLL_VIDEO_2X	7
228c2ecf20Sopenharmony_ci#define CLK_PLL_VE		8
238c2ecf20Sopenharmony_ci#define CLK_PLL_DDR0		9
248c2ecf20Sopenharmony_ci#define CLK_PLL_PERIPH		10
258c2ecf20Sopenharmony_ci#define CLK_PLL_PERIPH_2X	11
268c2ecf20Sopenharmony_ci#define CLK_PLL_GPU		12
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ci/* The PLL MIPI clock is exported */
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci#define CLK_PLL_HSIC		14
318c2ecf20Sopenharmony_ci#define CLK_PLL_DE		15
328c2ecf20Sopenharmony_ci#define CLK_PLL_DDR1		16
338c2ecf20Sopenharmony_ci#define CLK_PLL_DDR		17
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ci/* The CPUX clock is exported */
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci#define CLK_AXI			19
388c2ecf20Sopenharmony_ci#define CLK_AHB1		20
398c2ecf20Sopenharmony_ci#define CLK_APB1		21
408c2ecf20Sopenharmony_ci#define CLK_APB2		22
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ci/* All the bus gates are exported */
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_ci/* The first part of the mod clocks is exported */
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ci#define CLK_DRAM		79
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_ci/* Some more module clocks are exported */
498c2ecf20Sopenharmony_ci
508c2ecf20Sopenharmony_ci#define CLK_MBUS		95
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci/* And the last module clocks are exported */
538c2ecf20Sopenharmony_ci
548c2ecf20Sopenharmony_ci#define CLK_NUMBER		(CLK_ATS + 1)
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_ci#endif /* _CCU_SUN8I_A23_A33_H_ */
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