18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright 2016 Maxime Ripard 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Maxime Ripard <maxime.ripard@free-electrons.com> 68c2ecf20Sopenharmony_ci */ 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#ifndef _CCU_SUN5I_H_ 98c2ecf20Sopenharmony_ci#define _CCU_SUN5I_H_ 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci#include <dt-bindings/clock/sun5i-ccu.h> 128c2ecf20Sopenharmony_ci#include <dt-bindings/reset/sun5i-ccu.h> 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci/* The HOSC is exported */ 158c2ecf20Sopenharmony_ci#define CLK_PLL_CORE 2 168c2ecf20Sopenharmony_ci#define CLK_PLL_AUDIO_BASE 3 178c2ecf20Sopenharmony_ci#define CLK_PLL_AUDIO 4 188c2ecf20Sopenharmony_ci#define CLK_PLL_AUDIO_2X 5 198c2ecf20Sopenharmony_ci#define CLK_PLL_AUDIO_4X 6 208c2ecf20Sopenharmony_ci#define CLK_PLL_AUDIO_8X 7 218c2ecf20Sopenharmony_ci#define CLK_PLL_VIDEO0 8 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci/* The PLL_VIDEO0_2X is exported for HDMI */ 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci#define CLK_PLL_VE 10 268c2ecf20Sopenharmony_ci#define CLK_PLL_DDR_BASE 11 278c2ecf20Sopenharmony_ci#define CLK_PLL_DDR 12 288c2ecf20Sopenharmony_ci#define CLK_PLL_DDR_OTHER 13 298c2ecf20Sopenharmony_ci#define CLK_PLL_PERIPH 14 308c2ecf20Sopenharmony_ci#define CLK_PLL_VIDEO1 15 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ci/* The PLL_VIDEO1_2X is exported for HDMI */ 338c2ecf20Sopenharmony_ci/* The CPU clock is exported */ 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci#define CLK_AXI 18 368c2ecf20Sopenharmony_ci#define CLK_AHB 19 378c2ecf20Sopenharmony_ci#define CLK_APB0 20 388c2ecf20Sopenharmony_ci#define CLK_APB1 21 398c2ecf20Sopenharmony_ci#define CLK_DRAM_AXI 22 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci/* AHB gates are exported */ 428c2ecf20Sopenharmony_ci/* APB0 gates are exported */ 438c2ecf20Sopenharmony_ci/* APB1 gates are exported */ 448c2ecf20Sopenharmony_ci/* Modules clocks are exported */ 458c2ecf20Sopenharmony_ci/* USB clocks are exported */ 468c2ecf20Sopenharmony_ci/* GPS clock is exported */ 478c2ecf20Sopenharmony_ci/* DRAM gates are exported */ 488c2ecf20Sopenharmony_ci/* More display modules clocks are exported */ 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci#define CLK_TCON_CH1_SCLK 91 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci/* The rest of the module clocks are exported */ 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci#define CLK_NUMBER (CLK_IEP + 1) 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_ci#endif /* _CCU_SUN5I_H_ */ 57