1// SPDX-License-Identifier:	GPL-2.0
2/*
3 * Copyright (C) 2017, Intel Corporation
4 */
5#include <linux/slab.h>
6#include <linux/clk-provider.h>
7#include <linux/io.h>
8
9#include "stratix10-clk.h"
10#include "clk.h"
11
12#define CLK_MGR_FREE_SHIFT		16
13#define CLK_MGR_FREE_MASK		0x7
14#define SWCTRLBTCLKSEN_SHIFT		8
15
16#define to_periph_clk(p) container_of(p, struct socfpga_periph_clk, hw.hw)
17
18static unsigned long clk_peri_c_clk_recalc_rate(struct clk_hw *hwclk,
19					     unsigned long parent_rate)
20{
21	struct socfpga_periph_clk *socfpgaclk = to_periph_clk(hwclk);
22	unsigned long div = 1;
23	u32 val;
24
25	val = readl(socfpgaclk->hw.reg);
26	val &= GENMASK(SWCTRLBTCLKSEN_SHIFT - 1, 0);
27	parent_rate /= val;
28
29	return parent_rate / div;
30}
31
32static unsigned long clk_peri_cnt_clk_recalc_rate(struct clk_hw *hwclk,
33					     unsigned long parent_rate)
34{
35	struct socfpga_periph_clk *socfpgaclk = to_periph_clk(hwclk);
36	unsigned long div = 1;
37
38	if (socfpgaclk->fixed_div) {
39		div = socfpgaclk->fixed_div;
40	} else {
41		if (socfpgaclk->hw.reg)
42			div = ((readl(socfpgaclk->hw.reg) & 0x7ff) + 1);
43	}
44
45	return parent_rate / div;
46}
47
48static u8 clk_periclk_get_parent(struct clk_hw *hwclk)
49{
50	struct socfpga_periph_clk *socfpgaclk = to_periph_clk(hwclk);
51	u32 clk_src, mask;
52	u8 parent = 0;
53
54	/* handle the bypass first */
55	if (socfpgaclk->bypass_reg) {
56		mask = (0x1 << socfpgaclk->bypass_shift);
57		parent = ((readl(socfpgaclk->bypass_reg) & mask) >>
58			   socfpgaclk->bypass_shift);
59		if (parent)
60			return parent;
61	}
62
63	if (socfpgaclk->hw.reg) {
64		clk_src = readl(socfpgaclk->hw.reg);
65		parent = (clk_src >> CLK_MGR_FREE_SHIFT) &
66			  CLK_MGR_FREE_MASK;
67	}
68	return parent;
69}
70
71static const struct clk_ops peri_c_clk_ops = {
72	.recalc_rate = clk_peri_c_clk_recalc_rate,
73	.get_parent = clk_periclk_get_parent,
74};
75
76static const struct clk_ops peri_cnt_clk_ops = {
77	.recalc_rate = clk_peri_cnt_clk_recalc_rate,
78	.get_parent = clk_periclk_get_parent,
79};
80
81struct clk *s10_register_periph(const struct stratix10_perip_c_clock *clks,
82				void __iomem *reg)
83{
84	struct clk *clk;
85	struct socfpga_periph_clk *periph_clk;
86	struct clk_init_data init;
87	const char *name = clks->name;
88	const char *parent_name = clks->parent_name;
89
90	periph_clk = kzalloc(sizeof(*periph_clk), GFP_KERNEL);
91	if (WARN_ON(!periph_clk))
92		return NULL;
93
94	periph_clk->hw.reg = reg + clks->offset;
95
96	init.name = name;
97	init.ops = &peri_c_clk_ops;
98	init.flags = clks->flags;
99
100	init.num_parents = clks->num_parents;
101	init.parent_names = parent_name ? &parent_name : NULL;
102	if (init.parent_names == NULL)
103		init.parent_data = clks->parent_data;
104
105	periph_clk->hw.hw.init = &init;
106
107	clk = clk_register(NULL, &periph_clk->hw.hw);
108	if (WARN_ON(IS_ERR(clk))) {
109		kfree(periph_clk);
110		return NULL;
111	}
112	return clk;
113}
114
115struct clk *s10_register_cnt_periph(const struct stratix10_perip_cnt_clock *clks,
116				    void __iomem *regbase)
117{
118	struct clk *clk;
119	struct socfpga_periph_clk *periph_clk;
120	struct clk_init_data init;
121	const char *name = clks->name;
122	const char *parent_name = clks->parent_name;
123
124	periph_clk = kzalloc(sizeof(*periph_clk), GFP_KERNEL);
125	if (WARN_ON(!periph_clk))
126		return NULL;
127
128	if (clks->offset)
129		periph_clk->hw.reg = regbase + clks->offset;
130	else
131		periph_clk->hw.reg = NULL;
132
133	if (clks->bypass_reg)
134		periph_clk->bypass_reg = regbase + clks->bypass_reg;
135	else
136		periph_clk->bypass_reg = NULL;
137	periph_clk->bypass_shift = clks->bypass_shift;
138	periph_clk->fixed_div = clks->fixed_divider;
139
140	init.name = name;
141	init.ops = &peri_cnt_clk_ops;
142	init.flags = clks->flags;
143
144	init.num_parents = clks->num_parents;
145	init.parent_names = parent_name ? &parent_name : NULL;
146	if (init.parent_names == NULL)
147		init.parent_data = clks->parent_data;
148
149	periph_clk->hw.hw.init = &init;
150
151	clk = clk_register(NULL, &periph_clk->hw.hw);
152	if (WARN_ON(IS_ERR(clk))) {
153		kfree(periph_clk);
154		return NULL;
155	}
156	return clk;
157}
158