1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Renesas R-Car USB2.0 clock selector
4 *
5 * Copyright (C) 2017 Renesas Electronics Corp.
6 *
7 * Based on renesas-cpg-mssr.c
8 *
9 * Copyright (C) 2015 Glider bvba
10 */
11
12#include <linux/clk.h>
13#include <linux/clk-provider.h>
14#include <linux/device.h>
15#include <linux/init.h>
16#include <linux/io.h>
17#include <linux/module.h>
18#include <linux/of_device.h>
19#include <linux/platform_device.h>
20#include <linux/pm.h>
21#include <linux/pm_runtime.h>
22#include <linux/reset.h>
23#include <linux/slab.h>
24
25#define USB20_CLKSET0		0x00
26#define CLKSET0_INTCLK_EN	BIT(11)
27#define CLKSET0_PRIVATE		BIT(0)
28#define CLKSET0_EXTAL_ONLY	(CLKSET0_INTCLK_EN | CLKSET0_PRIVATE)
29
30static const struct clk_bulk_data rcar_usb2_clocks[] = {
31	{ .id = "ehci_ohci", },
32	{ .id = "hs-usb-if", },
33};
34
35struct usb2_clock_sel_priv {
36	void __iomem *base;
37	struct clk_hw hw;
38	struct clk_bulk_data clks[ARRAY_SIZE(rcar_usb2_clocks)];
39	struct reset_control *rsts;
40	bool extal;
41	bool xtal;
42};
43#define to_priv(_hw)	container_of(_hw, struct usb2_clock_sel_priv, hw)
44
45static void usb2_clock_sel_enable_extal_only(struct usb2_clock_sel_priv *priv)
46{
47	u16 val = readw(priv->base + USB20_CLKSET0);
48
49	pr_debug("%s: enter %d %d %x\n", __func__,
50		 priv->extal, priv->xtal, val);
51
52	if (priv->extal && !priv->xtal && val != CLKSET0_EXTAL_ONLY)
53		writew(CLKSET0_EXTAL_ONLY, priv->base + USB20_CLKSET0);
54}
55
56static void usb2_clock_sel_disable_extal_only(struct usb2_clock_sel_priv *priv)
57{
58	if (priv->extal && !priv->xtal)
59		writew(CLKSET0_PRIVATE, priv->base + USB20_CLKSET0);
60}
61
62static int usb2_clock_sel_enable(struct clk_hw *hw)
63{
64	struct usb2_clock_sel_priv *priv = to_priv(hw);
65	int ret;
66
67	ret = reset_control_deassert(priv->rsts);
68	if (ret)
69		return ret;
70
71	ret = clk_bulk_prepare_enable(ARRAY_SIZE(priv->clks), priv->clks);
72	if (ret) {
73		reset_control_assert(priv->rsts);
74		return ret;
75	}
76
77	usb2_clock_sel_enable_extal_only(priv);
78
79	return 0;
80}
81
82static void usb2_clock_sel_disable(struct clk_hw *hw)
83{
84	struct usb2_clock_sel_priv *priv = to_priv(hw);
85
86	usb2_clock_sel_disable_extal_only(priv);
87
88	clk_bulk_disable_unprepare(ARRAY_SIZE(priv->clks), priv->clks);
89	reset_control_assert(priv->rsts);
90}
91
92/*
93 * This module seems a mux, but this driver assumes a gate because
94 * ehci/ohci platform drivers don't support clk_set_parent() for now.
95 * If this driver acts as a gate, ehci/ohci-platform drivers don't need
96 * any modification.
97 */
98static const struct clk_ops usb2_clock_sel_clock_ops = {
99	.enable = usb2_clock_sel_enable,
100	.disable = usb2_clock_sel_disable,
101};
102
103static const struct of_device_id rcar_usb2_clock_sel_match[] = {
104	{ .compatible = "renesas,rcar-gen3-usb2-clock-sel" },
105	{ }
106};
107
108static int rcar_usb2_clock_sel_suspend(struct device *dev)
109{
110	struct usb2_clock_sel_priv *priv = dev_get_drvdata(dev);
111
112	usb2_clock_sel_disable_extal_only(priv);
113	pm_runtime_put(dev);
114
115	return 0;
116}
117
118static int rcar_usb2_clock_sel_resume(struct device *dev)
119{
120	struct usb2_clock_sel_priv *priv = dev_get_drvdata(dev);
121
122	pm_runtime_get_sync(dev);
123	usb2_clock_sel_enable_extal_only(priv);
124
125	return 0;
126}
127
128static int rcar_usb2_clock_sel_remove(struct platform_device *pdev)
129{
130	struct device *dev = &pdev->dev;
131
132	of_clk_del_provider(dev->of_node);
133	pm_runtime_put(dev);
134	pm_runtime_disable(dev);
135
136	return 0;
137}
138
139static int rcar_usb2_clock_sel_probe(struct platform_device *pdev)
140{
141	struct device *dev = &pdev->dev;
142	struct device_node *np = dev->of_node;
143	struct usb2_clock_sel_priv *priv;
144	struct clk *clk;
145	struct clk_init_data init;
146	int ret;
147
148	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
149	if (!priv)
150		return -ENOMEM;
151
152	priv->base = devm_platform_ioremap_resource(pdev, 0);
153	if (IS_ERR(priv->base))
154		return PTR_ERR(priv->base);
155
156	memcpy(priv->clks, rcar_usb2_clocks, sizeof(priv->clks));
157	ret = devm_clk_bulk_get(dev, ARRAY_SIZE(priv->clks), priv->clks);
158	if (ret < 0)
159		return ret;
160
161	priv->rsts = devm_reset_control_array_get(dev, true, false);
162	if (IS_ERR(priv->rsts))
163		return PTR_ERR(priv->rsts);
164
165	clk = devm_clk_get(dev, "usb_extal");
166	if (!IS_ERR(clk) && !clk_prepare_enable(clk)) {
167		priv->extal = !!clk_get_rate(clk);
168		clk_disable_unprepare(clk);
169	}
170	clk = devm_clk_get(dev, "usb_xtal");
171	if (!IS_ERR(clk) && !clk_prepare_enable(clk)) {
172		priv->xtal = !!clk_get_rate(clk);
173		clk_disable_unprepare(clk);
174	}
175
176	if (!priv->extal && !priv->xtal) {
177		dev_err(dev, "This driver needs usb_extal or usb_xtal\n");
178		return -ENOENT;
179	}
180
181	pm_runtime_enable(dev);
182	pm_runtime_get_sync(dev);
183	platform_set_drvdata(pdev, priv);
184	dev_set_drvdata(dev, priv);
185
186	init.name = "rcar_usb2_clock_sel";
187	init.ops = &usb2_clock_sel_clock_ops;
188	init.flags = 0;
189	init.parent_names = NULL;
190	init.num_parents = 0;
191	priv->hw.init = &init;
192
193	ret = devm_clk_hw_register(dev, &priv->hw);
194	if (ret)
195		goto pm_put;
196
197	ret = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &priv->hw);
198	if (ret)
199		goto pm_put;
200
201	return 0;
202
203pm_put:
204	pm_runtime_put(dev);
205	pm_runtime_disable(dev);
206	return ret;
207}
208
209static const struct dev_pm_ops rcar_usb2_clock_sel_pm_ops = {
210	.suspend	= rcar_usb2_clock_sel_suspend,
211	.resume		= rcar_usb2_clock_sel_resume,
212};
213
214static struct platform_driver rcar_usb2_clock_sel_driver = {
215	.driver		= {
216		.name	= "rcar-usb2-clock-sel",
217		.of_match_table = rcar_usb2_clock_sel_match,
218		.pm	= &rcar_usb2_clock_sel_pm_ops,
219	},
220	.probe		= rcar_usb2_clock_sel_probe,
221	.remove		= rcar_usb2_clock_sel_remove,
222};
223builtin_platform_driver(rcar_usb2_clock_sel_driver);
224
225MODULE_DESCRIPTION("Renesas R-Car USB2 clock selector Driver");
226MODULE_LICENSE("GPL v2");
227