18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci// Copyright (c) 2018, The Linux Foundation. All rights reserved.
38c2ecf20Sopenharmony_ci#include <linux/clk-provider.h>
48c2ecf20Sopenharmony_ci#include <linux/module.h>
58c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
68c2ecf20Sopenharmony_ci#include <linux/regmap.h>
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci#include "clk-alpha-pll.h"
98c2ecf20Sopenharmony_ci
108c2ecf20Sopenharmony_cistatic const u8 ipq_pll_offsets[] = {
118c2ecf20Sopenharmony_ci	[PLL_OFF_L_VAL] = 0x08,
128c2ecf20Sopenharmony_ci	[PLL_OFF_ALPHA_VAL] = 0x10,
138c2ecf20Sopenharmony_ci	[PLL_OFF_USER_CTL] = 0x18,
148c2ecf20Sopenharmony_ci	[PLL_OFF_CONFIG_CTL] = 0x20,
158c2ecf20Sopenharmony_ci	[PLL_OFF_CONFIG_CTL_U] = 0x24,
168c2ecf20Sopenharmony_ci	[PLL_OFF_STATUS] = 0x28,
178c2ecf20Sopenharmony_ci	[PLL_OFF_TEST_CTL] = 0x30,
188c2ecf20Sopenharmony_ci	[PLL_OFF_TEST_CTL_U] = 0x34,
198c2ecf20Sopenharmony_ci};
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_cistatic struct clk_alpha_pll ipq_pll = {
228c2ecf20Sopenharmony_ci	.offset = 0x0,
238c2ecf20Sopenharmony_ci	.regs = ipq_pll_offsets,
248c2ecf20Sopenharmony_ci	.flags = SUPPORTS_DYNAMIC_UPDATE,
258c2ecf20Sopenharmony_ci	.clkr = {
268c2ecf20Sopenharmony_ci		.enable_reg = 0x0,
278c2ecf20Sopenharmony_ci		.enable_mask = BIT(0),
288c2ecf20Sopenharmony_ci		.hw.init = &(struct clk_init_data){
298c2ecf20Sopenharmony_ci			.name = "a53pll",
308c2ecf20Sopenharmony_ci			.parent_data = &(const struct clk_parent_data) {
318c2ecf20Sopenharmony_ci				.fw_name = "xo",
328c2ecf20Sopenharmony_ci			},
338c2ecf20Sopenharmony_ci			.num_parents = 1,
348c2ecf20Sopenharmony_ci			.ops = &clk_alpha_pll_huayra_ops,
358c2ecf20Sopenharmony_ci		},
368c2ecf20Sopenharmony_ci	},
378c2ecf20Sopenharmony_ci};
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_cistatic const struct alpha_pll_config ipq_pll_config = {
408c2ecf20Sopenharmony_ci	.l = 0x37,
418c2ecf20Sopenharmony_ci	.config_ctl_val = 0x04141200,
428c2ecf20Sopenharmony_ci	.config_ctl_hi_val = 0x0,
438c2ecf20Sopenharmony_ci	.early_output_mask = BIT(3),
448c2ecf20Sopenharmony_ci	.main_output_mask = BIT(0),
458c2ecf20Sopenharmony_ci};
468c2ecf20Sopenharmony_ci
478c2ecf20Sopenharmony_cistatic const struct regmap_config ipq_pll_regmap_config = {
488c2ecf20Sopenharmony_ci	.reg_bits		= 32,
498c2ecf20Sopenharmony_ci	.reg_stride		= 4,
508c2ecf20Sopenharmony_ci	.val_bits		= 32,
518c2ecf20Sopenharmony_ci	.max_register		= 0x40,
528c2ecf20Sopenharmony_ci	.fast_io		= true,
538c2ecf20Sopenharmony_ci};
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_cistatic int apss_ipq_pll_probe(struct platform_device *pdev)
568c2ecf20Sopenharmony_ci{
578c2ecf20Sopenharmony_ci	struct device *dev = &pdev->dev;
588c2ecf20Sopenharmony_ci	struct regmap *regmap;
598c2ecf20Sopenharmony_ci	void __iomem *base;
608c2ecf20Sopenharmony_ci	int ret;
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_ci	base = devm_platform_ioremap_resource(pdev, 0);
638c2ecf20Sopenharmony_ci	if (IS_ERR(base))
648c2ecf20Sopenharmony_ci		return PTR_ERR(base);
658c2ecf20Sopenharmony_ci
668c2ecf20Sopenharmony_ci	regmap = devm_regmap_init_mmio(dev, base, &ipq_pll_regmap_config);
678c2ecf20Sopenharmony_ci	if (IS_ERR(regmap))
688c2ecf20Sopenharmony_ci		return PTR_ERR(regmap);
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ci	clk_alpha_pll_configure(&ipq_pll, regmap, &ipq_pll_config);
718c2ecf20Sopenharmony_ci
728c2ecf20Sopenharmony_ci	ret = devm_clk_register_regmap(dev, &ipq_pll.clkr);
738c2ecf20Sopenharmony_ci	if (ret)
748c2ecf20Sopenharmony_ci		return ret;
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_ci	return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
778c2ecf20Sopenharmony_ci					   &ipq_pll.clkr.hw);
788c2ecf20Sopenharmony_ci}
798c2ecf20Sopenharmony_ci
808c2ecf20Sopenharmony_cistatic const struct of_device_id apss_ipq_pll_match_table[] = {
818c2ecf20Sopenharmony_ci	{ .compatible = "qcom,ipq6018-a53pll" },
828c2ecf20Sopenharmony_ci	{ }
838c2ecf20Sopenharmony_ci};
848c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, apss_ipq_pll_match_table);
858c2ecf20Sopenharmony_ci
868c2ecf20Sopenharmony_cistatic struct platform_driver apss_ipq_pll_driver = {
878c2ecf20Sopenharmony_ci	.probe = apss_ipq_pll_probe,
888c2ecf20Sopenharmony_ci	.driver = {
898c2ecf20Sopenharmony_ci		.name = "qcom-ipq-apss-pll",
908c2ecf20Sopenharmony_ci		.of_match_table = apss_ipq_pll_match_table,
918c2ecf20Sopenharmony_ci	},
928c2ecf20Sopenharmony_ci};
938c2ecf20Sopenharmony_cimodule_platform_driver(apss_ipq_pll_driver);
948c2ecf20Sopenharmony_ci
958c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("Qualcomm technology Inc APSS ALPHA PLL Driver");
968c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL v2");
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