18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci#ifndef __MACH_MMP_CLK_RESET_H 38c2ecf20Sopenharmony_ci#define __MACH_MMP_CLK_RESET_H 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci#include <linux/reset-controller.h> 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci#define MMP_RESET_INVERT 1 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_cistruct mmp_clk_reset_cell { 108c2ecf20Sopenharmony_ci unsigned int clk_id; 118c2ecf20Sopenharmony_ci void __iomem *reg; 128c2ecf20Sopenharmony_ci u32 bits; 138c2ecf20Sopenharmony_ci unsigned int flags; 148c2ecf20Sopenharmony_ci spinlock_t *lock; 158c2ecf20Sopenharmony_ci}; 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_cistruct mmp_clk_reset_unit { 188c2ecf20Sopenharmony_ci struct reset_controller_dev rcdev; 198c2ecf20Sopenharmony_ci struct mmp_clk_reset_cell *cells; 208c2ecf20Sopenharmony_ci}; 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci#ifdef CONFIG_RESET_CONTROLLER 238c2ecf20Sopenharmony_civoid mmp_clk_reset_register(struct device_node *np, 248c2ecf20Sopenharmony_ci struct mmp_clk_reset_cell *cells, int nr_resets); 258c2ecf20Sopenharmony_ci#else 268c2ecf20Sopenharmony_cistatic inline void mmp_clk_reset_register(struct device_node *np, 278c2ecf20Sopenharmony_ci struct mmp_clk_reset_cell *cells, int nr_resets) 288c2ecf20Sopenharmony_ci{ 298c2ecf20Sopenharmony_ci} 308c2ecf20Sopenharmony_ci#endif 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ci#endif 33