1// SPDX-License-Identifier: GPL-2.0
2//
3// Copyright (c) 2018 MediaTek Inc.
4// Author: Weiyi Lu <weiyi.lu@mediatek.com>
5
6#include <linux/clk-provider.h>
7#include <linux/of_platform.h>
8#include <linux/platform_device.h>
9
10#include "clk-mtk.h"
11#include "clk-gate.h"
12
13#include <dt-bindings/clock/mt8183-clk.h>
14
15static const struct mtk_gate_regs audio0_cg_regs = {
16	.set_ofs = 0x0,
17	.clr_ofs = 0x0,
18	.sta_ofs = 0x0,
19};
20
21static const struct mtk_gate_regs audio1_cg_regs = {
22	.set_ofs = 0x4,
23	.clr_ofs = 0x4,
24	.sta_ofs = 0x4,
25};
26
27#define GATE_AUDIO0(_id, _name, _parent, _shift)		\
28	GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift,	\
29		&mtk_clk_gate_ops_no_setclr)
30
31#define GATE_AUDIO1(_id, _name, _parent, _shift)		\
32	GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift,	\
33		&mtk_clk_gate_ops_no_setclr)
34
35static const struct mtk_gate audio_clks[] = {
36	/* AUDIO0 */
37	GATE_AUDIO0(CLK_AUDIO_AFE, "aud_afe", "audio_sel",
38		2),
39	GATE_AUDIO0(CLK_AUDIO_22M, "aud_22m", "aud_eng1_sel",
40		8),
41	GATE_AUDIO0(CLK_AUDIO_24M, "aud_24m", "aud_eng2_sel",
42		9),
43	GATE_AUDIO0(CLK_AUDIO_APLL2_TUNER, "aud_apll2_tuner", "aud_eng2_sel",
44		18),
45	GATE_AUDIO0(CLK_AUDIO_APLL_TUNER, "aud_apll_tuner", "aud_eng1_sel",
46		19),
47	GATE_AUDIO0(CLK_AUDIO_TDM, "aud_tdm", "apll12_divb",
48		20),
49	GATE_AUDIO0(CLK_AUDIO_ADC, "aud_adc", "audio_sel",
50		24),
51	GATE_AUDIO0(CLK_AUDIO_DAC, "aud_dac", "audio_sel",
52		25),
53	GATE_AUDIO0(CLK_AUDIO_DAC_PREDIS, "aud_dac_predis", "audio_sel",
54		26),
55	GATE_AUDIO0(CLK_AUDIO_TML, "aud_tml", "audio_sel",
56		27),
57	/* AUDIO1 */
58	GATE_AUDIO1(CLK_AUDIO_I2S1, "aud_i2s1", "audio_sel",
59		4),
60	GATE_AUDIO1(CLK_AUDIO_I2S2, "aud_i2s2", "audio_sel",
61		5),
62	GATE_AUDIO1(CLK_AUDIO_I2S3, "aud_i2s3", "audio_sel",
63		6),
64	GATE_AUDIO1(CLK_AUDIO_I2S4, "aud_i2s4", "audio_sel",
65		7),
66	GATE_AUDIO1(CLK_AUDIO_PDN_ADDA6_ADC, "aud_pdn_adda6_adc", "audio_sel",
67		20),
68};
69
70static int clk_mt8183_audio_probe(struct platform_device *pdev)
71{
72	struct clk_onecell_data *clk_data;
73	int r;
74	struct device_node *node = pdev->dev.of_node;
75
76	clk_data = mtk_alloc_clk_data(CLK_AUDIO_NR_CLK);
77
78	mtk_clk_register_gates(node, audio_clks, ARRAY_SIZE(audio_clks),
79			clk_data);
80
81	r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
82	if (r)
83		return r;
84
85	r = devm_of_platform_populate(&pdev->dev);
86	if (r)
87		of_clk_del_provider(node);
88
89	return r;
90}
91
92static const struct of_device_id of_match_clk_mt8183_audio[] = {
93	{ .compatible = "mediatek,mt8183-audiosys", },
94	{}
95};
96
97static struct platform_driver clk_mt8183_audio_drv = {
98	.probe = clk_mt8183_audio_probe,
99	.driver = {
100		.name = "clk-mt8183-audio",
101		.of_match_table = of_match_clk_mt8183_audio,
102	},
103};
104
105builtin_platform_driver(clk_mt8183_audio_drv);
106