18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright (c) 2018 MediaTek Inc. 48c2ecf20Sopenharmony_ci * Author: Owen Chen <owen.chen@mediatek.com> 58c2ecf20Sopenharmony_ci */ 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci#include <linux/clk-provider.h> 88c2ecf20Sopenharmony_ci#include <linux/platform_device.h> 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#include "clk-mtk.h" 118c2ecf20Sopenharmony_ci#include "clk-gate.h" 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci#include <dt-bindings/clock/mt6765-clk.h> 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_cistatic const struct mtk_gate_regs cam_cg_regs = { 168c2ecf20Sopenharmony_ci .set_ofs = 0x4, 178c2ecf20Sopenharmony_ci .clr_ofs = 0x8, 188c2ecf20Sopenharmony_ci .sta_ofs = 0x0, 198c2ecf20Sopenharmony_ci}; 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci#define GATE_CAM(_id, _name, _parent, _shift) { \ 228c2ecf20Sopenharmony_ci .id = _id, \ 238c2ecf20Sopenharmony_ci .name = _name, \ 248c2ecf20Sopenharmony_ci .parent_name = _parent, \ 258c2ecf20Sopenharmony_ci .regs = &cam_cg_regs, \ 268c2ecf20Sopenharmony_ci .shift = _shift, \ 278c2ecf20Sopenharmony_ci .ops = &mtk_clk_gate_ops_setclr, \ 288c2ecf20Sopenharmony_ci } 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_cistatic const struct mtk_gate cam_clks[] = { 318c2ecf20Sopenharmony_ci GATE_CAM(CLK_CAM_LARB3, "cam_larb3", "mm_ck", 0), 328c2ecf20Sopenharmony_ci GATE_CAM(CLK_CAM_DFP_VAD, "cam_dfp_vad", "mm_ck", 1), 338c2ecf20Sopenharmony_ci GATE_CAM(CLK_CAM, "cam", "mm_ck", 6), 348c2ecf20Sopenharmony_ci GATE_CAM(CLK_CAMTG, "camtg", "mm_ck", 7), 358c2ecf20Sopenharmony_ci GATE_CAM(CLK_CAM_SENINF, "cam_seninf", "mm_ck", 8), 368c2ecf20Sopenharmony_ci GATE_CAM(CLK_CAMSV0, "camsv0", "mm_ck", 9), 378c2ecf20Sopenharmony_ci GATE_CAM(CLK_CAMSV1, "camsv1", "mm_ck", 10), 388c2ecf20Sopenharmony_ci GATE_CAM(CLK_CAMSV2, "camsv2", "mm_ck", 11), 398c2ecf20Sopenharmony_ci GATE_CAM(CLK_CAM_CCU, "cam_ccu", "mm_ck", 12), 408c2ecf20Sopenharmony_ci}; 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_cistatic int clk_mt6765_cam_probe(struct platform_device *pdev) 438c2ecf20Sopenharmony_ci{ 448c2ecf20Sopenharmony_ci struct clk_onecell_data *clk_data; 458c2ecf20Sopenharmony_ci int r; 468c2ecf20Sopenharmony_ci struct device_node *node = pdev->dev.of_node; 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci clk_data = mtk_alloc_clk_data(CLK_CAM_NR_CLK); 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci mtk_clk_register_gates(node, cam_clks, ARRAY_SIZE(cam_clks), clk_data); 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci if (r) 558c2ecf20Sopenharmony_ci pr_err("%s(): could not register clock provider: %d\n", 568c2ecf20Sopenharmony_ci __func__, r); 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ci return r; 598c2ecf20Sopenharmony_ci} 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_cistatic const struct of_device_id of_match_clk_mt6765_cam[] = { 628c2ecf20Sopenharmony_ci { .compatible = "mediatek,mt6765-camsys", }, 638c2ecf20Sopenharmony_ci {} 648c2ecf20Sopenharmony_ci}; 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_cistatic struct platform_driver clk_mt6765_cam_drv = { 678c2ecf20Sopenharmony_ci .probe = clk_mt6765_cam_probe, 688c2ecf20Sopenharmony_ci .driver = { 698c2ecf20Sopenharmony_ci .name = "clk-mt6765-cam", 708c2ecf20Sopenharmony_ci .of_match_table = of_match_clk_mt6765_cam, 718c2ecf20Sopenharmony_ci }, 728c2ecf20Sopenharmony_ci}; 738c2ecf20Sopenharmony_ci 748c2ecf20Sopenharmony_cibuiltin_platform_driver(clk_mt6765_cam_drv); 75