18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Hisilicon HiP04 clock driver 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (c) 2013-2014 Hisilicon Limited. 68c2ecf20Sopenharmony_ci * Copyright (c) 2013-2014 Linaro Limited. 78c2ecf20Sopenharmony_ci * 88c2ecf20Sopenharmony_ci * Author: Haojian Zhuang <haojian.zhuang@linaro.org> 98c2ecf20Sopenharmony_ci */ 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci#include <linux/kernel.h> 128c2ecf20Sopenharmony_ci#include <linux/clk-provider.h> 138c2ecf20Sopenharmony_ci#include <linux/io.h> 148c2ecf20Sopenharmony_ci#include <linux/of.h> 158c2ecf20Sopenharmony_ci#include <linux/of_address.h> 168c2ecf20Sopenharmony_ci#include <linux/of_device.h> 178c2ecf20Sopenharmony_ci#include <linux/slab.h> 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci#include <dt-bindings/clock/hip04-clock.h> 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci#include "clk.h" 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci/* fixed rate clocks */ 248c2ecf20Sopenharmony_cistatic struct hisi_fixed_rate_clock hip04_fixed_rate_clks[] __initdata = { 258c2ecf20Sopenharmony_ci { HIP04_OSC50M, "osc50m", NULL, 0, 50000000, }, 268c2ecf20Sopenharmony_ci { HIP04_CLK_50M, "clk50m", NULL, 0, 50000000, }, 278c2ecf20Sopenharmony_ci { HIP04_CLK_168M, "clk168m", NULL, 0, 168750000, }, 288c2ecf20Sopenharmony_ci}; 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_cistatic void __init hip04_clk_init(struct device_node *np) 318c2ecf20Sopenharmony_ci{ 328c2ecf20Sopenharmony_ci struct hisi_clock_data *clk_data; 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ci clk_data = hisi_clk_init(np, HIP04_NR_CLKS); 358c2ecf20Sopenharmony_ci if (!clk_data) 368c2ecf20Sopenharmony_ci return; 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ci hisi_clk_register_fixed_rate(hip04_fixed_rate_clks, 398c2ecf20Sopenharmony_ci ARRAY_SIZE(hip04_fixed_rate_clks), 408c2ecf20Sopenharmony_ci clk_data); 418c2ecf20Sopenharmony_ci} 428c2ecf20Sopenharmony_ciCLK_OF_DECLARE(hip04_clk, "hisilicon,hip04-clock", hip04_clk_init); 43