1// SPDX-License-Identifier: GPL-2.0-or-later 2 /****************************************************************************** 3 * Nuvoton TPM I2C Device Driver Interface for WPCT301/NPCT501/NPCT6XX, 4 * based on the TCG TPM Interface Spec version 1.2. 5 * Specifications at www.trustedcomputinggroup.org 6 * 7 * Copyright (C) 2011, Nuvoton Technology Corporation. 8 * Dan Morav <dan.morav@nuvoton.com> 9 * Copyright (C) 2013, Obsidian Research Corp. 10 * Jason Gunthorpe <jgunthorpe@obsidianresearch.com> 11 * 12 * Nuvoton contact information: APC.Support@nuvoton.com 13 *****************************************************************************/ 14 15#include <linux/init.h> 16#include <linux/module.h> 17#include <linux/moduleparam.h> 18#include <linux/slab.h> 19#include <linux/interrupt.h> 20#include <linux/wait.h> 21#include <linux/i2c.h> 22#include <linux/of_device.h> 23#include "tpm.h" 24 25/* I2C interface offsets */ 26#define TPM_STS 0x00 27#define TPM_BURST_COUNT 0x01 28#define TPM_DATA_FIFO_W 0x20 29#define TPM_DATA_FIFO_R 0x40 30#define TPM_VID_DID_RID 0x60 31#define TPM_I2C_RETRIES 5 32/* 33 * I2C bus device maximum buffer size w/o counting I2C address or command 34 * i.e. max size required for I2C write is 34 = addr, command, 32 bytes data 35 */ 36#define TPM_I2C_MAX_BUF_SIZE 32 37#define TPM_I2C_RETRY_COUNT 32 38#define TPM_I2C_BUS_DELAY 1000 /* usec */ 39#define TPM_I2C_RETRY_DELAY_SHORT (2 * 1000) /* usec */ 40#define TPM_I2C_RETRY_DELAY_LONG (10 * 1000) /* usec */ 41#define TPM_I2C_DELAY_RANGE 300 /* usec */ 42 43#define OF_IS_TPM2 ((void *)1) 44#define I2C_IS_TPM2 1 45 46struct priv_data { 47 int irq; 48 unsigned int intrs; 49 wait_queue_head_t read_queue; 50}; 51 52static s32 i2c_nuvoton_read_buf(struct i2c_client *client, u8 offset, u8 size, 53 u8 *data) 54{ 55 s32 status; 56 57 status = i2c_smbus_read_i2c_block_data(client, offset, size, data); 58 dev_dbg(&client->dev, 59 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__, 60 offset, size, (int)size, data, status); 61 return status; 62} 63 64static s32 i2c_nuvoton_write_buf(struct i2c_client *client, u8 offset, u8 size, 65 u8 *data) 66{ 67 s32 status; 68 69 status = i2c_smbus_write_i2c_block_data(client, offset, size, data); 70 dev_dbg(&client->dev, 71 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__, 72 offset, size, (int)size, data, status); 73 return status; 74} 75 76#define TPM_STS_VALID 0x80 77#define TPM_STS_COMMAND_READY 0x40 78#define TPM_STS_GO 0x20 79#define TPM_STS_DATA_AVAIL 0x10 80#define TPM_STS_EXPECT 0x08 81#define TPM_STS_RESPONSE_RETRY 0x02 82#define TPM_STS_ERR_VAL 0x07 /* bit2...bit0 reads always 0 */ 83 84#define TPM_I2C_SHORT_TIMEOUT 750 /* ms */ 85#define TPM_I2C_LONG_TIMEOUT 2000 /* 2 sec */ 86 87/* read TPM_STS register */ 88static u8 i2c_nuvoton_read_status(struct tpm_chip *chip) 89{ 90 struct i2c_client *client = to_i2c_client(chip->dev.parent); 91 s32 status; 92 u8 data; 93 94 status = i2c_nuvoton_read_buf(client, TPM_STS, 1, &data); 95 if (status <= 0) { 96 dev_err(&chip->dev, "%s() error return %d\n", __func__, 97 status); 98 data = TPM_STS_ERR_VAL; 99 } 100 101 return data; 102} 103 104/* write byte to TPM_STS register */ 105static s32 i2c_nuvoton_write_status(struct i2c_client *client, u8 data) 106{ 107 s32 status; 108 int i; 109 110 /* this causes the current command to be aborted */ 111 for (i = 0, status = -1; i < TPM_I2C_RETRY_COUNT && status < 0; i++) { 112 status = i2c_nuvoton_write_buf(client, TPM_STS, 1, &data); 113 if (status < 0) 114 usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY 115 + TPM_I2C_DELAY_RANGE); 116 } 117 return status; 118} 119 120/* write commandReady to TPM_STS register */ 121static void i2c_nuvoton_ready(struct tpm_chip *chip) 122{ 123 struct i2c_client *client = to_i2c_client(chip->dev.parent); 124 s32 status; 125 126 /* this causes the current command to be aborted */ 127 status = i2c_nuvoton_write_status(client, TPM_STS_COMMAND_READY); 128 if (status < 0) 129 dev_err(&chip->dev, 130 "%s() fail to write TPM_STS.commandReady\n", __func__); 131} 132 133/* read burstCount field from TPM_STS register 134 * return -1 on fail to read */ 135static int i2c_nuvoton_get_burstcount(struct i2c_client *client, 136 struct tpm_chip *chip) 137{ 138 unsigned long stop = jiffies + chip->timeout_d; 139 s32 status; 140 int burst_count = -1; 141 u8 data; 142 143 /* wait for burstcount to be non-zero */ 144 do { 145 /* in I2C burstCount is 1 byte */ 146 status = i2c_nuvoton_read_buf(client, TPM_BURST_COUNT, 1, 147 &data); 148 if (status > 0 && data > 0) { 149 burst_count = min_t(u8, TPM_I2C_MAX_BUF_SIZE, data); 150 break; 151 } 152 usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY 153 + TPM_I2C_DELAY_RANGE); 154 } while (time_before(jiffies, stop)); 155 156 return burst_count; 157} 158 159/* 160 * WPCT301/NPCT501/NPCT6XX SINT# supports only dataAvail 161 * any call to this function which is not waiting for dataAvail will 162 * set queue to NULL to avoid waiting for interrupt 163 */ 164static bool i2c_nuvoton_check_status(struct tpm_chip *chip, u8 mask, u8 value) 165{ 166 u8 status = i2c_nuvoton_read_status(chip); 167 return (status != TPM_STS_ERR_VAL) && ((status & mask) == value); 168} 169 170static int i2c_nuvoton_wait_for_stat(struct tpm_chip *chip, u8 mask, u8 value, 171 u32 timeout, wait_queue_head_t *queue) 172{ 173 if ((chip->flags & TPM_CHIP_FLAG_IRQ) && queue) { 174 s32 rc; 175 struct priv_data *priv = dev_get_drvdata(&chip->dev); 176 unsigned int cur_intrs = priv->intrs; 177 178 enable_irq(priv->irq); 179 rc = wait_event_interruptible_timeout(*queue, 180 cur_intrs != priv->intrs, 181 timeout); 182 if (rc > 0) 183 return 0; 184 /* At this point we know that the SINT pin is asserted, so we 185 * do not need to do i2c_nuvoton_check_status */ 186 } else { 187 unsigned long ten_msec, stop; 188 bool status_valid; 189 190 /* check current status */ 191 status_valid = i2c_nuvoton_check_status(chip, mask, value); 192 if (status_valid) 193 return 0; 194 195 /* use polling to wait for the event */ 196 ten_msec = jiffies + usecs_to_jiffies(TPM_I2C_RETRY_DELAY_LONG); 197 stop = jiffies + timeout; 198 do { 199 if (time_before(jiffies, ten_msec)) 200 usleep_range(TPM_I2C_RETRY_DELAY_SHORT, 201 TPM_I2C_RETRY_DELAY_SHORT 202 + TPM_I2C_DELAY_RANGE); 203 else 204 usleep_range(TPM_I2C_RETRY_DELAY_LONG, 205 TPM_I2C_RETRY_DELAY_LONG 206 + TPM_I2C_DELAY_RANGE); 207 status_valid = i2c_nuvoton_check_status(chip, mask, 208 value); 209 if (status_valid) 210 return 0; 211 } while (time_before(jiffies, stop)); 212 } 213 dev_err(&chip->dev, "%s(%02x, %02x) -> timeout\n", __func__, mask, 214 value); 215 return -ETIMEDOUT; 216} 217 218/* wait for dataAvail field to be set in the TPM_STS register */ 219static int i2c_nuvoton_wait_for_data_avail(struct tpm_chip *chip, u32 timeout, 220 wait_queue_head_t *queue) 221{ 222 return i2c_nuvoton_wait_for_stat(chip, 223 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 224 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 225 timeout, queue); 226} 227 228/* Read @count bytes into @buf from TPM_RD_FIFO register */ 229static int i2c_nuvoton_recv_data(struct i2c_client *client, 230 struct tpm_chip *chip, u8 *buf, size_t count) 231{ 232 struct priv_data *priv = dev_get_drvdata(&chip->dev); 233 s32 rc; 234 int burst_count, bytes2read, size = 0; 235 236 while (size < count && 237 i2c_nuvoton_wait_for_data_avail(chip, 238 chip->timeout_c, 239 &priv->read_queue) == 0) { 240 burst_count = i2c_nuvoton_get_burstcount(client, chip); 241 if (burst_count < 0) { 242 dev_err(&chip->dev, 243 "%s() fail to read burstCount=%d\n", __func__, 244 burst_count); 245 return -EIO; 246 } 247 bytes2read = min_t(size_t, burst_count, count - size); 248 rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_R, 249 bytes2read, &buf[size]); 250 if (rc < 0) { 251 dev_err(&chip->dev, 252 "%s() fail on i2c_nuvoton_read_buf()=%d\n", 253 __func__, rc); 254 return -EIO; 255 } 256 dev_dbg(&chip->dev, "%s(%d):", __func__, bytes2read); 257 size += bytes2read; 258 } 259 260 return size; 261} 262 263/* Read TPM command results */ 264static int i2c_nuvoton_recv(struct tpm_chip *chip, u8 *buf, size_t count) 265{ 266 struct priv_data *priv = dev_get_drvdata(&chip->dev); 267 struct device *dev = chip->dev.parent; 268 struct i2c_client *client = to_i2c_client(dev); 269 s32 rc; 270 int status; 271 int burst_count; 272 int retries; 273 int size = 0; 274 u32 expected; 275 276 if (count < TPM_HEADER_SIZE) { 277 i2c_nuvoton_ready(chip); /* return to idle */ 278 dev_err(dev, "%s() count < header size\n", __func__); 279 return -EIO; 280 } 281 for (retries = 0; retries < TPM_I2C_RETRIES; retries++) { 282 if (retries > 0) { 283 /* if this is not the first trial, set responseRetry */ 284 i2c_nuvoton_write_status(client, 285 TPM_STS_RESPONSE_RETRY); 286 } 287 /* 288 * read first available (> 10 bytes), including: 289 * tag, paramsize, and result 290 */ 291 status = i2c_nuvoton_wait_for_data_avail( 292 chip, chip->timeout_c, &priv->read_queue); 293 if (status != 0) { 294 dev_err(dev, "%s() timeout on dataAvail\n", __func__); 295 size = -ETIMEDOUT; 296 continue; 297 } 298 burst_count = i2c_nuvoton_get_burstcount(client, chip); 299 if (burst_count < 0) { 300 dev_err(dev, "%s() fail to get burstCount\n", __func__); 301 size = -EIO; 302 continue; 303 } 304 size = i2c_nuvoton_recv_data(client, chip, buf, 305 burst_count); 306 if (size < TPM_HEADER_SIZE) { 307 dev_err(dev, "%s() fail to read header\n", __func__); 308 size = -EIO; 309 continue; 310 } 311 /* 312 * convert number of expected bytes field from big endian 32 bit 313 * to machine native 314 */ 315 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 316 if (expected > count || expected < size) { 317 dev_err(dev, "%s() expected > count\n", __func__); 318 size = -EIO; 319 continue; 320 } 321 rc = i2c_nuvoton_recv_data(client, chip, &buf[size], 322 expected - size); 323 size += rc; 324 if (rc < 0 || size < expected) { 325 dev_err(dev, "%s() fail to read remainder of result\n", 326 __func__); 327 size = -EIO; 328 continue; 329 } 330 if (i2c_nuvoton_wait_for_stat( 331 chip, TPM_STS_VALID | TPM_STS_DATA_AVAIL, 332 TPM_STS_VALID, chip->timeout_c, 333 NULL)) { 334 dev_err(dev, "%s() error left over data\n", __func__); 335 size = -ETIMEDOUT; 336 continue; 337 } 338 break; 339 } 340 i2c_nuvoton_ready(chip); 341 dev_dbg(&chip->dev, "%s() -> %d\n", __func__, size); 342 return size; 343} 344 345/* 346 * Send TPM command. 347 * 348 * If interrupts are used (signaled by an irq set in the vendor structure) 349 * tpm.c can skip polling for the data to be available as the interrupt is 350 * waited for here 351 */ 352static int i2c_nuvoton_send(struct tpm_chip *chip, u8 *buf, size_t len) 353{ 354 struct priv_data *priv = dev_get_drvdata(&chip->dev); 355 struct device *dev = chip->dev.parent; 356 struct i2c_client *client = to_i2c_client(dev); 357 u32 ordinal; 358 unsigned long duration; 359 size_t count = 0; 360 int burst_count, bytes2write, retries, rc = -EIO; 361 362 for (retries = 0; retries < TPM_RETRY; retries++) { 363 i2c_nuvoton_ready(chip); 364 if (i2c_nuvoton_wait_for_stat(chip, TPM_STS_COMMAND_READY, 365 TPM_STS_COMMAND_READY, 366 chip->timeout_b, NULL)) { 367 dev_err(dev, "%s() timeout on commandReady\n", 368 __func__); 369 rc = -EIO; 370 continue; 371 } 372 rc = 0; 373 while (count < len - 1) { 374 burst_count = i2c_nuvoton_get_burstcount(client, 375 chip); 376 if (burst_count < 0) { 377 dev_err(dev, "%s() fail get burstCount\n", 378 __func__); 379 rc = -EIO; 380 break; 381 } 382 bytes2write = min_t(size_t, burst_count, 383 len - 1 - count); 384 rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 385 bytes2write, &buf[count]); 386 if (rc < 0) { 387 dev_err(dev, "%s() fail i2cWriteBuf\n", 388 __func__); 389 break; 390 } 391 dev_dbg(dev, "%s(%d):", __func__, bytes2write); 392 count += bytes2write; 393 rc = i2c_nuvoton_wait_for_stat(chip, 394 TPM_STS_VALID | 395 TPM_STS_EXPECT, 396 TPM_STS_VALID | 397 TPM_STS_EXPECT, 398 chip->timeout_c, 399 NULL); 400 if (rc < 0) { 401 dev_err(dev, "%s() timeout on Expect\n", 402 __func__); 403 rc = -ETIMEDOUT; 404 break; 405 } 406 } 407 if (rc < 0) 408 continue; 409 410 /* write last byte */ 411 rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 1, 412 &buf[count]); 413 if (rc < 0) { 414 dev_err(dev, "%s() fail to write last byte\n", 415 __func__); 416 rc = -EIO; 417 continue; 418 } 419 dev_dbg(dev, "%s(last): %02x", __func__, buf[count]); 420 rc = i2c_nuvoton_wait_for_stat(chip, 421 TPM_STS_VALID | TPM_STS_EXPECT, 422 TPM_STS_VALID, 423 chip->timeout_c, NULL); 424 if (rc) { 425 dev_err(dev, "%s() timeout on Expect to clear\n", 426 __func__); 427 rc = -ETIMEDOUT; 428 continue; 429 } 430 break; 431 } 432 if (rc < 0) { 433 /* retries == TPM_RETRY */ 434 i2c_nuvoton_ready(chip); 435 return rc; 436 } 437 /* execute the TPM command */ 438 rc = i2c_nuvoton_write_status(client, TPM_STS_GO); 439 if (rc < 0) { 440 dev_err(dev, "%s() fail to write Go\n", __func__); 441 i2c_nuvoton_ready(chip); 442 return rc; 443 } 444 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 445 duration = tpm_calc_ordinal_duration(chip, ordinal); 446 447 rc = i2c_nuvoton_wait_for_data_avail(chip, duration, &priv->read_queue); 448 if (rc) { 449 dev_err(dev, "%s() timeout command duration %ld\n", 450 __func__, duration); 451 i2c_nuvoton_ready(chip); 452 return rc; 453 } 454 455 dev_dbg(dev, "%s() -> %zd\n", __func__, len); 456 return 0; 457} 458 459static bool i2c_nuvoton_req_canceled(struct tpm_chip *chip, u8 status) 460{ 461 return (status == TPM_STS_COMMAND_READY); 462} 463 464static const struct tpm_class_ops tpm_i2c = { 465 .flags = TPM_OPS_AUTO_STARTUP, 466 .status = i2c_nuvoton_read_status, 467 .recv = i2c_nuvoton_recv, 468 .send = i2c_nuvoton_send, 469 .cancel = i2c_nuvoton_ready, 470 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 471 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 472 .req_canceled = i2c_nuvoton_req_canceled, 473}; 474 475/* The only purpose for the handler is to signal to any waiting threads that 476 * the interrupt is currently being asserted. The driver does not do any 477 * processing triggered by interrupts, and the chip provides no way to mask at 478 * the source (plus that would be slow over I2C). Run the IRQ as a one-shot, 479 * this means it cannot be shared. */ 480static irqreturn_t i2c_nuvoton_int_handler(int dummy, void *dev_id) 481{ 482 struct tpm_chip *chip = dev_id; 483 struct priv_data *priv = dev_get_drvdata(&chip->dev); 484 485 priv->intrs++; 486 wake_up(&priv->read_queue); 487 disable_irq_nosync(priv->irq); 488 return IRQ_HANDLED; 489} 490 491static int get_vid(struct i2c_client *client, u32 *res) 492{ 493 static const u8 vid_did_rid_value[] = { 0x50, 0x10, 0xfe }; 494 u32 temp; 495 s32 rc; 496 497 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 498 return -ENODEV; 499 rc = i2c_nuvoton_read_buf(client, TPM_VID_DID_RID, 4, (u8 *)&temp); 500 if (rc < 0) 501 return rc; 502 503 /* check WPCT301 values - ignore RID */ 504 if (memcmp(&temp, vid_did_rid_value, sizeof(vid_did_rid_value))) { 505 /* 506 * f/w rev 2.81 has an issue where the VID_DID_RID is not 507 * reporting the right value. so give it another chance at 508 * offset 0x20 (FIFO_W). 509 */ 510 rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_W, 4, 511 (u8 *) (&temp)); 512 if (rc < 0) 513 return rc; 514 515 /* check WPCT301 values - ignore RID */ 516 if (memcmp(&temp, vid_did_rid_value, 517 sizeof(vid_did_rid_value))) 518 return -ENODEV; 519 } 520 521 *res = temp; 522 return 0; 523} 524 525static int i2c_nuvoton_probe(struct i2c_client *client, 526 const struct i2c_device_id *id) 527{ 528 int rc; 529 struct tpm_chip *chip; 530 struct device *dev = &client->dev; 531 struct priv_data *priv; 532 u32 vid = 0; 533 534 rc = get_vid(client, &vid); 535 if (rc) 536 return rc; 537 538 dev_info(dev, "VID: %04X DID: %02X RID: %02X\n", (u16) vid, 539 (u8) (vid >> 16), (u8) (vid >> 24)); 540 541 chip = tpmm_chip_alloc(dev, &tpm_i2c); 542 if (IS_ERR(chip)) 543 return PTR_ERR(chip); 544 545 priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL); 546 if (!priv) 547 return -ENOMEM; 548 549 if (dev->of_node) { 550 const struct of_device_id *of_id; 551 552 of_id = of_match_device(dev->driver->of_match_table, dev); 553 if (of_id && of_id->data == OF_IS_TPM2) 554 chip->flags |= TPM_CHIP_FLAG_TPM2; 555 } else 556 if (id->driver_data == I2C_IS_TPM2) 557 chip->flags |= TPM_CHIP_FLAG_TPM2; 558 559 init_waitqueue_head(&priv->read_queue); 560 561 /* Default timeouts */ 562 chip->timeout_a = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT); 563 chip->timeout_b = msecs_to_jiffies(TPM_I2C_LONG_TIMEOUT); 564 chip->timeout_c = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT); 565 chip->timeout_d = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT); 566 567 dev_set_drvdata(&chip->dev, priv); 568 569 /* 570 * I2C intfcaps (interrupt capabilitieis) in the chip are hard coded to: 571 * TPM_INTF_INT_LEVEL_LOW | TPM_INTF_DATA_AVAIL_INT 572 * The IRQ should be set in the i2c_board_info (which is done 573 * automatically in of_i2c_register_devices, for device tree users */ 574 priv->irq = client->irq; 575 if (client->irq) { 576 dev_dbg(dev, "%s() priv->irq\n", __func__); 577 rc = devm_request_irq(dev, client->irq, 578 i2c_nuvoton_int_handler, 579 IRQF_TRIGGER_LOW, 580 dev_name(&chip->dev), 581 chip); 582 if (rc) { 583 dev_err(dev, "%s() Unable to request irq: %d for use\n", 584 __func__, priv->irq); 585 priv->irq = 0; 586 } else { 587 chip->flags |= TPM_CHIP_FLAG_IRQ; 588 /* Clear any pending interrupt */ 589 i2c_nuvoton_ready(chip); 590 /* - wait for TPM_STS==0xA0 (stsValid, commandReady) */ 591 rc = i2c_nuvoton_wait_for_stat(chip, 592 TPM_STS_COMMAND_READY, 593 TPM_STS_COMMAND_READY, 594 chip->timeout_b, 595 NULL); 596 if (rc == 0) { 597 /* 598 * TIS is in ready state 599 * write dummy byte to enter reception state 600 * TPM_DATA_FIFO_W <- rc (0) 601 */ 602 rc = i2c_nuvoton_write_buf(client, 603 TPM_DATA_FIFO_W, 604 1, (u8 *) (&rc)); 605 if (rc < 0) 606 return rc; 607 /* TPM_STS <- 0x40 (commandReady) */ 608 i2c_nuvoton_ready(chip); 609 } else { 610 /* 611 * timeout_b reached - command was 612 * aborted. TIS should now be in idle state - 613 * only TPM_STS_VALID should be set 614 */ 615 if (i2c_nuvoton_read_status(chip) != 616 TPM_STS_VALID) 617 return -EIO; 618 } 619 } 620 } 621 622 return tpm_chip_register(chip); 623} 624 625static int i2c_nuvoton_remove(struct i2c_client *client) 626{ 627 struct tpm_chip *chip = i2c_get_clientdata(client); 628 629 tpm_chip_unregister(chip); 630 return 0; 631} 632 633static const struct i2c_device_id i2c_nuvoton_id[] = { 634 {"tpm_i2c_nuvoton"}, 635 {"tpm2_i2c_nuvoton", .driver_data = I2C_IS_TPM2}, 636 {} 637}; 638MODULE_DEVICE_TABLE(i2c, i2c_nuvoton_id); 639 640#ifdef CONFIG_OF 641static const struct of_device_id i2c_nuvoton_of_match[] = { 642 {.compatible = "nuvoton,npct501"}, 643 {.compatible = "winbond,wpct301"}, 644 {.compatible = "nuvoton,npct601", .data = OF_IS_TPM2}, 645 {}, 646}; 647MODULE_DEVICE_TABLE(of, i2c_nuvoton_of_match); 648#endif 649 650static SIMPLE_DEV_PM_OPS(i2c_nuvoton_pm_ops, tpm_pm_suspend, tpm_pm_resume); 651 652static struct i2c_driver i2c_nuvoton_driver = { 653 .id_table = i2c_nuvoton_id, 654 .probe = i2c_nuvoton_probe, 655 .remove = i2c_nuvoton_remove, 656 .driver = { 657 .name = "tpm_i2c_nuvoton", 658 .pm = &i2c_nuvoton_pm_ops, 659 .of_match_table = of_match_ptr(i2c_nuvoton_of_match), 660 }, 661}; 662 663module_i2c_driver(i2c_nuvoton_driver); 664 665MODULE_AUTHOR("Dan Morav (dan.morav@nuvoton.com)"); 666MODULE_DESCRIPTION("Nuvoton TPM I2C Driver"); 667MODULE_LICENSE("GPL"); 668