1/*
2 * RSB (Reduced Serial Bus) driver.
3 *
4 * Author: Chen-Yu Tsai <wens@csie.org>
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2.  This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 *
10 * The RSB controller looks like an SMBus controller which only supports
11 * byte and word data transfers. But, it differs from standard SMBus
12 * protocol on several aspects:
13 * - it uses addresses set at runtime to address slaves. Runtime addresses
14 *   are sent to slaves using their 12bit hardware addresses. Up to 15
15 *   runtime addresses are available.
16 * - it adds a parity bit every 8bits of data and address for read and
17 *   write accesses; this replaces the ack bit
18 * - only one read access is required to read a byte (instead of a write
19 *   followed by a read access in standard SMBus protocol)
20 * - there's no Ack bit after each read access
21 *
22 * This means this bus cannot be used to interface with standard SMBus
23 * devices. Devices known to support this interface include the AXP223,
24 * AXP809, and AXP806 PMICs, and the AC100 audio codec, all from X-Powers.
25 *
26 * A description of the operation and wire protocol can be found in the
27 * RSB section of Allwinner's A80 user manual, which can be found at
28 *
29 *     https://github.com/allwinner-zh/documents/tree/master/A80
30 *
31 * This document is officially released by Allwinner.
32 *
33 * This driver is based on i2c-sun6i-p2wi.c, the P2WI bus driver.
34 *
35 */
36
37#include <linux/clk.h>
38#include <linux/clk/clk-conf.h>
39#include <linux/device.h>
40#include <linux/interrupt.h>
41#include <linux/io.h>
42#include <linux/iopoll.h>
43#include <linux/module.h>
44#include <linux/of.h>
45#include <linux/of_irq.h>
46#include <linux/of_platform.h>
47#include <linux/platform_device.h>
48#include <linux/regmap.h>
49#include <linux/reset.h>
50#include <linux/slab.h>
51#include <linux/sunxi-rsb.h>
52#include <linux/types.h>
53
54/* RSB registers */
55#define RSB_CTRL	0x0	/* Global control */
56#define RSB_CCR		0x4	/* Clock control */
57#define RSB_INTE	0x8	/* Interrupt controls */
58#define RSB_INTS	0xc	/* Interrupt status */
59#define RSB_ADDR	0x10	/* Address to send with read/write command */
60#define RSB_DATA	0x1c	/* Data to read/write */
61#define RSB_LCR		0x24	/* Line control */
62#define RSB_DMCR	0x28	/* Device mode (init) control */
63#define RSB_CMD		0x2c	/* RSB Command */
64#define RSB_DAR		0x30	/* Device address / runtime address */
65
66/* CTRL fields */
67#define RSB_CTRL_START_TRANS		BIT(7)
68#define RSB_CTRL_ABORT_TRANS		BIT(6)
69#define RSB_CTRL_GLOBAL_INT_ENB		BIT(1)
70#define RSB_CTRL_SOFT_RST		BIT(0)
71
72/* CLK CTRL fields */
73#define RSB_CCR_SDA_OUT_DELAY(v)	(((v) & 0x7) << 8)
74#define RSB_CCR_MAX_CLK_DIV		0xff
75#define RSB_CCR_CLK_DIV(v)		((v) & RSB_CCR_MAX_CLK_DIV)
76
77/* STATUS fields */
78#define RSB_INTS_TRANS_ERR_ACK		BIT(16)
79#define RSB_INTS_TRANS_ERR_DATA_BIT(v)	(((v) >> 8) & 0xf)
80#define RSB_INTS_TRANS_ERR_DATA		GENMASK(11, 8)
81#define RSB_INTS_LOAD_BSY		BIT(2)
82#define RSB_INTS_TRANS_ERR		BIT(1)
83#define RSB_INTS_TRANS_OVER		BIT(0)
84
85/* LINE CTRL fields*/
86#define RSB_LCR_SCL_STATE		BIT(5)
87#define RSB_LCR_SDA_STATE		BIT(4)
88#define RSB_LCR_SCL_CTL			BIT(3)
89#define RSB_LCR_SCL_CTL_EN		BIT(2)
90#define RSB_LCR_SDA_CTL			BIT(1)
91#define RSB_LCR_SDA_CTL_EN		BIT(0)
92
93/* DEVICE MODE CTRL field values */
94#define RSB_DMCR_DEVICE_START		BIT(31)
95#define RSB_DMCR_MODE_DATA		(0x7c << 16)
96#define RSB_DMCR_MODE_REG		(0x3e << 8)
97#define RSB_DMCR_DEV_ADDR		0x00
98
99/* CMD values */
100#define RSB_CMD_RD8			0x8b
101#define RSB_CMD_RD16			0x9c
102#define RSB_CMD_RD32			0xa6
103#define RSB_CMD_WR8			0x4e
104#define RSB_CMD_WR16			0x59
105#define RSB_CMD_WR32			0x63
106#define RSB_CMD_STRA			0xe8
107
108/* DAR fields */
109#define RSB_DAR_RTA(v)			(((v) & 0xff) << 16)
110#define RSB_DAR_DA(v)			((v) & 0xffff)
111
112#define RSB_MAX_FREQ			20000000
113
114#define RSB_CTRL_NAME			"sunxi-rsb"
115
116struct sunxi_rsb_addr_map {
117	u16 hwaddr;
118	u8 rtaddr;
119};
120
121struct sunxi_rsb {
122	struct device *dev;
123	void __iomem *regs;
124	struct clk *clk;
125	struct reset_control *rstc;
126	struct completion complete;
127	struct mutex lock;
128	unsigned int status;
129};
130
131/* bus / slave device related functions */
132static struct bus_type sunxi_rsb_bus;
133
134static int sunxi_rsb_device_match(struct device *dev, struct device_driver *drv)
135{
136	return of_driver_match_device(dev, drv);
137}
138
139static int sunxi_rsb_device_probe(struct device *dev)
140{
141	const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver);
142	struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
143	int ret;
144
145	if (!drv->probe)
146		return -ENODEV;
147
148	if (!rdev->irq) {
149		int irq = -ENOENT;
150
151		if (dev->of_node)
152			irq = of_irq_get(dev->of_node, 0);
153
154		if (irq == -EPROBE_DEFER)
155			return irq;
156		if (irq < 0)
157			irq = 0;
158
159		rdev->irq = irq;
160	}
161
162	ret = of_clk_set_defaults(dev->of_node, false);
163	if (ret < 0)
164		return ret;
165
166	return drv->probe(rdev);
167}
168
169static int sunxi_rsb_device_remove(struct device *dev)
170{
171	const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver);
172
173	return drv->remove(to_sunxi_rsb_device(dev));
174}
175
176static struct bus_type sunxi_rsb_bus = {
177	.name		= RSB_CTRL_NAME,
178	.match		= sunxi_rsb_device_match,
179	.probe		= sunxi_rsb_device_probe,
180	.remove		= sunxi_rsb_device_remove,
181	.uevent		= of_device_uevent_modalias,
182};
183
184static void sunxi_rsb_dev_release(struct device *dev)
185{
186	struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
187
188	kfree(rdev);
189}
190
191/**
192 * sunxi_rsb_device_create() - allocate and add an RSB device
193 * @rsb:	RSB controller
194 * @node:	RSB slave device node
195 * @hwaddr:	RSB slave hardware address
196 * @rtaddr:	RSB slave runtime address
197 */
198static struct sunxi_rsb_device *sunxi_rsb_device_create(struct sunxi_rsb *rsb,
199		struct device_node *node, u16 hwaddr, u8 rtaddr)
200{
201	int err;
202	struct sunxi_rsb_device *rdev;
203
204	rdev = kzalloc(sizeof(*rdev), GFP_KERNEL);
205	if (!rdev)
206		return ERR_PTR(-ENOMEM);
207
208	rdev->rsb = rsb;
209	rdev->hwaddr = hwaddr;
210	rdev->rtaddr = rtaddr;
211	rdev->dev.bus = &sunxi_rsb_bus;
212	rdev->dev.parent = rsb->dev;
213	rdev->dev.of_node = node;
214	rdev->dev.release = sunxi_rsb_dev_release;
215
216	dev_set_name(&rdev->dev, "%s-%x", RSB_CTRL_NAME, hwaddr);
217
218	err = device_register(&rdev->dev);
219	if (err < 0) {
220		dev_err(&rdev->dev, "Can't add %s, status %d\n",
221			dev_name(&rdev->dev), err);
222		goto err_device_add;
223	}
224
225	dev_dbg(&rdev->dev, "device %s registered\n", dev_name(&rdev->dev));
226
227	return rdev;
228
229err_device_add:
230	put_device(&rdev->dev);
231
232	return ERR_PTR(err);
233}
234
235/**
236 * sunxi_rsb_device_unregister(): unregister an RSB device
237 * @rdev:	rsb_device to be removed
238 */
239static void sunxi_rsb_device_unregister(struct sunxi_rsb_device *rdev)
240{
241	device_unregister(&rdev->dev);
242}
243
244static int sunxi_rsb_remove_devices(struct device *dev, void *data)
245{
246	struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
247
248	if (dev->bus == &sunxi_rsb_bus)
249		sunxi_rsb_device_unregister(rdev);
250
251	return 0;
252}
253
254/**
255 * sunxi_rsb_driver_register() - Register device driver with RSB core
256 * @rdrv:	device driver to be associated with slave-device.
257 *
258 * This API will register the client driver with the RSB framework.
259 * It is typically called from the driver's module-init function.
260 */
261int sunxi_rsb_driver_register(struct sunxi_rsb_driver *rdrv)
262{
263	rdrv->driver.bus = &sunxi_rsb_bus;
264	return driver_register(&rdrv->driver);
265}
266EXPORT_SYMBOL_GPL(sunxi_rsb_driver_register);
267
268/* common code that starts a transfer */
269static int _sunxi_rsb_run_xfer(struct sunxi_rsb *rsb)
270{
271	u32 int_mask, status;
272	bool timeout;
273
274	if (readl(rsb->regs + RSB_CTRL) & RSB_CTRL_START_TRANS) {
275		dev_dbg(rsb->dev, "RSB transfer still in progress\n");
276		return -EBUSY;
277	}
278
279	reinit_completion(&rsb->complete);
280
281	int_mask = RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR | RSB_INTS_TRANS_OVER;
282	writel(int_mask, rsb->regs + RSB_INTE);
283	writel(RSB_CTRL_START_TRANS | RSB_CTRL_GLOBAL_INT_ENB,
284	       rsb->regs + RSB_CTRL);
285
286	if (irqs_disabled()) {
287		timeout = readl_poll_timeout_atomic(rsb->regs + RSB_INTS,
288						    status, (status & int_mask),
289						    10, 100000);
290		writel(status, rsb->regs + RSB_INTS);
291	} else {
292		timeout = !wait_for_completion_io_timeout(&rsb->complete,
293							  msecs_to_jiffies(100));
294		status = rsb->status;
295	}
296
297	if (timeout) {
298		dev_dbg(rsb->dev, "RSB timeout\n");
299
300		/* abort the transfer */
301		writel(RSB_CTRL_ABORT_TRANS, rsb->regs + RSB_CTRL);
302
303		/* clear any interrupt flags */
304		writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS);
305
306		return -ETIMEDOUT;
307	}
308
309	if (status & RSB_INTS_LOAD_BSY) {
310		dev_dbg(rsb->dev, "RSB busy\n");
311		return -EBUSY;
312	}
313
314	if (status & RSB_INTS_TRANS_ERR) {
315		if (status & RSB_INTS_TRANS_ERR_ACK) {
316			dev_dbg(rsb->dev, "RSB slave nack\n");
317			return -EINVAL;
318		}
319
320		if (status & RSB_INTS_TRANS_ERR_DATA) {
321			dev_dbg(rsb->dev, "RSB transfer data error\n");
322			return -EIO;
323		}
324	}
325
326	return 0;
327}
328
329static int sunxi_rsb_read(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
330			  u32 *buf, size_t len)
331{
332	u32 cmd;
333	int ret;
334
335	if (!buf)
336		return -EINVAL;
337
338	switch (len) {
339	case 1:
340		cmd = RSB_CMD_RD8;
341		break;
342	case 2:
343		cmd = RSB_CMD_RD16;
344		break;
345	case 4:
346		cmd = RSB_CMD_RD32;
347		break;
348	default:
349		dev_err(rsb->dev, "Invalid access width: %zd\n", len);
350		return -EINVAL;
351	}
352
353	mutex_lock(&rsb->lock);
354
355	writel(addr, rsb->regs + RSB_ADDR);
356	writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
357	writel(cmd, rsb->regs + RSB_CMD);
358
359	ret = _sunxi_rsb_run_xfer(rsb);
360	if (ret)
361		goto unlock;
362
363	*buf = readl(rsb->regs + RSB_DATA) & GENMASK(len * 8 - 1, 0);
364
365unlock:
366	mutex_unlock(&rsb->lock);
367
368	return ret;
369}
370
371static int sunxi_rsb_write(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
372			   const u32 *buf, size_t len)
373{
374	u32 cmd;
375	int ret;
376
377	if (!buf)
378		return -EINVAL;
379
380	switch (len) {
381	case 1:
382		cmd = RSB_CMD_WR8;
383		break;
384	case 2:
385		cmd = RSB_CMD_WR16;
386		break;
387	case 4:
388		cmd = RSB_CMD_WR32;
389		break;
390	default:
391		dev_err(rsb->dev, "Invalid access width: %zd\n", len);
392		return -EINVAL;
393	}
394
395	mutex_lock(&rsb->lock);
396
397	writel(addr, rsb->regs + RSB_ADDR);
398	writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
399	writel(*buf, rsb->regs + RSB_DATA);
400	writel(cmd, rsb->regs + RSB_CMD);
401	ret = _sunxi_rsb_run_xfer(rsb);
402
403	mutex_unlock(&rsb->lock);
404
405	return ret;
406}
407
408/* RSB regmap functions */
409struct sunxi_rsb_ctx {
410	struct sunxi_rsb_device *rdev;
411	int size;
412};
413
414static int regmap_sunxi_rsb_reg_read(void *context, unsigned int reg,
415				     unsigned int *val)
416{
417	struct sunxi_rsb_ctx *ctx = context;
418	struct sunxi_rsb_device *rdev = ctx->rdev;
419
420	if (reg > 0xff)
421		return -EINVAL;
422
423	return sunxi_rsb_read(rdev->rsb, rdev->rtaddr, reg, val, ctx->size);
424}
425
426static int regmap_sunxi_rsb_reg_write(void *context, unsigned int reg,
427				      unsigned int val)
428{
429	struct sunxi_rsb_ctx *ctx = context;
430	struct sunxi_rsb_device *rdev = ctx->rdev;
431
432	return sunxi_rsb_write(rdev->rsb, rdev->rtaddr, reg, &val, ctx->size);
433}
434
435static void regmap_sunxi_rsb_free_ctx(void *context)
436{
437	struct sunxi_rsb_ctx *ctx = context;
438
439	kfree(ctx);
440}
441
442static struct regmap_bus regmap_sunxi_rsb = {
443	.reg_write = regmap_sunxi_rsb_reg_write,
444	.reg_read = regmap_sunxi_rsb_reg_read,
445	.free_context = regmap_sunxi_rsb_free_ctx,
446	.reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
447	.val_format_endian_default = REGMAP_ENDIAN_NATIVE,
448};
449
450static struct sunxi_rsb_ctx *regmap_sunxi_rsb_init_ctx(struct sunxi_rsb_device *rdev,
451		const struct regmap_config *config)
452{
453	struct sunxi_rsb_ctx *ctx;
454
455	switch (config->val_bits) {
456	case 8:
457	case 16:
458	case 32:
459		break;
460	default:
461		return ERR_PTR(-EINVAL);
462	}
463
464	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
465	if (!ctx)
466		return ERR_PTR(-ENOMEM);
467
468	ctx->rdev = rdev;
469	ctx->size = config->val_bits / 8;
470
471	return ctx;
472}
473
474struct regmap *__devm_regmap_init_sunxi_rsb(struct sunxi_rsb_device *rdev,
475					    const struct regmap_config *config,
476					    struct lock_class_key *lock_key,
477					    const char *lock_name)
478{
479	struct sunxi_rsb_ctx *ctx = regmap_sunxi_rsb_init_ctx(rdev, config);
480
481	if (IS_ERR(ctx))
482		return ERR_CAST(ctx);
483
484	return __devm_regmap_init(&rdev->dev, &regmap_sunxi_rsb, ctx, config,
485				  lock_key, lock_name);
486}
487EXPORT_SYMBOL_GPL(__devm_regmap_init_sunxi_rsb);
488
489/* RSB controller driver functions */
490static irqreturn_t sunxi_rsb_irq(int irq, void *dev_id)
491{
492	struct sunxi_rsb *rsb = dev_id;
493	u32 status;
494
495	status = readl(rsb->regs + RSB_INTS);
496	rsb->status = status;
497
498	/* Clear interrupts */
499	status &= (RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR |
500		   RSB_INTS_TRANS_OVER);
501	writel(status, rsb->regs + RSB_INTS);
502
503	complete(&rsb->complete);
504
505	return IRQ_HANDLED;
506}
507
508static int sunxi_rsb_init_device_mode(struct sunxi_rsb *rsb)
509{
510	int ret = 0;
511	u32 reg;
512
513	/* send init sequence */
514	writel(RSB_DMCR_DEVICE_START | RSB_DMCR_MODE_DATA |
515	       RSB_DMCR_MODE_REG | RSB_DMCR_DEV_ADDR, rsb->regs + RSB_DMCR);
516
517	readl_poll_timeout(rsb->regs + RSB_DMCR, reg,
518			   !(reg & RSB_DMCR_DEVICE_START), 100, 250000);
519	if (reg & RSB_DMCR_DEVICE_START)
520		ret = -ETIMEDOUT;
521
522	/* clear interrupt status bits */
523	writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS);
524
525	return ret;
526}
527
528/*
529 * There are 15 valid runtime addresses, though Allwinner typically
530 * skips the first, for unknown reasons, and uses the following three.
531 *
532 * 0x17, 0x2d, 0x3a, 0x4e, 0x59, 0x63, 0x74, 0x8b,
533 * 0x9c, 0xa6, 0xb1, 0xc5, 0xd2, 0xe8, 0xff
534 *
535 * No designs with 2 RSB slave devices sharing identical hardware
536 * addresses on the same bus have been seen in the wild. All designs
537 * use 0x2d for the primary PMIC, 0x3a for the secondary PMIC if
538 * there is one, and 0x45 for peripheral ICs.
539 *
540 * The hardware does not seem to support re-setting runtime addresses.
541 * Attempts to do so result in the slave devices returning a NACK.
542 * Hence we just hardcode the mapping here, like Allwinner does.
543 */
544
545static const struct sunxi_rsb_addr_map sunxi_rsb_addr_maps[] = {
546	{ 0x3a3, 0x2d }, /* Primary PMIC: AXP223, AXP809, AXP81X, ... */
547	{ 0x745, 0x3a }, /* Secondary PMIC: AXP806, ... */
548	{ 0xe89, 0x4e }, /* Peripheral IC: AC100, ... */
549};
550
551static u8 sunxi_rsb_get_rtaddr(u16 hwaddr)
552{
553	int i;
554
555	for (i = 0; i < ARRAY_SIZE(sunxi_rsb_addr_maps); i++)
556		if (hwaddr == sunxi_rsb_addr_maps[i].hwaddr)
557			return sunxi_rsb_addr_maps[i].rtaddr;
558
559	return 0; /* 0 is an invalid runtime address */
560}
561
562static int of_rsb_register_devices(struct sunxi_rsb *rsb)
563{
564	struct device *dev = rsb->dev;
565	struct device_node *child, *np = dev->of_node;
566	u32 hwaddr;
567	u8 rtaddr;
568	int ret;
569
570	if (!np)
571		return -EINVAL;
572
573	/* Runtime addresses for all slaves should be set first */
574	for_each_available_child_of_node(np, child) {
575		dev_dbg(dev, "setting child %pOF runtime address\n",
576			child);
577
578		ret = of_property_read_u32(child, "reg", &hwaddr);
579		if (ret) {
580			dev_err(dev, "%pOF: invalid 'reg' property: %d\n",
581				child, ret);
582			continue;
583		}
584
585		rtaddr = sunxi_rsb_get_rtaddr(hwaddr);
586		if (!rtaddr) {
587			dev_err(dev, "%pOF: unknown hardware device address\n",
588				child);
589			continue;
590		}
591
592		/*
593		 * Since no devices have been registered yet, we are the
594		 * only ones using the bus, we can skip locking the bus.
595		 */
596
597		/* setup command parameters */
598		writel(RSB_CMD_STRA, rsb->regs + RSB_CMD);
599		writel(RSB_DAR_RTA(rtaddr) | RSB_DAR_DA(hwaddr),
600		       rsb->regs + RSB_DAR);
601
602		/* send command */
603		ret = _sunxi_rsb_run_xfer(rsb);
604		if (ret)
605			dev_warn(dev, "%pOF: set runtime address failed: %d\n",
606				 child, ret);
607	}
608
609	/* Then we start adding devices and probing them */
610	for_each_available_child_of_node(np, child) {
611		struct sunxi_rsb_device *rdev;
612
613		dev_dbg(dev, "adding child %pOF\n", child);
614
615		ret = of_property_read_u32(child, "reg", &hwaddr);
616		if (ret)
617			continue;
618
619		rtaddr = sunxi_rsb_get_rtaddr(hwaddr);
620		if (!rtaddr)
621			continue;
622
623		rdev = sunxi_rsb_device_create(rsb, child, hwaddr, rtaddr);
624		if (IS_ERR(rdev))
625			dev_err(dev, "failed to add child device %pOF: %ld\n",
626				child, PTR_ERR(rdev));
627	}
628
629	return 0;
630}
631
632static const struct of_device_id sunxi_rsb_of_match_table[] = {
633	{ .compatible = "allwinner,sun8i-a23-rsb" },
634	{}
635};
636MODULE_DEVICE_TABLE(of, sunxi_rsb_of_match_table);
637
638static int sunxi_rsb_probe(struct platform_device *pdev)
639{
640	struct device *dev = &pdev->dev;
641	struct device_node *np = dev->of_node;
642	struct resource *r;
643	struct sunxi_rsb *rsb;
644	unsigned long p_clk_freq;
645	u32 clk_delay, clk_freq = 3000000;
646	int clk_div, irq, ret;
647	u32 reg;
648
649	of_property_read_u32(np, "clock-frequency", &clk_freq);
650	if (clk_freq > RSB_MAX_FREQ) {
651		dev_err(dev,
652			"clock-frequency (%u Hz) is too high (max = 20MHz)\n",
653			clk_freq);
654		return -EINVAL;
655	}
656
657	rsb = devm_kzalloc(dev, sizeof(*rsb), GFP_KERNEL);
658	if (!rsb)
659		return -ENOMEM;
660
661	rsb->dev = dev;
662	platform_set_drvdata(pdev, rsb);
663	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
664	rsb->regs = devm_ioremap_resource(dev, r);
665	if (IS_ERR(rsb->regs))
666		return PTR_ERR(rsb->regs);
667
668	irq = platform_get_irq(pdev, 0);
669	if (irq < 0)
670		return irq;
671
672	rsb->clk = devm_clk_get(dev, NULL);
673	if (IS_ERR(rsb->clk)) {
674		ret = PTR_ERR(rsb->clk);
675		dev_err(dev, "failed to retrieve clk: %d\n", ret);
676		return ret;
677	}
678
679	ret = clk_prepare_enable(rsb->clk);
680	if (ret) {
681		dev_err(dev, "failed to enable clk: %d\n", ret);
682		return ret;
683	}
684
685	p_clk_freq = clk_get_rate(rsb->clk);
686
687	rsb->rstc = devm_reset_control_get(dev, NULL);
688	if (IS_ERR(rsb->rstc)) {
689		ret = PTR_ERR(rsb->rstc);
690		dev_err(dev, "failed to retrieve reset controller: %d\n", ret);
691		goto err_clk_disable;
692	}
693
694	ret = reset_control_deassert(rsb->rstc);
695	if (ret) {
696		dev_err(dev, "failed to deassert reset line: %d\n", ret);
697		goto err_clk_disable;
698	}
699
700	init_completion(&rsb->complete);
701	mutex_init(&rsb->lock);
702
703	/* reset the controller */
704	writel(RSB_CTRL_SOFT_RST, rsb->regs + RSB_CTRL);
705	readl_poll_timeout(rsb->regs + RSB_CTRL, reg,
706			   !(reg & RSB_CTRL_SOFT_RST), 1000, 100000);
707
708	/*
709	 * Clock frequency and delay calculation code is from
710	 * Allwinner U-boot sources.
711	 *
712	 * From A83 user manual:
713	 * bus clock frequency = parent clock frequency / (2 * (divider + 1))
714	 */
715	clk_div = p_clk_freq / clk_freq / 2;
716	if (!clk_div)
717		clk_div = 1;
718	else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1)
719		clk_div = RSB_CCR_MAX_CLK_DIV + 1;
720
721	clk_delay = clk_div >> 1;
722	if (!clk_delay)
723		clk_delay = 1;
724
725	dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2);
726	writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1),
727	       rsb->regs + RSB_CCR);
728
729	ret = devm_request_irq(dev, irq, sunxi_rsb_irq, 0, RSB_CTRL_NAME, rsb);
730	if (ret) {
731		dev_err(dev, "can't register interrupt handler irq %d: %d\n",
732			irq, ret);
733		goto err_reset_assert;
734	}
735
736	/* initialize all devices on the bus into RSB mode */
737	ret = sunxi_rsb_init_device_mode(rsb);
738	if (ret)
739		dev_warn(dev, "Initialize device mode failed: %d\n", ret);
740
741	of_rsb_register_devices(rsb);
742
743	return 0;
744
745err_reset_assert:
746	reset_control_assert(rsb->rstc);
747
748err_clk_disable:
749	clk_disable_unprepare(rsb->clk);
750
751	return ret;
752}
753
754static int sunxi_rsb_remove(struct platform_device *pdev)
755{
756	struct sunxi_rsb *rsb = platform_get_drvdata(pdev);
757
758	device_for_each_child(rsb->dev, NULL, sunxi_rsb_remove_devices);
759	reset_control_assert(rsb->rstc);
760	clk_disable_unprepare(rsb->clk);
761
762	return 0;
763}
764
765static struct platform_driver sunxi_rsb_driver = {
766	.probe = sunxi_rsb_probe,
767	.remove	= sunxi_rsb_remove,
768	.driver	= {
769		.name = RSB_CTRL_NAME,
770		.of_match_table = sunxi_rsb_of_match_table,
771	},
772};
773
774static int __init sunxi_rsb_init(void)
775{
776	int ret;
777
778	ret = bus_register(&sunxi_rsb_bus);
779	if (ret) {
780		pr_err("failed to register sunxi sunxi_rsb bus: %d\n", ret);
781		return ret;
782	}
783
784	ret = platform_driver_register(&sunxi_rsb_driver);
785	if (ret) {
786		bus_unregister(&sunxi_rsb_bus);
787		return ret;
788	}
789
790	return 0;
791}
792module_init(sunxi_rsb_init);
793
794static void __exit sunxi_rsb_exit(void)
795{
796	platform_driver_unregister(&sunxi_rsb_driver);
797	bus_unregister(&sunxi_rsb_bus);
798}
799module_exit(sunxi_rsb_exit);
800
801MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
802MODULE_DESCRIPTION("Allwinner sunXi Reduced Serial Bus controller driver");
803MODULE_LICENSE("GPL v2");
804