1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * mm.c - Micro Memory(tm) PCI memory board block device driver - v2.3 4 * 5 * (C) 2001 San Mehat <nettwerk@valinux.com> 6 * (C) 2001 Johannes Erdfelt <jerdfelt@valinux.com> 7 * (C) 2001 NeilBrown <neilb@cse.unsw.edu.au> 8 * 9 * This driver for the Micro Memory PCI Memory Module with Battery Backup 10 * is Copyright Micro Memory Inc 2001-2002. All rights reserved. 11 * 12 * This driver provides a standard block device interface for Micro Memory(tm) 13 * PCI based RAM boards. 14 * 10/05/01: Phap Nguyen - Rebuilt the driver 15 * 10/22/01: Phap Nguyen - v2.1 Added disk partitioning 16 * 29oct2001:NeilBrown - Use make_request_fn instead of request_fn 17 * - use stand disk partitioning (so fdisk works). 18 * 08nov2001:NeilBrown - change driver name from "mm" to "umem" 19 * - incorporate into main kernel 20 * 08apr2002:NeilBrown - Move some of interrupt handle to tasklet 21 * - use spin_lock_bh instead of _irq 22 * - Never block on make_request. queue 23 * bh's instead. 24 * - unregister umem from devfs at mod unload 25 * - Change version to 2.3 26 * 07Nov2001:Phap Nguyen - Select pci read command: 06, 12, 15 (Decimal) 27 * 07Jan2002: P. Nguyen - Used PCI Memory Write & Invalidate for DMA 28 * 15May2002:NeilBrown - convert to bio for 2.5 29 * 17May2002:NeilBrown - remove init_mem initialisation. Instead detect 30 * - a sequence of writes that cover the card, and 31 * - set initialised bit then. 32 */ 33 34#undef DEBUG /* #define DEBUG if you want debugging info (pr_debug) */ 35#include <linux/fs.h> 36#include <linux/bio.h> 37#include <linux/kernel.h> 38#include <linux/mm.h> 39#include <linux/mman.h> 40#include <linux/gfp.h> 41#include <linux/ioctl.h> 42#include <linux/module.h> 43#include <linux/init.h> 44#include <linux/interrupt.h> 45#include <linux/timer.h> 46#include <linux/pci.h> 47#include <linux/dma-mapping.h> 48 49#include <linux/fcntl.h> /* O_ACCMODE */ 50#include <linux/hdreg.h> /* HDIO_GETGEO */ 51 52#include "umem.h" 53 54#include <linux/uaccess.h> 55#include <asm/io.h> 56 57#define MM_MAXCARDS 4 58#define MM_RAHEAD 2 /* two sectors */ 59#define MM_BLKSIZE 1024 /* 1k blocks */ 60#define MM_HARDSECT 512 /* 512-byte hardware sectors */ 61#define MM_SHIFT 6 /* max 64 partitions on 4 cards */ 62 63/* 64 * Version Information 65 */ 66 67#define DRIVER_NAME "umem" 68#define DRIVER_VERSION "v2.3" 69#define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown" 70#define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver" 71 72static int debug; 73/* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */ 74#define HW_TRACE(x) 75 76#define DEBUG_LED_ON_TRANSFER 0x01 77#define DEBUG_BATTERY_POLLING 0x02 78 79module_param(debug, int, 0644); 80MODULE_PARM_DESC(debug, "Debug bitmask"); 81 82static int pci_read_cmd = 0x0C; /* Read Multiple */ 83module_param(pci_read_cmd, int, 0); 84MODULE_PARM_DESC(pci_read_cmd, "PCI read command"); 85 86static int pci_write_cmd = 0x0F; /* Write and Invalidate */ 87module_param(pci_write_cmd, int, 0); 88MODULE_PARM_DESC(pci_write_cmd, "PCI write command"); 89 90static int pci_cmds; 91 92static int major_nr; 93 94#include <linux/blkdev.h> 95#include <linux/blkpg.h> 96 97struct cardinfo { 98 struct pci_dev *dev; 99 100 unsigned char __iomem *csr_remap; 101 unsigned int mm_size; /* size in kbytes */ 102 103 unsigned int init_size; /* initial segment, in sectors, 104 * that we know to 105 * have been written 106 */ 107 struct bio *bio, *currentbio, **biotail; 108 struct bvec_iter current_iter; 109 110 struct request_queue *queue; 111 112 struct mm_page { 113 dma_addr_t page_dma; 114 struct mm_dma_desc *desc; 115 int cnt, headcnt; 116 struct bio *bio, **biotail; 117 struct bvec_iter iter; 118 } mm_pages[2]; 119#define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc)) 120 121 int Active, Ready; 122 123 struct tasklet_struct tasklet; 124 unsigned int dma_status; 125 126 struct { 127 int good; 128 int warned; 129 unsigned long last_change; 130 } battery[2]; 131 132 spinlock_t lock; 133 int check_batteries; 134 135 int flags; 136}; 137 138static struct cardinfo cards[MM_MAXCARDS]; 139static struct timer_list battery_timer; 140 141static int num_cards; 142 143static struct gendisk *mm_gendisk[MM_MAXCARDS]; 144 145static void check_batteries(struct cardinfo *card); 146 147static int get_userbit(struct cardinfo *card, int bit) 148{ 149 unsigned char led; 150 151 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL); 152 return led & bit; 153} 154 155static int set_userbit(struct cardinfo *card, int bit, unsigned char state) 156{ 157 unsigned char led; 158 159 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL); 160 if (state) 161 led |= bit; 162 else 163 led &= ~bit; 164 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL); 165 166 return 0; 167} 168 169/* 170 * NOTE: For the power LED, use the LED_POWER_* macros since they differ 171 */ 172static void set_led(struct cardinfo *card, int shift, unsigned char state) 173{ 174 unsigned char led; 175 176 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL); 177 if (state == LED_FLIP) 178 led ^= (1<<shift); 179 else { 180 led &= ~(0x03 << shift); 181 led |= (state << shift); 182 } 183 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL); 184 185} 186 187#ifdef MM_DIAG 188static void dump_regs(struct cardinfo *card) 189{ 190 unsigned char *p; 191 int i, i1; 192 193 p = card->csr_remap; 194 for (i = 0; i < 8; i++) { 195 printk(KERN_DEBUG "%p ", p); 196 197 for (i1 = 0; i1 < 16; i1++) 198 printk("%02x ", *p++); 199 200 printk("\n"); 201 } 202} 203#endif 204 205static void dump_dmastat(struct cardinfo *card, unsigned int dmastat) 206{ 207 dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - "); 208 if (dmastat & DMASCR_ANY_ERR) 209 printk(KERN_CONT "ANY_ERR "); 210 if (dmastat & DMASCR_MBE_ERR) 211 printk(KERN_CONT "MBE_ERR "); 212 if (dmastat & DMASCR_PARITY_ERR_REP) 213 printk(KERN_CONT "PARITY_ERR_REP "); 214 if (dmastat & DMASCR_PARITY_ERR_DET) 215 printk(KERN_CONT "PARITY_ERR_DET "); 216 if (dmastat & DMASCR_SYSTEM_ERR_SIG) 217 printk(KERN_CONT "SYSTEM_ERR_SIG "); 218 if (dmastat & DMASCR_TARGET_ABT) 219 printk(KERN_CONT "TARGET_ABT "); 220 if (dmastat & DMASCR_MASTER_ABT) 221 printk(KERN_CONT "MASTER_ABT "); 222 if (dmastat & DMASCR_CHAIN_COMPLETE) 223 printk(KERN_CONT "CHAIN_COMPLETE "); 224 if (dmastat & DMASCR_DMA_COMPLETE) 225 printk(KERN_CONT "DMA_COMPLETE "); 226 printk("\n"); 227} 228 229/* 230 * Theory of request handling 231 * 232 * Each bio is assigned to one mm_dma_desc - which may not be enough FIXME 233 * We have two pages of mm_dma_desc, holding about 64 descriptors 234 * each. These are allocated at init time. 235 * One page is "Ready" and is either full, or can have request added. 236 * The other page might be "Active", which DMA is happening on it. 237 * 238 * Whenever IO on the active page completes, the Ready page is activated 239 * and the ex-Active page is clean out and made Ready. 240 * Otherwise the Ready page is only activated when it becomes full. 241 * 242 * If a request arrives while both pages a full, it is queued, and b_rdev is 243 * overloaded to record whether it was a read or a write. 244 * 245 * The interrupt handler only polls the device to clear the interrupt. 246 * The processing of the result is done in a tasklet. 247 */ 248 249static void mm_start_io(struct cardinfo *card) 250{ 251 /* we have the lock, we know there is 252 * no IO active, and we know that card->Active 253 * is set 254 */ 255 struct mm_dma_desc *desc; 256 struct mm_page *page; 257 int offset; 258 259 /* make the last descriptor end the chain */ 260 page = &card->mm_pages[card->Active]; 261 pr_debug("start_io: %d %d->%d\n", 262 card->Active, page->headcnt, page->cnt - 1); 263 desc = &page->desc[page->cnt-1]; 264 265 desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN); 266 desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN); 267 desc->sem_control_bits = desc->control_bits; 268 269 270 if (debug & DEBUG_LED_ON_TRANSFER) 271 set_led(card, LED_REMOVE, LED_ON); 272 273 desc = &page->desc[page->headcnt]; 274 writel(0, card->csr_remap + DMA_PCI_ADDR); 275 writel(0, card->csr_remap + DMA_PCI_ADDR + 4); 276 277 writel(0, card->csr_remap + DMA_LOCAL_ADDR); 278 writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4); 279 280 writel(0, card->csr_remap + DMA_TRANSFER_SIZE); 281 writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4); 282 283 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR); 284 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4); 285 286 offset = ((char *)desc) - ((char *)page->desc); 287 writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff), 288 card->csr_remap + DMA_DESCRIPTOR_ADDR); 289 /* Force the value to u64 before shifting otherwise >> 32 is undefined C 290 * and on some ports will do nothing ! */ 291 writel(cpu_to_le32(((u64)page->page_dma)>>32), 292 card->csr_remap + DMA_DESCRIPTOR_ADDR + 4); 293 294 /* Go, go, go */ 295 writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds), 296 card->csr_remap + DMA_STATUS_CTRL); 297} 298 299static int add_bio(struct cardinfo *card); 300 301static void activate(struct cardinfo *card) 302{ 303 /* if No page is Active, and Ready is 304 * not empty, then switch Ready page 305 * to active and start IO. 306 * Then add any bh's that are available to Ready 307 */ 308 309 do { 310 while (add_bio(card)) 311 ; 312 313 if (card->Active == -1 && 314 card->mm_pages[card->Ready].cnt > 0) { 315 card->Active = card->Ready; 316 card->Ready = 1-card->Ready; 317 mm_start_io(card); 318 } 319 320 } while (card->Active == -1 && add_bio(card)); 321} 322 323static inline void reset_page(struct mm_page *page) 324{ 325 page->cnt = 0; 326 page->headcnt = 0; 327 page->bio = NULL; 328 page->biotail = &page->bio; 329} 330 331/* 332 * If there is room on Ready page, take 333 * one bh off list and add it. 334 * return 1 if there was room, else 0. 335 */ 336static int add_bio(struct cardinfo *card) 337{ 338 struct mm_page *p; 339 struct mm_dma_desc *desc; 340 dma_addr_t dma_handle; 341 int offset; 342 struct bio *bio; 343 struct bio_vec vec; 344 345 bio = card->currentbio; 346 if (!bio && card->bio) { 347 card->currentbio = card->bio; 348 card->current_iter = card->bio->bi_iter; 349 card->bio = card->bio->bi_next; 350 if (card->bio == NULL) 351 card->biotail = &card->bio; 352 card->currentbio->bi_next = NULL; 353 return 1; 354 } 355 if (!bio) 356 return 0; 357 358 if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE) 359 return 0; 360 361 vec = bio_iter_iovec(bio, card->current_iter); 362 363 dma_handle = dma_map_page(&card->dev->dev, 364 vec.bv_page, 365 vec.bv_offset, 366 vec.bv_len, 367 bio_op(bio) == REQ_OP_READ ? 368 DMA_FROM_DEVICE : DMA_TO_DEVICE); 369 370 p = &card->mm_pages[card->Ready]; 371 desc = &p->desc[p->cnt]; 372 p->cnt++; 373 if (p->bio == NULL) 374 p->iter = card->current_iter; 375 if ((p->biotail) != &bio->bi_next) { 376 *(p->biotail) = bio; 377 p->biotail = &(bio->bi_next); 378 bio->bi_next = NULL; 379 } 380 381 desc->data_dma_handle = dma_handle; 382 383 desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle); 384 desc->local_addr = cpu_to_le64(card->current_iter.bi_sector << 9); 385 desc->transfer_size = cpu_to_le32(vec.bv_len); 386 offset = (((char *)&desc->sem_control_bits) - ((char *)p->desc)); 387 desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset)); 388 desc->zero1 = desc->zero2 = 0; 389 offset = (((char *)(desc+1)) - ((char *)p->desc)); 390 desc->next_desc_addr = cpu_to_le64(p->page_dma+offset); 391 desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN| 392 DMASCR_PARITY_INT_EN| 393 DMASCR_CHAIN_EN | 394 DMASCR_SEM_EN | 395 pci_cmds); 396 if (bio_op(bio) == REQ_OP_WRITE) 397 desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ); 398 desc->sem_control_bits = desc->control_bits; 399 400 401 bio_advance_iter(bio, &card->current_iter, vec.bv_len); 402 if (!card->current_iter.bi_size) 403 card->currentbio = NULL; 404 405 return 1; 406} 407 408static void process_page(unsigned long data) 409{ 410 /* check if any of the requests in the page are DMA_COMPLETE, 411 * and deal with them appropriately. 412 * If we find a descriptor without DMA_COMPLETE in the semaphore, then 413 * dma must have hit an error on that descriptor, so use dma_status 414 * instead and assume that all following descriptors must be re-tried. 415 */ 416 struct mm_page *page; 417 struct bio *return_bio = NULL; 418 struct cardinfo *card = (struct cardinfo *)data; 419 unsigned int dma_status = card->dma_status; 420 421 spin_lock(&card->lock); 422 if (card->Active < 0) 423 goto out_unlock; 424 page = &card->mm_pages[card->Active]; 425 426 while (page->headcnt < page->cnt) { 427 struct bio *bio = page->bio; 428 struct mm_dma_desc *desc = &page->desc[page->headcnt]; 429 int control = le32_to_cpu(desc->sem_control_bits); 430 int last = 0; 431 struct bio_vec vec; 432 433 if (!(control & DMASCR_DMA_COMPLETE)) { 434 control = dma_status; 435 last = 1; 436 } 437 438 page->headcnt++; 439 vec = bio_iter_iovec(bio, page->iter); 440 bio_advance_iter(bio, &page->iter, vec.bv_len); 441 442 if (!page->iter.bi_size) { 443 page->bio = bio->bi_next; 444 if (page->bio) 445 page->iter = page->bio->bi_iter; 446 } 447 448 dma_unmap_page(&card->dev->dev, desc->data_dma_handle, 449 vec.bv_len, 450 (control & DMASCR_TRANSFER_READ) ? 451 DMA_TO_DEVICE : DMA_FROM_DEVICE); 452 if (control & DMASCR_HARD_ERROR) { 453 /* error */ 454 bio->bi_status = BLK_STS_IOERR; 455 dev_printk(KERN_WARNING, &card->dev->dev, 456 "I/O error on sector %d/%d\n", 457 le32_to_cpu(desc->local_addr)>>9, 458 le32_to_cpu(desc->transfer_size)); 459 dump_dmastat(card, control); 460 } else if (op_is_write(bio_op(bio)) && 461 le32_to_cpu(desc->local_addr) >> 9 == 462 card->init_size) { 463 card->init_size += le32_to_cpu(desc->transfer_size) >> 9; 464 if (card->init_size >> 1 >= card->mm_size) { 465 dev_printk(KERN_INFO, &card->dev->dev, 466 "memory now initialised\n"); 467 set_userbit(card, MEMORY_INITIALIZED, 1); 468 } 469 } 470 if (bio != page->bio) { 471 bio->bi_next = return_bio; 472 return_bio = bio; 473 } 474 475 if (last) 476 break; 477 } 478 479 if (debug & DEBUG_LED_ON_TRANSFER) 480 set_led(card, LED_REMOVE, LED_OFF); 481 482 if (card->check_batteries) { 483 card->check_batteries = 0; 484 check_batteries(card); 485 } 486 if (page->headcnt >= page->cnt) { 487 reset_page(page); 488 card->Active = -1; 489 activate(card); 490 } else { 491 /* haven't finished with this one yet */ 492 pr_debug("do some more\n"); 493 mm_start_io(card); 494 } 495 out_unlock: 496 spin_unlock(&card->lock); 497 498 while (return_bio) { 499 struct bio *bio = return_bio; 500 501 return_bio = bio->bi_next; 502 bio->bi_next = NULL; 503 bio_endio(bio); 504 } 505} 506 507static void mm_unplug(struct blk_plug_cb *cb, bool from_schedule) 508{ 509 struct cardinfo *card = cb->data; 510 511 spin_lock_irq(&card->lock); 512 activate(card); 513 spin_unlock_irq(&card->lock); 514 kfree(cb); 515} 516 517static int mm_check_plugged(struct cardinfo *card) 518{ 519 return !!blk_check_plugged(mm_unplug, card, sizeof(struct blk_plug_cb)); 520} 521 522static blk_qc_t mm_submit_bio(struct bio *bio) 523{ 524 struct cardinfo *card = bio->bi_disk->private_data; 525 526 pr_debug("mm_make_request %llu %u\n", 527 (unsigned long long)bio->bi_iter.bi_sector, 528 bio->bi_iter.bi_size); 529 530 blk_queue_split(&bio); 531 532 spin_lock_irq(&card->lock); 533 *card->biotail = bio; 534 bio->bi_next = NULL; 535 card->biotail = &bio->bi_next; 536 if (op_is_sync(bio->bi_opf) || !mm_check_plugged(card)) 537 activate(card); 538 spin_unlock_irq(&card->lock); 539 540 return BLK_QC_T_NONE; 541} 542 543static irqreturn_t mm_interrupt(int irq, void *__card) 544{ 545 struct cardinfo *card = (struct cardinfo *) __card; 546 unsigned int dma_status; 547 unsigned short cfg_status; 548 549HW_TRACE(0x30); 550 551 dma_status = le32_to_cpu(readl(card->csr_remap + DMA_STATUS_CTRL)); 552 553 if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) { 554 /* interrupt wasn't for me ... */ 555 return IRQ_NONE; 556 } 557 558 /* clear COMPLETION interrupts */ 559 if (card->flags & UM_FLAG_NO_BYTE_STATUS) 560 writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE), 561 card->csr_remap + DMA_STATUS_CTRL); 562 else 563 writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16, 564 card->csr_remap + DMA_STATUS_CTRL + 2); 565 566 /* log errors and clear interrupt status */ 567 if (dma_status & DMASCR_ANY_ERR) { 568 unsigned int data_log1, data_log2; 569 unsigned int addr_log1, addr_log2; 570 unsigned char stat, count, syndrome, check; 571 572 stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS); 573 574 data_log1 = le32_to_cpu(readl(card->csr_remap + 575 ERROR_DATA_LOG)); 576 data_log2 = le32_to_cpu(readl(card->csr_remap + 577 ERROR_DATA_LOG + 4)); 578 addr_log1 = le32_to_cpu(readl(card->csr_remap + 579 ERROR_ADDR_LOG)); 580 addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4); 581 582 count = readb(card->csr_remap + ERROR_COUNT); 583 syndrome = readb(card->csr_remap + ERROR_SYNDROME); 584 check = readb(card->csr_remap + ERROR_CHECK); 585 586 dump_dmastat(card, dma_status); 587 588 if (stat & 0x01) 589 dev_printk(KERN_ERR, &card->dev->dev, 590 "Memory access error detected (err count %d)\n", 591 count); 592 if (stat & 0x02) 593 dev_printk(KERN_ERR, &card->dev->dev, 594 "Multi-bit EDC error\n"); 595 596 dev_printk(KERN_ERR, &card->dev->dev, 597 "Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n", 598 addr_log2, addr_log1, data_log2, data_log1); 599 dev_printk(KERN_ERR, &card->dev->dev, 600 "Fault Check 0x%02x, Fault Syndrome 0x%02x\n", 601 check, syndrome); 602 603 writeb(0, card->csr_remap + ERROR_COUNT); 604 } 605 606 if (dma_status & DMASCR_PARITY_ERR_REP) { 607 dev_printk(KERN_ERR, &card->dev->dev, 608 "PARITY ERROR REPORTED\n"); 609 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); 610 pci_write_config_word(card->dev, PCI_STATUS, cfg_status); 611 } 612 613 if (dma_status & DMASCR_PARITY_ERR_DET) { 614 dev_printk(KERN_ERR, &card->dev->dev, 615 "PARITY ERROR DETECTED\n"); 616 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); 617 pci_write_config_word(card->dev, PCI_STATUS, cfg_status); 618 } 619 620 if (dma_status & DMASCR_SYSTEM_ERR_SIG) { 621 dev_printk(KERN_ERR, &card->dev->dev, "SYSTEM ERROR\n"); 622 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); 623 pci_write_config_word(card->dev, PCI_STATUS, cfg_status); 624 } 625 626 if (dma_status & DMASCR_TARGET_ABT) { 627 dev_printk(KERN_ERR, &card->dev->dev, "TARGET ABORT\n"); 628 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); 629 pci_write_config_word(card->dev, PCI_STATUS, cfg_status); 630 } 631 632 if (dma_status & DMASCR_MASTER_ABT) { 633 dev_printk(KERN_ERR, &card->dev->dev, "MASTER ABORT\n"); 634 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); 635 pci_write_config_word(card->dev, PCI_STATUS, cfg_status); 636 } 637 638 /* and process the DMA descriptors */ 639 card->dma_status = dma_status; 640 tasklet_schedule(&card->tasklet); 641 642HW_TRACE(0x36); 643 644 return IRQ_HANDLED; 645} 646 647/* 648 * If both batteries are good, no LED 649 * If either battery has been warned, solid LED 650 * If both batteries are bad, flash the LED quickly 651 * If either battery is bad, flash the LED semi quickly 652 */ 653static void set_fault_to_battery_status(struct cardinfo *card) 654{ 655 if (card->battery[0].good && card->battery[1].good) 656 set_led(card, LED_FAULT, LED_OFF); 657 else if (card->battery[0].warned || card->battery[1].warned) 658 set_led(card, LED_FAULT, LED_ON); 659 else if (!card->battery[0].good && !card->battery[1].good) 660 set_led(card, LED_FAULT, LED_FLASH_7_0); 661 else 662 set_led(card, LED_FAULT, LED_FLASH_3_5); 663} 664 665static void init_battery_timer(void); 666 667static int check_battery(struct cardinfo *card, int battery, int status) 668{ 669 if (status != card->battery[battery].good) { 670 card->battery[battery].good = !card->battery[battery].good; 671 card->battery[battery].last_change = jiffies; 672 673 if (card->battery[battery].good) { 674 dev_printk(KERN_ERR, &card->dev->dev, 675 "Battery %d now good\n", battery + 1); 676 card->battery[battery].warned = 0; 677 } else 678 dev_printk(KERN_ERR, &card->dev->dev, 679 "Battery %d now FAILED\n", battery + 1); 680 681 return 1; 682 } else if (!card->battery[battery].good && 683 !card->battery[battery].warned && 684 time_after_eq(jiffies, card->battery[battery].last_change + 685 (HZ * 60 * 60 * 5))) { 686 dev_printk(KERN_ERR, &card->dev->dev, 687 "Battery %d still FAILED after 5 hours\n", battery + 1); 688 card->battery[battery].warned = 1; 689 690 return 1; 691 } 692 693 return 0; 694} 695 696static void check_batteries(struct cardinfo *card) 697{ 698 /* NOTE: this must *never* be called while the card 699 * is doing (bus-to-card) DMA, or you will need the 700 * reset switch 701 */ 702 unsigned char status; 703 int ret1, ret2; 704 705 status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY); 706 if (debug & DEBUG_BATTERY_POLLING) 707 dev_printk(KERN_DEBUG, &card->dev->dev, 708 "checking battery status, 1 = %s, 2 = %s\n", 709 (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK", 710 (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK"); 711 712 ret1 = check_battery(card, 0, !(status & BATTERY_1_FAILURE)); 713 ret2 = check_battery(card, 1, !(status & BATTERY_2_FAILURE)); 714 715 if (ret1 || ret2) 716 set_fault_to_battery_status(card); 717} 718 719static void check_all_batteries(struct timer_list *unused) 720{ 721 int i; 722 723 for (i = 0; i < num_cards; i++) 724 if (!(cards[i].flags & UM_FLAG_NO_BATT)) { 725 struct cardinfo *card = &cards[i]; 726 spin_lock_bh(&card->lock); 727 if (card->Active >= 0) 728 card->check_batteries = 1; 729 else 730 check_batteries(card); 731 spin_unlock_bh(&card->lock); 732 } 733 734 init_battery_timer(); 735} 736 737static void init_battery_timer(void) 738{ 739 timer_setup(&battery_timer, check_all_batteries, 0); 740 battery_timer.expires = jiffies + (HZ * 60); 741 add_timer(&battery_timer); 742} 743 744static void del_battery_timer(void) 745{ 746 del_timer(&battery_timer); 747} 748 749/* 750 * Note no locks taken out here. In a worst case scenario, we could drop 751 * a chunk of system memory. But that should never happen, since validation 752 * happens at open or mount time, when locks are held. 753 * 754 * That's crap, since doing that while some partitions are opened 755 * or mounted will give you really nasty results. 756 */ 757static int mm_revalidate(struct gendisk *disk) 758{ 759 struct cardinfo *card = disk->private_data; 760 set_capacity(disk, card->mm_size << 1); 761 return 0; 762} 763 764static int mm_getgeo(struct block_device *bdev, struct hd_geometry *geo) 765{ 766 struct cardinfo *card = bdev->bd_disk->private_data; 767 int size = card->mm_size * (1024 / MM_HARDSECT); 768 769 /* 770 * get geometry: we have to fake one... trim the size to a 771 * multiple of 2048 (1M): tell we have 32 sectors, 64 heads, 772 * whatever cylinders. 773 */ 774 geo->heads = 64; 775 geo->sectors = 32; 776 geo->cylinders = size / (geo->heads * geo->sectors); 777 return 0; 778} 779 780static const struct block_device_operations mm_fops = { 781 .owner = THIS_MODULE, 782 .submit_bio = mm_submit_bio, 783 .getgeo = mm_getgeo, 784 .revalidate_disk = mm_revalidate, 785}; 786 787static int mm_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) 788{ 789 int ret; 790 struct cardinfo *card = &cards[num_cards]; 791 unsigned char mem_present; 792 unsigned char batt_status; 793 unsigned int saved_bar, data; 794 unsigned long csr_base; 795 unsigned long csr_len; 796 int magic_number; 797 static int printed_version; 798 799 if (!printed_version++) 800 printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n"); 801 802 ret = pci_enable_device(dev); 803 if (ret) 804 return ret; 805 806 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8); 807 pci_set_master(dev); 808 809 card->dev = dev; 810 811 csr_base = pci_resource_start(dev, 0); 812 csr_len = pci_resource_len(dev, 0); 813 if (!csr_base || !csr_len) 814 return -ENODEV; 815 816 dev_printk(KERN_INFO, &dev->dev, 817 "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n"); 818 819 if (dma_set_mask(&dev->dev, DMA_BIT_MASK(64)) && 820 dma_set_mask(&dev->dev, DMA_BIT_MASK(32))) { 821 dev_printk(KERN_WARNING, &dev->dev, "NO suitable DMA found\n"); 822 return -ENOMEM; 823 } 824 825 ret = pci_request_regions(dev, DRIVER_NAME); 826 if (ret) { 827 dev_printk(KERN_ERR, &card->dev->dev, 828 "Unable to request memory region\n"); 829 goto failed_req_csr; 830 } 831 832 card->csr_remap = ioremap(csr_base, csr_len); 833 if (!card->csr_remap) { 834 dev_printk(KERN_ERR, &card->dev->dev, 835 "Unable to remap memory region\n"); 836 ret = -ENOMEM; 837 838 goto failed_remap_csr; 839 } 840 841 dev_printk(KERN_INFO, &card->dev->dev, 842 "CSR 0x%08lx -> 0x%p (0x%lx)\n", 843 csr_base, card->csr_remap, csr_len); 844 845 switch (card->dev->device) { 846 case 0x5415: 847 card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG; 848 magic_number = 0x59; 849 break; 850 851 case 0x5425: 852 card->flags |= UM_FLAG_NO_BYTE_STATUS; 853 magic_number = 0x5C; 854 break; 855 856 case 0x6155: 857 card->flags |= UM_FLAG_NO_BYTE_STATUS | 858 UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT; 859 magic_number = 0x99; 860 break; 861 862 default: 863 magic_number = 0x100; 864 break; 865 } 866 867 if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) { 868 dev_printk(KERN_ERR, &card->dev->dev, "Magic number invalid\n"); 869 ret = -ENOMEM; 870 goto failed_magic; 871 } 872 873 card->mm_pages[0].desc = dma_alloc_coherent(&card->dev->dev, 874 PAGE_SIZE * 2, &card->mm_pages[0].page_dma, GFP_KERNEL); 875 card->mm_pages[1].desc = dma_alloc_coherent(&card->dev->dev, 876 PAGE_SIZE * 2, &card->mm_pages[1].page_dma, GFP_KERNEL); 877 if (card->mm_pages[0].desc == NULL || 878 card->mm_pages[1].desc == NULL) { 879 dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n"); 880 ret = -ENOMEM; 881 goto failed_alloc; 882 } 883 reset_page(&card->mm_pages[0]); 884 reset_page(&card->mm_pages[1]); 885 card->Ready = 0; /* page 0 is ready */ 886 card->Active = -1; /* no page is active */ 887 card->bio = NULL; 888 card->biotail = &card->bio; 889 spin_lock_init(&card->lock); 890 891 card->queue = blk_alloc_queue(NUMA_NO_NODE); 892 if (!card->queue) { 893 ret = -ENOMEM; 894 goto failed_alloc; 895 } 896 897 tasklet_init(&card->tasklet, process_page, (unsigned long)card); 898 899 card->check_batteries = 0; 900 901 mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY); 902 switch (mem_present) { 903 case MEM_128_MB: 904 card->mm_size = 1024 * 128; 905 break; 906 case MEM_256_MB: 907 card->mm_size = 1024 * 256; 908 break; 909 case MEM_512_MB: 910 card->mm_size = 1024 * 512; 911 break; 912 case MEM_1_GB: 913 card->mm_size = 1024 * 1024; 914 break; 915 case MEM_2_GB: 916 card->mm_size = 1024 * 2048; 917 break; 918 default: 919 card->mm_size = 0; 920 break; 921 } 922 923 /* Clear the LED's we control */ 924 set_led(card, LED_REMOVE, LED_OFF); 925 set_led(card, LED_FAULT, LED_OFF); 926 927 batt_status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY); 928 929 card->battery[0].good = !(batt_status & BATTERY_1_FAILURE); 930 card->battery[1].good = !(batt_status & BATTERY_2_FAILURE); 931 card->battery[0].last_change = card->battery[1].last_change = jiffies; 932 933 if (card->flags & UM_FLAG_NO_BATT) 934 dev_printk(KERN_INFO, &card->dev->dev, 935 "Size %d KB\n", card->mm_size); 936 else { 937 dev_printk(KERN_INFO, &card->dev->dev, 938 "Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n", 939 card->mm_size, 940 batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled", 941 card->battery[0].good ? "OK" : "FAILURE", 942 batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled", 943 card->battery[1].good ? "OK" : "FAILURE"); 944 945 set_fault_to_battery_status(card); 946 } 947 948 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &saved_bar); 949 data = 0xffffffff; 950 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, data); 951 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &data); 952 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, saved_bar); 953 data &= 0xfffffff0; 954 data = ~data; 955 data += 1; 956 957 if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME, 958 card)) { 959 dev_printk(KERN_ERR, &card->dev->dev, 960 "Unable to allocate IRQ\n"); 961 ret = -ENODEV; 962 goto failed_req_irq; 963 } 964 965 dev_printk(KERN_INFO, &card->dev->dev, 966 "Window size %d bytes, IRQ %d\n", data, dev->irq); 967 968 pci_set_drvdata(dev, card); 969 970 if (pci_write_cmd != 0x0F) /* If not Memory Write & Invalidate */ 971 pci_write_cmd = 0x07; /* then Memory Write command */ 972 973 if (pci_write_cmd & 0x08) { /* use Memory Write and Invalidate */ 974 unsigned short cfg_command; 975 pci_read_config_word(dev, PCI_COMMAND, &cfg_command); 976 cfg_command |= 0x10; /* Memory Write & Invalidate Enable */ 977 pci_write_config_word(dev, PCI_COMMAND, cfg_command); 978 } 979 pci_cmds = (pci_read_cmd << 28) | (pci_write_cmd << 24); 980 981 num_cards++; 982 983 if (!get_userbit(card, MEMORY_INITIALIZED)) { 984 dev_printk(KERN_INFO, &card->dev->dev, 985 "memory NOT initialized. Consider over-writing whole device.\n"); 986 card->init_size = 0; 987 } else { 988 dev_printk(KERN_INFO, &card->dev->dev, 989 "memory already initialized\n"); 990 card->init_size = card->mm_size; 991 } 992 993 /* Enable ECC */ 994 writeb(EDC_STORE_CORRECT, card->csr_remap + MEMCTRLCMD_ERRCTRL); 995 996 return 0; 997 998 failed_req_irq: 999 failed_alloc: 1000 if (card->mm_pages[0].desc) 1001 dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2, 1002 card->mm_pages[0].desc, 1003 card->mm_pages[0].page_dma); 1004 if (card->mm_pages[1].desc) 1005 dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2, 1006 card->mm_pages[1].desc, 1007 card->mm_pages[1].page_dma); 1008 failed_magic: 1009 iounmap(card->csr_remap); 1010 failed_remap_csr: 1011 pci_release_regions(dev); 1012 failed_req_csr: 1013 1014 return ret; 1015} 1016 1017static void mm_pci_remove(struct pci_dev *dev) 1018{ 1019 struct cardinfo *card = pci_get_drvdata(dev); 1020 1021 tasklet_kill(&card->tasklet); 1022 free_irq(dev->irq, card); 1023 iounmap(card->csr_remap); 1024 1025 if (card->mm_pages[0].desc) 1026 dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2, 1027 card->mm_pages[0].desc, 1028 card->mm_pages[0].page_dma); 1029 if (card->mm_pages[1].desc) 1030 dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2, 1031 card->mm_pages[1].desc, 1032 card->mm_pages[1].page_dma); 1033 blk_cleanup_queue(card->queue); 1034 1035 pci_release_regions(dev); 1036 pci_disable_device(dev); 1037} 1038 1039static const struct pci_device_id mm_pci_ids[] = { 1040 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5415CN)}, 1041 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5425CN)}, 1042 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_6155)}, 1043 { 1044 .vendor = 0x8086, 1045 .device = 0xB555, 1046 .subvendor = 0x1332, 1047 .subdevice = 0x5460, 1048 .class = 0x050000, 1049 .class_mask = 0, 1050 }, { /* end: all zeroes */ } 1051}; 1052 1053MODULE_DEVICE_TABLE(pci, mm_pci_ids); 1054 1055static struct pci_driver mm_pci_driver = { 1056 .name = DRIVER_NAME, 1057 .id_table = mm_pci_ids, 1058 .probe = mm_pci_probe, 1059 .remove = mm_pci_remove, 1060}; 1061 1062static int __init mm_init(void) 1063{ 1064 int retval, i; 1065 int err; 1066 1067 retval = pci_register_driver(&mm_pci_driver); 1068 if (retval) 1069 return -ENOMEM; 1070 1071 err = major_nr = register_blkdev(0, DRIVER_NAME); 1072 if (err < 0) { 1073 pci_unregister_driver(&mm_pci_driver); 1074 return -EIO; 1075 } 1076 1077 for (i = 0; i < num_cards; i++) { 1078 mm_gendisk[i] = alloc_disk(1 << MM_SHIFT); 1079 if (!mm_gendisk[i]) 1080 goto out; 1081 } 1082 1083 for (i = 0; i < num_cards; i++) { 1084 struct gendisk *disk = mm_gendisk[i]; 1085 sprintf(disk->disk_name, "umem%c", 'a'+i); 1086 spin_lock_init(&cards[i].lock); 1087 disk->major = major_nr; 1088 disk->first_minor = i << MM_SHIFT; 1089 disk->fops = &mm_fops; 1090 disk->private_data = &cards[i]; 1091 disk->queue = cards[i].queue; 1092 set_capacity(disk, cards[i].mm_size << 1); 1093 add_disk(disk); 1094 } 1095 1096 init_battery_timer(); 1097 printk(KERN_INFO "MM: desc_per_page = %ld\n", DESC_PER_PAGE); 1098/* printk("mm_init: Done. 10-19-01 9:00\n"); */ 1099 return 0; 1100 1101out: 1102 pci_unregister_driver(&mm_pci_driver); 1103 unregister_blkdev(major_nr, DRIVER_NAME); 1104 while (i--) 1105 put_disk(mm_gendisk[i]); 1106 return -ENOMEM; 1107} 1108 1109static void __exit mm_cleanup(void) 1110{ 1111 int i; 1112 1113 del_battery_timer(); 1114 1115 for (i = 0; i < num_cards ; i++) { 1116 del_gendisk(mm_gendisk[i]); 1117 put_disk(mm_gendisk[i]); 1118 } 1119 1120 pci_unregister_driver(&mm_pci_driver); 1121 1122 unregister_blkdev(major_nr, DRIVER_NAME); 1123} 1124 1125module_init(mm_init); 1126module_exit(mm_cleanup); 1127 1128MODULE_AUTHOR(DRIVER_AUTHOR); 1129MODULE_DESCRIPTION(DRIVER_DESC); 1130MODULE_LICENSE("GPL"); 1131