18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * mtip32xx.h - Header file for the P320 SSD Block Driver 48c2ecf20Sopenharmony_ci * Copyright (C) 2011 Micron Technology, Inc. 58c2ecf20Sopenharmony_ci * 68c2ecf20Sopenharmony_ci * Portions of this code were derived from works subjected to the 78c2ecf20Sopenharmony_ci * following copyright: 88c2ecf20Sopenharmony_ci * Copyright (C) 2009 Integrated Device Technology, Inc. 98c2ecf20Sopenharmony_ci */ 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci#ifndef __MTIP32XX_H__ 128c2ecf20Sopenharmony_ci#define __MTIP32XX_H__ 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci#include <linux/spinlock.h> 158c2ecf20Sopenharmony_ci#include <linux/rwsem.h> 168c2ecf20Sopenharmony_ci#include <linux/ata.h> 178c2ecf20Sopenharmony_ci#include <linux/interrupt.h> 188c2ecf20Sopenharmony_ci#include <linux/genhd.h> 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci/* Offset of Subsystem Device ID in pci confoguration space */ 218c2ecf20Sopenharmony_ci#define PCI_SUBSYSTEM_DEVICEID 0x2E 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci/* offset of Device Control register in PCIe extended capabilites space */ 248c2ecf20Sopenharmony_ci#define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET 0x48 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci/* check for erase mode support during secure erase */ 278c2ecf20Sopenharmony_ci#define MTIP_SEC_ERASE_MODE 0x2 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci/* # of times to retry timed out/failed IOs */ 308c2ecf20Sopenharmony_ci#define MTIP_MAX_RETRIES 2 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ci/* Various timeout values in ms */ 338c2ecf20Sopenharmony_ci#define MTIP_NCQ_CMD_TIMEOUT_MS 15000 348c2ecf20Sopenharmony_ci#define MTIP_IOCTL_CMD_TIMEOUT_MS 5000 358c2ecf20Sopenharmony_ci#define MTIP_INT_CMD_TIMEOUT_MS 5000 368c2ecf20Sopenharmony_ci#define MTIP_QUIESCE_IO_TIMEOUT_MS (MTIP_NCQ_CMD_TIMEOUT_MS * \ 378c2ecf20Sopenharmony_ci (MTIP_MAX_RETRIES + 1)) 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci/* check for timeouts every 500ms */ 408c2ecf20Sopenharmony_ci#define MTIP_TIMEOUT_CHECK_PERIOD 500 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ci/* ftl rebuild */ 438c2ecf20Sopenharmony_ci#define MTIP_FTL_REBUILD_OFFSET 142 448c2ecf20Sopenharmony_ci#define MTIP_FTL_REBUILD_MAGIC 0xED51 458c2ecf20Sopenharmony_ci#define MTIP_FTL_REBUILD_TIMEOUT_MS 2400000 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci/* unaligned IO handling */ 488c2ecf20Sopenharmony_ci#define MTIP_MAX_UNALIGNED_SLOTS 2 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci/* Macro to extract the tag bit number from a tag value. */ 518c2ecf20Sopenharmony_ci#define MTIP_TAG_BIT(tag) (tag & 0x1F) 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci/* 548c2ecf20Sopenharmony_ci * Macro to extract the tag index from a tag value. The index 558c2ecf20Sopenharmony_ci * is used to access the correct s_active/Command Issue register based 568c2ecf20Sopenharmony_ci * on the tag value. 578c2ecf20Sopenharmony_ci */ 588c2ecf20Sopenharmony_ci#define MTIP_TAG_INDEX(tag) (tag >> 5) 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ci/* 618c2ecf20Sopenharmony_ci * Maximum number of scatter gather entries 628c2ecf20Sopenharmony_ci * a single command may have. 638c2ecf20Sopenharmony_ci */ 648c2ecf20Sopenharmony_ci#define MTIP_MAX_SG 504 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ci/* 678c2ecf20Sopenharmony_ci * Maximum number of slot groups (Command Issue & s_active registers) 688c2ecf20Sopenharmony_ci * NOTE: This is the driver maximum; check dd->slot_groups for actual value. 698c2ecf20Sopenharmony_ci */ 708c2ecf20Sopenharmony_ci#define MTIP_MAX_SLOT_GROUPS 8 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_ci/* Internal command tag. */ 738c2ecf20Sopenharmony_ci#define MTIP_TAG_INTERNAL 0 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_ci/* Micron Vendor ID & P320x SSD Device ID */ 768c2ecf20Sopenharmony_ci#define PCI_VENDOR_ID_MICRON 0x1344 778c2ecf20Sopenharmony_ci#define P320H_DEVICE_ID 0x5150 788c2ecf20Sopenharmony_ci#define P320M_DEVICE_ID 0x5151 798c2ecf20Sopenharmony_ci#define P320S_DEVICE_ID 0x5152 808c2ecf20Sopenharmony_ci#define P325M_DEVICE_ID 0x5153 818c2ecf20Sopenharmony_ci#define P420H_DEVICE_ID 0x5160 828c2ecf20Sopenharmony_ci#define P420M_DEVICE_ID 0x5161 838c2ecf20Sopenharmony_ci#define P425M_DEVICE_ID 0x5163 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_ci/* Driver name and version strings */ 868c2ecf20Sopenharmony_ci#define MTIP_DRV_NAME "mtip32xx" 878c2ecf20Sopenharmony_ci#define MTIP_DRV_VERSION "1.3.1" 888c2ecf20Sopenharmony_ci 898c2ecf20Sopenharmony_ci/* Maximum number of minor device numbers per device. */ 908c2ecf20Sopenharmony_ci#define MTIP_MAX_MINORS 16 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_ci/* Maximum number of supported command slots. */ 938c2ecf20Sopenharmony_ci#define MTIP_MAX_COMMAND_SLOTS (MTIP_MAX_SLOT_GROUPS * 32) 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_ci/* 968c2ecf20Sopenharmony_ci * Per-tag bitfield size in longs. 978c2ecf20Sopenharmony_ci * Linux bit manipulation functions 988c2ecf20Sopenharmony_ci * (i.e. test_and_set_bit, find_next_zero_bit) 998c2ecf20Sopenharmony_ci * manipulate memory in longs, so we try to make the math work. 1008c2ecf20Sopenharmony_ci * take the slot groups and find the number of longs, rounding up. 1018c2ecf20Sopenharmony_ci * Careful! i386 and x86_64 use different size longs! 1028c2ecf20Sopenharmony_ci */ 1038c2ecf20Sopenharmony_ci#define U32_PER_LONG (sizeof(long) / sizeof(u32)) 1048c2ecf20Sopenharmony_ci#define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \ 1058c2ecf20Sopenharmony_ci (U32_PER_LONG-1))/U32_PER_LONG) 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_ci/* BAR number used to access the HBA registers. */ 1088c2ecf20Sopenharmony_ci#define MTIP_ABAR 5 1098c2ecf20Sopenharmony_ci 1108c2ecf20Sopenharmony_ci#ifdef DEBUG 1118c2ecf20Sopenharmony_ci #define dbg_printk(format, arg...) \ 1128c2ecf20Sopenharmony_ci printk(pr_fmt(format), ##arg); 1138c2ecf20Sopenharmony_ci#else 1148c2ecf20Sopenharmony_ci #define dbg_printk(format, arg...) 1158c2ecf20Sopenharmony_ci#endif 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_ci#define MTIP_DFS_MAX_BUF_SIZE 1024 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_cienum { 1208c2ecf20Sopenharmony_ci /* below are bit numbers in 'flags' defined in mtip_port */ 1218c2ecf20Sopenharmony_ci MTIP_PF_IC_ACTIVE_BIT = 0, /* pio/ioctl */ 1228c2ecf20Sopenharmony_ci MTIP_PF_EH_ACTIVE_BIT = 1, /* error handling */ 1238c2ecf20Sopenharmony_ci MTIP_PF_SE_ACTIVE_BIT = 2, /* secure erase */ 1248c2ecf20Sopenharmony_ci MTIP_PF_DM_ACTIVE_BIT = 3, /* download microcde */ 1258c2ecf20Sopenharmony_ci MTIP_PF_TO_ACTIVE_BIT = 9, /* timeout handling */ 1268c2ecf20Sopenharmony_ci MTIP_PF_PAUSE_IO = ((1 << MTIP_PF_IC_ACTIVE_BIT) | 1278c2ecf20Sopenharmony_ci (1 << MTIP_PF_EH_ACTIVE_BIT) | 1288c2ecf20Sopenharmony_ci (1 << MTIP_PF_SE_ACTIVE_BIT) | 1298c2ecf20Sopenharmony_ci (1 << MTIP_PF_DM_ACTIVE_BIT) | 1308c2ecf20Sopenharmony_ci (1 << MTIP_PF_TO_ACTIVE_BIT)), 1318c2ecf20Sopenharmony_ci MTIP_PF_HOST_CAP_64 = 10, /* cache HOST_CAP_64 */ 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ci MTIP_PF_SVC_THD_ACTIVE_BIT = 4, 1348c2ecf20Sopenharmony_ci MTIP_PF_ISSUE_CMDS_BIT = 5, 1358c2ecf20Sopenharmony_ci MTIP_PF_REBUILD_BIT = 6, 1368c2ecf20Sopenharmony_ci MTIP_PF_SVC_THD_STOP_BIT = 8, 1378c2ecf20Sopenharmony_ci 1388c2ecf20Sopenharmony_ci MTIP_PF_SVC_THD_WORK = ((1 << MTIP_PF_EH_ACTIVE_BIT) | 1398c2ecf20Sopenharmony_ci (1 << MTIP_PF_ISSUE_CMDS_BIT) | 1408c2ecf20Sopenharmony_ci (1 << MTIP_PF_REBUILD_BIT) | 1418c2ecf20Sopenharmony_ci (1 << MTIP_PF_SVC_THD_STOP_BIT) | 1428c2ecf20Sopenharmony_ci (1 << MTIP_PF_TO_ACTIVE_BIT)), 1438c2ecf20Sopenharmony_ci 1448c2ecf20Sopenharmony_ci /* below are bit numbers in 'dd_flag' defined in driver_data */ 1458c2ecf20Sopenharmony_ci MTIP_DDF_SEC_LOCK_BIT = 0, 1468c2ecf20Sopenharmony_ci MTIP_DDF_REMOVE_PENDING_BIT = 1, 1478c2ecf20Sopenharmony_ci MTIP_DDF_OVER_TEMP_BIT = 2, 1488c2ecf20Sopenharmony_ci MTIP_DDF_WRITE_PROTECT_BIT = 3, 1498c2ecf20Sopenharmony_ci MTIP_DDF_CLEANUP_BIT = 5, 1508c2ecf20Sopenharmony_ci MTIP_DDF_RESUME_BIT = 6, 1518c2ecf20Sopenharmony_ci MTIP_DDF_INIT_DONE_BIT = 7, 1528c2ecf20Sopenharmony_ci MTIP_DDF_REBUILD_FAILED_BIT = 8, 1538c2ecf20Sopenharmony_ci MTIP_DDF_REMOVAL_BIT = 9, 1548c2ecf20Sopenharmony_ci 1558c2ecf20Sopenharmony_ci MTIP_DDF_STOP_IO = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) | 1568c2ecf20Sopenharmony_ci (1 << MTIP_DDF_SEC_LOCK_BIT) | 1578c2ecf20Sopenharmony_ci (1 << MTIP_DDF_OVER_TEMP_BIT) | 1588c2ecf20Sopenharmony_ci (1 << MTIP_DDF_WRITE_PROTECT_BIT) | 1598c2ecf20Sopenharmony_ci (1 << MTIP_DDF_REBUILD_FAILED_BIT)), 1608c2ecf20Sopenharmony_ci 1618c2ecf20Sopenharmony_ci}; 1628c2ecf20Sopenharmony_ci 1638c2ecf20Sopenharmony_cistruct smart_attr { 1648c2ecf20Sopenharmony_ci u8 attr_id; 1658c2ecf20Sopenharmony_ci __le16 flags; 1668c2ecf20Sopenharmony_ci u8 cur; 1678c2ecf20Sopenharmony_ci u8 worst; 1688c2ecf20Sopenharmony_ci __le32 data; 1698c2ecf20Sopenharmony_ci u8 res[3]; 1708c2ecf20Sopenharmony_ci} __packed; 1718c2ecf20Sopenharmony_ci 1728c2ecf20Sopenharmony_cistruct mtip_work { 1738c2ecf20Sopenharmony_ci struct work_struct work; 1748c2ecf20Sopenharmony_ci void *port; 1758c2ecf20Sopenharmony_ci int cpu_binding; 1768c2ecf20Sopenharmony_ci u32 completed; 1778c2ecf20Sopenharmony_ci} ____cacheline_aligned_in_smp; 1788c2ecf20Sopenharmony_ci 1798c2ecf20Sopenharmony_ci#define DEFINE_HANDLER(group) \ 1808c2ecf20Sopenharmony_ci void mtip_workq_sdbf##group(struct work_struct *work) \ 1818c2ecf20Sopenharmony_ci { \ 1828c2ecf20Sopenharmony_ci struct mtip_work *w = (struct mtip_work *) work; \ 1838c2ecf20Sopenharmony_ci mtip_workq_sdbfx(w->port, group, w->completed); \ 1848c2ecf20Sopenharmony_ci } 1858c2ecf20Sopenharmony_ci 1868c2ecf20Sopenharmony_ci/* Register Frame Information Structure (FIS), host to device. */ 1878c2ecf20Sopenharmony_cistruct host_to_dev_fis { 1888c2ecf20Sopenharmony_ci /* 1898c2ecf20Sopenharmony_ci * FIS type. 1908c2ecf20Sopenharmony_ci * - 27h Register FIS, host to device. 1918c2ecf20Sopenharmony_ci * - 34h Register FIS, device to host. 1928c2ecf20Sopenharmony_ci * - 39h DMA Activate FIS, device to host. 1938c2ecf20Sopenharmony_ci * - 41h DMA Setup FIS, bi-directional. 1948c2ecf20Sopenharmony_ci * - 46h Data FIS, bi-directional. 1958c2ecf20Sopenharmony_ci * - 58h BIST Activate FIS, bi-directional. 1968c2ecf20Sopenharmony_ci * - 5Fh PIO Setup FIS, device to host. 1978c2ecf20Sopenharmony_ci * - A1h Set Device Bits FIS, device to host. 1988c2ecf20Sopenharmony_ci */ 1998c2ecf20Sopenharmony_ci unsigned char type; 2008c2ecf20Sopenharmony_ci unsigned char opts; 2018c2ecf20Sopenharmony_ci unsigned char command; 2028c2ecf20Sopenharmony_ci unsigned char features; 2038c2ecf20Sopenharmony_ci 2048c2ecf20Sopenharmony_ci union { 2058c2ecf20Sopenharmony_ci unsigned char lba_low; 2068c2ecf20Sopenharmony_ci unsigned char sector; 2078c2ecf20Sopenharmony_ci }; 2088c2ecf20Sopenharmony_ci union { 2098c2ecf20Sopenharmony_ci unsigned char lba_mid; 2108c2ecf20Sopenharmony_ci unsigned char cyl_low; 2118c2ecf20Sopenharmony_ci }; 2128c2ecf20Sopenharmony_ci union { 2138c2ecf20Sopenharmony_ci unsigned char lba_hi; 2148c2ecf20Sopenharmony_ci unsigned char cyl_hi; 2158c2ecf20Sopenharmony_ci }; 2168c2ecf20Sopenharmony_ci union { 2178c2ecf20Sopenharmony_ci unsigned char device; 2188c2ecf20Sopenharmony_ci unsigned char head; 2198c2ecf20Sopenharmony_ci }; 2208c2ecf20Sopenharmony_ci 2218c2ecf20Sopenharmony_ci union { 2228c2ecf20Sopenharmony_ci unsigned char lba_low_ex; 2238c2ecf20Sopenharmony_ci unsigned char sector_ex; 2248c2ecf20Sopenharmony_ci }; 2258c2ecf20Sopenharmony_ci union { 2268c2ecf20Sopenharmony_ci unsigned char lba_mid_ex; 2278c2ecf20Sopenharmony_ci unsigned char cyl_low_ex; 2288c2ecf20Sopenharmony_ci }; 2298c2ecf20Sopenharmony_ci union { 2308c2ecf20Sopenharmony_ci unsigned char lba_hi_ex; 2318c2ecf20Sopenharmony_ci unsigned char cyl_hi_ex; 2328c2ecf20Sopenharmony_ci }; 2338c2ecf20Sopenharmony_ci unsigned char features_ex; 2348c2ecf20Sopenharmony_ci 2358c2ecf20Sopenharmony_ci unsigned char sect_count; 2368c2ecf20Sopenharmony_ci unsigned char sect_cnt_ex; 2378c2ecf20Sopenharmony_ci unsigned char res2; 2388c2ecf20Sopenharmony_ci unsigned char control; 2398c2ecf20Sopenharmony_ci 2408c2ecf20Sopenharmony_ci unsigned int res3; 2418c2ecf20Sopenharmony_ci}; 2428c2ecf20Sopenharmony_ci 2438c2ecf20Sopenharmony_ci/* Command header structure. */ 2448c2ecf20Sopenharmony_cistruct mtip_cmd_hdr { 2458c2ecf20Sopenharmony_ci /* 2468c2ecf20Sopenharmony_ci * Command options. 2478c2ecf20Sopenharmony_ci * - Bits 31:16 Number of PRD entries. 2488c2ecf20Sopenharmony_ci * - Bits 15:8 Unused in this implementation. 2498c2ecf20Sopenharmony_ci * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries. 2508c2ecf20Sopenharmony_ci * - Bit 6 Write bit, should be set when writing data to the device. 2518c2ecf20Sopenharmony_ci * - Bit 5 Unused in this implementation. 2528c2ecf20Sopenharmony_ci * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes). 2538c2ecf20Sopenharmony_ci */ 2548c2ecf20Sopenharmony_ci __le32 opts; 2558c2ecf20Sopenharmony_ci /* This field is unsed when using NCQ. */ 2568c2ecf20Sopenharmony_ci union { 2578c2ecf20Sopenharmony_ci __le32 byte_count; 2588c2ecf20Sopenharmony_ci __le32 status; 2598c2ecf20Sopenharmony_ci }; 2608c2ecf20Sopenharmony_ci /* 2618c2ecf20Sopenharmony_ci * Lower 32 bits of the command table address associated with this 2628c2ecf20Sopenharmony_ci * header. The command table addresses must be 128 byte aligned. 2638c2ecf20Sopenharmony_ci */ 2648c2ecf20Sopenharmony_ci __le32 ctba; 2658c2ecf20Sopenharmony_ci /* 2668c2ecf20Sopenharmony_ci * If 64 bit addressing is used this field is the upper 32 bits 2678c2ecf20Sopenharmony_ci * of the command table address associated with this command. 2688c2ecf20Sopenharmony_ci */ 2698c2ecf20Sopenharmony_ci __le32 ctbau; 2708c2ecf20Sopenharmony_ci /* Reserved and unused. */ 2718c2ecf20Sopenharmony_ci u32 res[4]; 2728c2ecf20Sopenharmony_ci}; 2738c2ecf20Sopenharmony_ci 2748c2ecf20Sopenharmony_ci/* Command scatter gather structure (PRD). */ 2758c2ecf20Sopenharmony_cistruct mtip_cmd_sg { 2768c2ecf20Sopenharmony_ci /* 2778c2ecf20Sopenharmony_ci * Low 32 bits of the data buffer address. For P320 this 2788c2ecf20Sopenharmony_ci * address must be 8 byte aligned signified by bits 2:0 being 2798c2ecf20Sopenharmony_ci * set to 0. 2808c2ecf20Sopenharmony_ci */ 2818c2ecf20Sopenharmony_ci __le32 dba; 2828c2ecf20Sopenharmony_ci /* 2838c2ecf20Sopenharmony_ci * When 64 bit addressing is used this field is the upper 2848c2ecf20Sopenharmony_ci * 32 bits of the data buffer address. 2858c2ecf20Sopenharmony_ci */ 2868c2ecf20Sopenharmony_ci __le32 dba_upper; 2878c2ecf20Sopenharmony_ci /* Unused. */ 2888c2ecf20Sopenharmony_ci __le32 reserved; 2898c2ecf20Sopenharmony_ci /* 2908c2ecf20Sopenharmony_ci * Bit 31: interrupt when this data block has been transferred. 2918c2ecf20Sopenharmony_ci * Bits 30..22: reserved 2928c2ecf20Sopenharmony_ci * Bits 21..0: byte count (minus 1). For P320 the byte count must be 2938c2ecf20Sopenharmony_ci * 8 byte aligned signified by bits 2:0 being set to 1. 2948c2ecf20Sopenharmony_ci */ 2958c2ecf20Sopenharmony_ci __le32 info; 2968c2ecf20Sopenharmony_ci}; 2978c2ecf20Sopenharmony_cistruct mtip_port; 2988c2ecf20Sopenharmony_ci 2998c2ecf20Sopenharmony_cistruct mtip_int_cmd; 3008c2ecf20Sopenharmony_ci 3018c2ecf20Sopenharmony_ci/* Structure used to describe a command. */ 3028c2ecf20Sopenharmony_cistruct mtip_cmd { 3038c2ecf20Sopenharmony_ci void *command; /* ptr to command table entry */ 3048c2ecf20Sopenharmony_ci 3058c2ecf20Sopenharmony_ci dma_addr_t command_dma; /* corresponding physical address */ 3068c2ecf20Sopenharmony_ci 3078c2ecf20Sopenharmony_ci int scatter_ents; /* Number of scatter list entries used */ 3088c2ecf20Sopenharmony_ci 3098c2ecf20Sopenharmony_ci int unaligned; /* command is unaligned on 4k boundary */ 3108c2ecf20Sopenharmony_ci 3118c2ecf20Sopenharmony_ci union { 3128c2ecf20Sopenharmony_ci struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */ 3138c2ecf20Sopenharmony_ci struct mtip_int_cmd *icmd; 3148c2ecf20Sopenharmony_ci }; 3158c2ecf20Sopenharmony_ci 3168c2ecf20Sopenharmony_ci int retries; /* The number of retries left for this command. */ 3178c2ecf20Sopenharmony_ci 3188c2ecf20Sopenharmony_ci int direction; /* Data transfer direction */ 3198c2ecf20Sopenharmony_ci blk_status_t status; 3208c2ecf20Sopenharmony_ci}; 3218c2ecf20Sopenharmony_ci 3228c2ecf20Sopenharmony_ci/* Structure used to describe a port. */ 3238c2ecf20Sopenharmony_cistruct mtip_port { 3248c2ecf20Sopenharmony_ci /* Pointer back to the driver data for this port. */ 3258c2ecf20Sopenharmony_ci struct driver_data *dd; 3268c2ecf20Sopenharmony_ci /* 3278c2ecf20Sopenharmony_ci * Used to determine if the data pointed to by the 3288c2ecf20Sopenharmony_ci * identify field is valid. 3298c2ecf20Sopenharmony_ci */ 3308c2ecf20Sopenharmony_ci unsigned long identify_valid; 3318c2ecf20Sopenharmony_ci /* Base address of the memory mapped IO for the port. */ 3328c2ecf20Sopenharmony_ci void __iomem *mmio; 3338c2ecf20Sopenharmony_ci /* Array of pointers to the memory mapped s_active registers. */ 3348c2ecf20Sopenharmony_ci void __iomem *s_active[MTIP_MAX_SLOT_GROUPS]; 3358c2ecf20Sopenharmony_ci /* Array of pointers to the memory mapped completed registers. */ 3368c2ecf20Sopenharmony_ci void __iomem *completed[MTIP_MAX_SLOT_GROUPS]; 3378c2ecf20Sopenharmony_ci /* Array of pointers to the memory mapped Command Issue registers. */ 3388c2ecf20Sopenharmony_ci void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS]; 3398c2ecf20Sopenharmony_ci /* 3408c2ecf20Sopenharmony_ci * Pointer to the beginning of the command header memory as used 3418c2ecf20Sopenharmony_ci * by the driver. 3428c2ecf20Sopenharmony_ci */ 3438c2ecf20Sopenharmony_ci void *command_list; 3448c2ecf20Sopenharmony_ci /* 3458c2ecf20Sopenharmony_ci * Pointer to the beginning of the command header memory as used 3468c2ecf20Sopenharmony_ci * by the DMA. 3478c2ecf20Sopenharmony_ci */ 3488c2ecf20Sopenharmony_ci dma_addr_t command_list_dma; 3498c2ecf20Sopenharmony_ci /* 3508c2ecf20Sopenharmony_ci * Pointer to the beginning of the RX FIS memory as used 3518c2ecf20Sopenharmony_ci * by the driver. 3528c2ecf20Sopenharmony_ci */ 3538c2ecf20Sopenharmony_ci void *rxfis; 3548c2ecf20Sopenharmony_ci /* 3558c2ecf20Sopenharmony_ci * Pointer to the beginning of the RX FIS memory as used 3568c2ecf20Sopenharmony_ci * by the DMA. 3578c2ecf20Sopenharmony_ci */ 3588c2ecf20Sopenharmony_ci dma_addr_t rxfis_dma; 3598c2ecf20Sopenharmony_ci /* 3608c2ecf20Sopenharmony_ci * Pointer to the DMA region for RX Fis, Identify, RLE10, and SMART 3618c2ecf20Sopenharmony_ci */ 3628c2ecf20Sopenharmony_ci void *block1; 3638c2ecf20Sopenharmony_ci /* 3648c2ecf20Sopenharmony_ci * DMA address of region for RX Fis, Identify, RLE10, and SMART 3658c2ecf20Sopenharmony_ci */ 3668c2ecf20Sopenharmony_ci dma_addr_t block1_dma; 3678c2ecf20Sopenharmony_ci /* 3688c2ecf20Sopenharmony_ci * Pointer to the beginning of the identify data memory as used 3698c2ecf20Sopenharmony_ci * by the driver. 3708c2ecf20Sopenharmony_ci */ 3718c2ecf20Sopenharmony_ci u16 *identify; 3728c2ecf20Sopenharmony_ci /* 3738c2ecf20Sopenharmony_ci * Pointer to the beginning of the identify data memory as used 3748c2ecf20Sopenharmony_ci * by the DMA. 3758c2ecf20Sopenharmony_ci */ 3768c2ecf20Sopenharmony_ci dma_addr_t identify_dma; 3778c2ecf20Sopenharmony_ci /* 3788c2ecf20Sopenharmony_ci * Pointer to the beginning of a sector buffer that is used 3798c2ecf20Sopenharmony_ci * by the driver when issuing internal commands. 3808c2ecf20Sopenharmony_ci */ 3818c2ecf20Sopenharmony_ci u16 *sector_buffer; 3828c2ecf20Sopenharmony_ci /* 3838c2ecf20Sopenharmony_ci * Pointer to the beginning of a sector buffer that is used 3848c2ecf20Sopenharmony_ci * by the DMA when the driver issues internal commands. 3858c2ecf20Sopenharmony_ci */ 3868c2ecf20Sopenharmony_ci dma_addr_t sector_buffer_dma; 3878c2ecf20Sopenharmony_ci 3888c2ecf20Sopenharmony_ci u16 *log_buf; 3898c2ecf20Sopenharmony_ci dma_addr_t log_buf_dma; 3908c2ecf20Sopenharmony_ci 3918c2ecf20Sopenharmony_ci u8 *smart_buf; 3928c2ecf20Sopenharmony_ci dma_addr_t smart_buf_dma; 3938c2ecf20Sopenharmony_ci 3948c2ecf20Sopenharmony_ci /* 3958c2ecf20Sopenharmony_ci * used to queue commands when an internal command is in progress 3968c2ecf20Sopenharmony_ci * or error handling is active 3978c2ecf20Sopenharmony_ci */ 3988c2ecf20Sopenharmony_ci unsigned long cmds_to_issue[SLOTBITS_IN_LONGS]; 3998c2ecf20Sopenharmony_ci /* Used by mtip_service_thread to wait for an event */ 4008c2ecf20Sopenharmony_ci wait_queue_head_t svc_wait; 4018c2ecf20Sopenharmony_ci /* 4028c2ecf20Sopenharmony_ci * indicates the state of the port. Also, helps the service thread 4038c2ecf20Sopenharmony_ci * to determine its action on wake up. 4048c2ecf20Sopenharmony_ci */ 4058c2ecf20Sopenharmony_ci unsigned long flags; 4068c2ecf20Sopenharmony_ci /* 4078c2ecf20Sopenharmony_ci * Timer used to complete commands that have been active for too long. 4088c2ecf20Sopenharmony_ci */ 4098c2ecf20Sopenharmony_ci unsigned long ic_pause_timer; 4108c2ecf20Sopenharmony_ci 4118c2ecf20Sopenharmony_ci /* Counter to control queue depth of unaligned IOs */ 4128c2ecf20Sopenharmony_ci atomic_t cmd_slot_unal; 4138c2ecf20Sopenharmony_ci 4148c2ecf20Sopenharmony_ci /* Spinlock for working around command-issue bug. */ 4158c2ecf20Sopenharmony_ci spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS]; 4168c2ecf20Sopenharmony_ci}; 4178c2ecf20Sopenharmony_ci 4188c2ecf20Sopenharmony_ci/* 4198c2ecf20Sopenharmony_ci * Driver private data structure. 4208c2ecf20Sopenharmony_ci * 4218c2ecf20Sopenharmony_ci * One structure is allocated per probed device. 4228c2ecf20Sopenharmony_ci */ 4238c2ecf20Sopenharmony_cistruct driver_data { 4248c2ecf20Sopenharmony_ci void __iomem *mmio; /* Base address of the HBA registers. */ 4258c2ecf20Sopenharmony_ci 4268c2ecf20Sopenharmony_ci int major; /* Major device number. */ 4278c2ecf20Sopenharmony_ci 4288c2ecf20Sopenharmony_ci int instance; /* Instance number. First device probed is 0, ... */ 4298c2ecf20Sopenharmony_ci 4308c2ecf20Sopenharmony_ci struct gendisk *disk; /* Pointer to our gendisk structure. */ 4318c2ecf20Sopenharmony_ci 4328c2ecf20Sopenharmony_ci struct pci_dev *pdev; /* Pointer to the PCI device structure. */ 4338c2ecf20Sopenharmony_ci 4348c2ecf20Sopenharmony_ci struct request_queue *queue; /* Our request queue. */ 4358c2ecf20Sopenharmony_ci 4368c2ecf20Sopenharmony_ci struct blk_mq_tag_set tags; /* blk_mq tags */ 4378c2ecf20Sopenharmony_ci 4388c2ecf20Sopenharmony_ci struct mtip_port *port; /* Pointer to the port data structure. */ 4398c2ecf20Sopenharmony_ci 4408c2ecf20Sopenharmony_ci unsigned product_type; /* magic value declaring the product type */ 4418c2ecf20Sopenharmony_ci 4428c2ecf20Sopenharmony_ci unsigned slot_groups; /* number of slot groups the product supports */ 4438c2ecf20Sopenharmony_ci 4448c2ecf20Sopenharmony_ci unsigned long index; /* Index to determine the disk name */ 4458c2ecf20Sopenharmony_ci 4468c2ecf20Sopenharmony_ci unsigned long dd_flag; /* NOTE: use atomic bit operations on this */ 4478c2ecf20Sopenharmony_ci 4488c2ecf20Sopenharmony_ci struct task_struct *mtip_svc_handler; /* task_struct of svc thd */ 4498c2ecf20Sopenharmony_ci 4508c2ecf20Sopenharmony_ci struct dentry *dfs_node; 4518c2ecf20Sopenharmony_ci 4528c2ecf20Sopenharmony_ci bool sr; 4538c2ecf20Sopenharmony_ci 4548c2ecf20Sopenharmony_ci int numa_node; /* NUMA support */ 4558c2ecf20Sopenharmony_ci 4568c2ecf20Sopenharmony_ci char workq_name[32]; 4578c2ecf20Sopenharmony_ci 4588c2ecf20Sopenharmony_ci struct workqueue_struct *isr_workq; 4598c2ecf20Sopenharmony_ci 4608c2ecf20Sopenharmony_ci atomic_t irq_workers_active; 4618c2ecf20Sopenharmony_ci 4628c2ecf20Sopenharmony_ci struct mtip_work work[MTIP_MAX_SLOT_GROUPS]; 4638c2ecf20Sopenharmony_ci 4648c2ecf20Sopenharmony_ci int isr_binding; 4658c2ecf20Sopenharmony_ci 4668c2ecf20Sopenharmony_ci struct block_device *bdev; 4678c2ecf20Sopenharmony_ci 4688c2ecf20Sopenharmony_ci struct list_head online_list; /* linkage for online list */ 4698c2ecf20Sopenharmony_ci 4708c2ecf20Sopenharmony_ci struct list_head remove_list; /* linkage for removing list */ 4718c2ecf20Sopenharmony_ci 4728c2ecf20Sopenharmony_ci int unal_qdepth; /* qdepth of unaligned IO queue */ 4738c2ecf20Sopenharmony_ci}; 4748c2ecf20Sopenharmony_ci 4758c2ecf20Sopenharmony_ci#endif 476