18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
28c2ecf20Sopenharmony_ci/* drivers/atm/eni.h - Efficient Networks ENI155P device driver declarations */
38c2ecf20Sopenharmony_ci
48c2ecf20Sopenharmony_ci/* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_ci#ifndef DRIVER_ATM_ENI_H
88c2ecf20Sopenharmony_ci#define DRIVER_ATM_ENI_H
98c2ecf20Sopenharmony_ci
108c2ecf20Sopenharmony_ci#include <linux/atm.h>
118c2ecf20Sopenharmony_ci#include <linux/atmdev.h>
128c2ecf20Sopenharmony_ci#include <linux/interrupt.h>
138c2ecf20Sopenharmony_ci#include <linux/sonet.h>
148c2ecf20Sopenharmony_ci#include <linux/skbuff.h>
158c2ecf20Sopenharmony_ci#include <linux/time.h>
168c2ecf20Sopenharmony_ci#include <linux/pci.h>
178c2ecf20Sopenharmony_ci#include <linux/spinlock.h>
188c2ecf20Sopenharmony_ci#include <linux/atomic.h>
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci#include "midway.h"
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci#define DEV_LABEL	"eni"
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_ci#define UBR_BUFFER	(128*1024)	/* UBR buffer size */
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci#define RX_DMA_BUF	  8		/* burst and skip a few things */
288c2ecf20Sopenharmony_ci#define TX_DMA_BUF	100		/* should be enough for 64 kB */
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci#define DEFAULT_RX_MULT	300		/* max_sdu*3 */
318c2ecf20Sopenharmony_ci#define DEFAULT_TX_MULT	300		/* max_sdu*3 */
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci#define ENI_ZEROES_SIZE	  4		/* need that many DMA-able zero bytes */
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_cistruct eni_free {
378c2ecf20Sopenharmony_ci	void __iomem *start;		/* counting in bytes */
388c2ecf20Sopenharmony_ci	int order;
398c2ecf20Sopenharmony_ci};
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_cistruct eni_tx {
428c2ecf20Sopenharmony_ci	void __iomem *send;		/* base, 0 if unused */
438c2ecf20Sopenharmony_ci	int prescaler;			/* shaping prescaler */
448c2ecf20Sopenharmony_ci	int resolution;			/* shaping divider */
458c2ecf20Sopenharmony_ci	unsigned long tx_pos;		/* current TX write position */
468c2ecf20Sopenharmony_ci	unsigned long words;		/* size of TX queue */
478c2ecf20Sopenharmony_ci	int index;			/* TX channel number */
488c2ecf20Sopenharmony_ci	int reserved;			/* reserved peak cell rate */
498c2ecf20Sopenharmony_ci	int shaping;			/* shaped peak cell rate */
508c2ecf20Sopenharmony_ci	struct sk_buff_head backlog;	/* queue of waiting TX buffers */
518c2ecf20Sopenharmony_ci};
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_cistruct eni_vcc {
548c2ecf20Sopenharmony_ci	int (*rx)(struct atm_vcc *vcc);	/* RX function, NULL if none */
558c2ecf20Sopenharmony_ci	void __iomem *recv;		/* receive buffer */
568c2ecf20Sopenharmony_ci	unsigned long words;		/* its size in words */
578c2ecf20Sopenharmony_ci	unsigned long descr;		/* next descriptor (RX) */
588c2ecf20Sopenharmony_ci	unsigned long rx_pos;		/* current RX descriptor pos */
598c2ecf20Sopenharmony_ci	struct eni_tx *tx;		/* TXer, NULL if none */
608c2ecf20Sopenharmony_ci	int rxing;			/* number of pending PDUs */
618c2ecf20Sopenharmony_ci	int servicing;			/* number of waiting VCs (0 or 1) */
628c2ecf20Sopenharmony_ci	int txing;			/* number of pending TX bytes */
638c2ecf20Sopenharmony_ci	ktime_t timestamp;		/* for RX timing */
648c2ecf20Sopenharmony_ci	struct atm_vcc *next;		/* next pending RX */
658c2ecf20Sopenharmony_ci	struct sk_buff *last;		/* last PDU being DMAed (used to carry
668c2ecf20Sopenharmony_ci					   discard information) */
678c2ecf20Sopenharmony_ci};
688c2ecf20Sopenharmony_ci
698c2ecf20Sopenharmony_cistruct eni_dev {
708c2ecf20Sopenharmony_ci	/*-------------------------------- spinlock */
718c2ecf20Sopenharmony_ci	spinlock_t lock;		/* sync with interrupt */
728c2ecf20Sopenharmony_ci	struct tasklet_struct task;	/* tasklet for interrupt work */
738c2ecf20Sopenharmony_ci	u32 events;			/* pending events */
748c2ecf20Sopenharmony_ci	/*-------------------------------- base pointers into Midway address
758c2ecf20Sopenharmony_ci					   space */
768c2ecf20Sopenharmony_ci	void __iomem *ioaddr;
778c2ecf20Sopenharmony_ci	void __iomem *phy;		/* PHY interface chip registers */
788c2ecf20Sopenharmony_ci	void __iomem *reg;		/* register base */
798c2ecf20Sopenharmony_ci	void __iomem *ram;		/* RAM base */
808c2ecf20Sopenharmony_ci	void __iomem *vci;		/* VCI table */
818c2ecf20Sopenharmony_ci	void __iomem *rx_dma;		/* RX DMA queue */
828c2ecf20Sopenharmony_ci	void __iomem *tx_dma;		/* TX DMA queue */
838c2ecf20Sopenharmony_ci	void __iomem *service;		/* service list */
848c2ecf20Sopenharmony_ci	/*-------------------------------- TX part */
858c2ecf20Sopenharmony_ci	struct eni_tx tx[NR_CHAN];	/* TX channels */
868c2ecf20Sopenharmony_ci	struct eni_tx *ubr;		/* UBR channel */
878c2ecf20Sopenharmony_ci	struct sk_buff_head tx_queue;	/* PDUs currently being TX DMAed*/
888c2ecf20Sopenharmony_ci	wait_queue_head_t tx_wait;	/* for close */
898c2ecf20Sopenharmony_ci	int tx_bw;			/* remaining bandwidth */
908c2ecf20Sopenharmony_ci	u32 dma[TX_DMA_BUF*2];		/* DMA request scratch area */
918c2ecf20Sopenharmony_ci	struct eni_zero {		/* aligned "magic" zeroes */
928c2ecf20Sopenharmony_ci		u32 *addr;
938c2ecf20Sopenharmony_ci		dma_addr_t dma;
948c2ecf20Sopenharmony_ci	} zero;
958c2ecf20Sopenharmony_ci	int tx_mult;			/* buffer size multiplier (percent) */
968c2ecf20Sopenharmony_ci	/*-------------------------------- RX part */
978c2ecf20Sopenharmony_ci	u32 serv_read;			/* host service read index */
988c2ecf20Sopenharmony_ci	struct atm_vcc *fast,*last_fast;/* queues of VCCs with pending PDUs */
998c2ecf20Sopenharmony_ci	struct atm_vcc *slow,*last_slow;
1008c2ecf20Sopenharmony_ci	struct atm_vcc **rx_map;	/* for fast lookups */
1018c2ecf20Sopenharmony_ci	struct sk_buff_head rx_queue;	/* PDUs currently being RX-DMAed */
1028c2ecf20Sopenharmony_ci	wait_queue_head_t rx_wait;	/* for close */
1038c2ecf20Sopenharmony_ci	int rx_mult;			/* buffer size multiplier (percent) */
1048c2ecf20Sopenharmony_ci	/*-------------------------------- statistics */
1058c2ecf20Sopenharmony_ci	unsigned long lost;		/* number of lost cells (RX) */
1068c2ecf20Sopenharmony_ci	/*-------------------------------- memory management */
1078c2ecf20Sopenharmony_ci	unsigned long base_diff;	/* virtual-real base address */
1088c2ecf20Sopenharmony_ci	int free_len;			/* free list length */
1098c2ecf20Sopenharmony_ci	struct eni_free *free_list;	/* free list */
1108c2ecf20Sopenharmony_ci	int free_list_size;		/* maximum size of free list */
1118c2ecf20Sopenharmony_ci	/*-------------------------------- ENI links */
1128c2ecf20Sopenharmony_ci	struct atm_dev *more;		/* other ENI devices */
1138c2ecf20Sopenharmony_ci	/*-------------------------------- general information */
1148c2ecf20Sopenharmony_ci	int mem;			/* RAM on board (in bytes) */
1158c2ecf20Sopenharmony_ci	int asic;			/* PCI interface type, 0 for FPGA */
1168c2ecf20Sopenharmony_ci	unsigned int irq;		/* IRQ */
1178c2ecf20Sopenharmony_ci	struct pci_dev *pci_dev;	/* PCI stuff */
1188c2ecf20Sopenharmony_ci};
1198c2ecf20Sopenharmony_ci
1208c2ecf20Sopenharmony_ci
1218c2ecf20Sopenharmony_ci#define ENI_DEV(d) ((struct eni_dev *) (d)->dev_data)
1228c2ecf20Sopenharmony_ci#define ENI_VCC(d) ((struct eni_vcc *) (d)->dev_data)
1238c2ecf20Sopenharmony_ci
1248c2ecf20Sopenharmony_ci
1258c2ecf20Sopenharmony_cistruct eni_skb_prv {
1268c2ecf20Sopenharmony_ci	struct atm_skb_data _;		/* reserved */
1278c2ecf20Sopenharmony_ci	unsigned long pos;		/* position of next descriptor */
1288c2ecf20Sopenharmony_ci	int size;			/* PDU size in reassembly buffer */
1298c2ecf20Sopenharmony_ci	dma_addr_t paddr;		/* DMA handle */
1308c2ecf20Sopenharmony_ci};
1318c2ecf20Sopenharmony_ci
1328c2ecf20Sopenharmony_ci#define ENI_PRV_SIZE(skb) (((struct eni_skb_prv *) (skb)->cb)->size)
1338c2ecf20Sopenharmony_ci#define ENI_PRV_POS(skb) (((struct eni_skb_prv *) (skb)->cb)->pos)
1348c2ecf20Sopenharmony_ci#define ENI_PRV_PADDR(skb) (((struct eni_skb_prv *) (skb)->cb)->paddr)
1358c2ecf20Sopenharmony_ci
1368c2ecf20Sopenharmony_ci#endif
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