1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * AHCI SATA platform library
4 *
5 * Copyright 2004-2005  Red Hat, Inc.
6 *   Jeff Garzik <jgarzik@pobox.com>
7 * Copyright 2010  MontaVista Software, LLC.
8 *   Anton Vorontsov <avorontsov@ru.mvista.com>
9 */
10
11#include <linux/clk.h>
12#include <linux/kernel.h>
13#include <linux/gfp.h>
14#include <linux/module.h>
15#include <linux/pm.h>
16#include <linux/interrupt.h>
17#include <linux/device.h>
18#include <linux/platform_device.h>
19#include <linux/libata.h>
20#include <linux/ahci_platform.h>
21#include <linux/phy/phy.h>
22#include <linux/pm_runtime.h>
23#include <linux/of_platform.h>
24#include <linux/reset.h>
25#include "ahci.h"
26
27static void ahci_host_stop(struct ata_host *host);
28
29struct ata_port_operations ahci_platform_ops = {
30	.inherits	= &ahci_ops,
31	.host_stop	= ahci_host_stop,
32};
33EXPORT_SYMBOL_GPL(ahci_platform_ops);
34
35/**
36 * ahci_platform_enable_phys - Enable PHYs
37 * @hpriv: host private area to store config values
38 *
39 * This function enables all the PHYs found in hpriv->phys, if any.
40 * If a PHY fails to be enabled, it disables all the PHYs already
41 * enabled in reverse order and returns an error.
42 *
43 * RETURNS:
44 * 0 on success otherwise a negative error code
45 */
46int ahci_platform_enable_phys(struct ahci_host_priv *hpriv)
47{
48	int rc, i;
49
50	for (i = 0; i < hpriv->nports; i++) {
51		rc = phy_init(hpriv->phys[i]);
52		if (rc)
53			goto disable_phys;
54
55		rc = phy_set_mode(hpriv->phys[i], PHY_MODE_SATA);
56		if (rc) {
57			phy_exit(hpriv->phys[i]);
58			goto disable_phys;
59		}
60
61		rc = phy_power_on(hpriv->phys[i]);
62		if (rc && !(rc == -EOPNOTSUPP && (hpriv->flags & AHCI_HFLAG_IGN_NOTSUPP_POWER_ON))) {
63			phy_exit(hpriv->phys[i]);
64			goto disable_phys;
65		}
66	}
67
68	return 0;
69
70disable_phys:
71	while (--i >= 0) {
72		phy_power_off(hpriv->phys[i]);
73		phy_exit(hpriv->phys[i]);
74	}
75	return rc;
76}
77EXPORT_SYMBOL_GPL(ahci_platform_enable_phys);
78
79/**
80 * ahci_platform_disable_phys - Disable PHYs
81 * @hpriv: host private area to store config values
82 *
83 * This function disables all PHYs found in hpriv->phys.
84 */
85void ahci_platform_disable_phys(struct ahci_host_priv *hpriv)
86{
87	int i;
88
89	for (i = 0; i < hpriv->nports; i++) {
90		phy_power_off(hpriv->phys[i]);
91		phy_exit(hpriv->phys[i]);
92	}
93}
94EXPORT_SYMBOL_GPL(ahci_platform_disable_phys);
95
96/**
97 * ahci_platform_enable_clks - Enable platform clocks
98 * @hpriv: host private area to store config values
99 *
100 * This function enables all the clks found in hpriv->clks, starting at
101 * index 0. If any clk fails to enable it disables all the clks already
102 * enabled in reverse order, and then returns an error.
103 *
104 * RETURNS:
105 * 0 on success otherwise a negative error code
106 */
107int ahci_platform_enable_clks(struct ahci_host_priv *hpriv)
108{
109	int c, rc;
110
111	for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) {
112		rc = clk_prepare_enable(hpriv->clks[c]);
113		if (rc)
114			goto disable_unprepare_clk;
115	}
116	return 0;
117
118disable_unprepare_clk:
119	while (--c >= 0)
120		clk_disable_unprepare(hpriv->clks[c]);
121	return rc;
122}
123EXPORT_SYMBOL_GPL(ahci_platform_enable_clks);
124
125/**
126 * ahci_platform_disable_clks - Disable platform clocks
127 * @hpriv: host private area to store config values
128 *
129 * This function disables all the clks found in hpriv->clks, in reverse
130 * order of ahci_platform_enable_clks (starting at the end of the array).
131 */
132void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
133{
134	int c;
135
136	for (c = AHCI_MAX_CLKS - 1; c >= 0; c--)
137		if (hpriv->clks[c])
138			clk_disable_unprepare(hpriv->clks[c]);
139}
140EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
141
142/**
143 * ahci_platform_enable_regulators - Enable regulators
144 * @hpriv: host private area to store config values
145 *
146 * This function enables all the regulators found in controller and
147 * hpriv->target_pwrs, if any.  If a regulator fails to be enabled, it
148 * disables all the regulators already enabled in reverse order and
149 * returns an error.
150 *
151 * RETURNS:
152 * 0 on success otherwise a negative error code
153 */
154int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv)
155{
156	int rc, i;
157
158	rc = regulator_enable(hpriv->ahci_regulator);
159	if (rc)
160		return rc;
161
162	rc = regulator_enable(hpriv->phy_regulator);
163	if (rc)
164		goto disable_ahci_pwrs;
165
166	for (i = 0; i < hpriv->nports; i++) {
167		if (!hpriv->target_pwrs[i])
168			continue;
169
170		rc = regulator_enable(hpriv->target_pwrs[i]);
171		if (rc)
172			goto disable_target_pwrs;
173	}
174
175	return 0;
176
177disable_target_pwrs:
178	while (--i >= 0)
179		if (hpriv->target_pwrs[i])
180			regulator_disable(hpriv->target_pwrs[i]);
181
182	regulator_disable(hpriv->phy_regulator);
183disable_ahci_pwrs:
184	regulator_disable(hpriv->ahci_regulator);
185	return rc;
186}
187EXPORT_SYMBOL_GPL(ahci_platform_enable_regulators);
188
189/**
190 * ahci_platform_disable_regulators - Disable regulators
191 * @hpriv: host private area to store config values
192 *
193 * This function disables all regulators found in hpriv->target_pwrs and
194 * AHCI controller.
195 */
196void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv)
197{
198	int i;
199
200	for (i = 0; i < hpriv->nports; i++) {
201		if (!hpriv->target_pwrs[i])
202			continue;
203		regulator_disable(hpriv->target_pwrs[i]);
204	}
205
206	regulator_disable(hpriv->ahci_regulator);
207	regulator_disable(hpriv->phy_regulator);
208}
209EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators);
210/**
211 * ahci_platform_enable_resources - Enable platform resources
212 * @hpriv: host private area to store config values
213 *
214 * This function enables all ahci_platform managed resources in the
215 * following order:
216 * 1) Regulator
217 * 2) Clocks (through ahci_platform_enable_clks)
218 * 3) Resets
219 * 4) Phys
220 *
221 * If resource enabling fails at any point the previous enabled resources
222 * are disabled in reverse order.
223 *
224 * RETURNS:
225 * 0 on success otherwise a negative error code
226 */
227int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
228{
229	int rc;
230
231	rc = ahci_platform_enable_regulators(hpriv);
232	if (rc)
233		return rc;
234
235	rc = ahci_platform_enable_clks(hpriv);
236	if (rc)
237		goto disable_regulator;
238
239	rc = reset_control_deassert(hpriv->rsts);
240	if (rc)
241		goto disable_clks;
242
243	rc = ahci_platform_enable_phys(hpriv);
244	if (rc)
245		goto disable_resets;
246
247	return 0;
248
249disable_resets:
250	reset_control_assert(hpriv->rsts);
251
252disable_clks:
253	ahci_platform_disable_clks(hpriv);
254
255disable_regulator:
256	ahci_platform_disable_regulators(hpriv);
257
258	return rc;
259}
260EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
261
262/**
263 * ahci_platform_disable_resources - Disable platform resources
264 * @hpriv: host private area to store config values
265 *
266 * This function disables all ahci_platform managed resources in the
267 * following order:
268 * 1) Phys
269 * 2) Resets
270 * 3) Clocks (through ahci_platform_disable_clks)
271 * 4) Regulator
272 */
273void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
274{
275	ahci_platform_disable_phys(hpriv);
276
277	reset_control_assert(hpriv->rsts);
278
279	ahci_platform_disable_clks(hpriv);
280
281	ahci_platform_disable_regulators(hpriv);
282}
283EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
284
285static void ahci_platform_put_resources(struct device *dev, void *res)
286{
287	struct ahci_host_priv *hpriv = res;
288	int c;
289
290	if (hpriv->got_runtime_pm) {
291		pm_runtime_put_sync(dev);
292		pm_runtime_disable(dev);
293	}
294
295	for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
296		clk_put(hpriv->clks[c]);
297	/*
298	 * The regulators are tied to child node device and not to the
299	 * SATA device itself. So we can't use devm for automatically
300	 * releasing them. We have to do it manually here.
301	 */
302	for (c = 0; c < hpriv->nports; c++)
303		if (hpriv->target_pwrs && hpriv->target_pwrs[c])
304			regulator_put(hpriv->target_pwrs[c]);
305
306	kfree(hpriv->target_pwrs);
307}
308
309static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port,
310				struct device *dev, struct device_node *node)
311{
312	int rc;
313
314	hpriv->phys[port] = devm_of_phy_get(dev, node, NULL);
315
316	if (!IS_ERR(hpriv->phys[port]))
317		return 0;
318
319	rc = PTR_ERR(hpriv->phys[port]);
320	switch (rc) {
321	case -ENOSYS:
322		/* No PHY support. Check if PHY is required. */
323		if (of_find_property(node, "phys", NULL)) {
324			dev_err(dev,
325				"couldn't get PHY in node %pOFn: ENOSYS\n",
326				node);
327			break;
328		}
329		fallthrough;
330	case -ENODEV:
331		/* continue normally */
332		hpriv->phys[port] = NULL;
333		rc = 0;
334		break;
335	case -EPROBE_DEFER:
336		/* Do not complain yet */
337		break;
338
339	default:
340		dev_err(dev,
341			"couldn't get PHY in node %pOFn: %d\n",
342			node, rc);
343
344		break;
345	}
346
347	return rc;
348}
349
350static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port,
351				struct device *dev)
352{
353	struct regulator *target_pwr;
354	int rc = 0;
355
356	target_pwr = regulator_get(dev, "target");
357
358	if (!IS_ERR(target_pwr))
359		hpriv->target_pwrs[port] = target_pwr;
360	else
361		rc = PTR_ERR(target_pwr);
362
363	return rc;
364}
365
366/**
367 * ahci_platform_get_resources - Get platform resources
368 * @pdev: platform device to get resources for
369 * @flags: bitmap representing the resource to get
370 *
371 * This function allocates an ahci_host_priv struct, and gets the following
372 * resources, storing a reference to them inside the returned struct:
373 *
374 * 1) mmio registers (IORESOURCE_MEM 0, mandatory)
375 * 2) regulator for controlling the targets power (optional)
376 *    regulator for controlling the AHCI controller (optional)
377 * 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node,
378 *    or for non devicetree enabled platforms a single clock
379 * 4) resets, if flags has AHCI_PLATFORM_GET_RESETS (optional)
380 * 5) phys (optional)
381 *
382 * RETURNS:
383 * The allocated ahci_host_priv on success, otherwise an ERR_PTR value
384 */
385struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev,
386						   unsigned int flags)
387{
388	struct device *dev = &pdev->dev;
389	struct ahci_host_priv *hpriv;
390	struct clk *clk;
391	struct device_node *child;
392	int i, enabled_ports = 0, rc = -ENOMEM, child_nodes;
393	u32 mask_port_map = 0;
394
395	if (!devres_open_group(dev, NULL, GFP_KERNEL))
396		return ERR_PTR(-ENOMEM);
397
398	hpriv = devres_alloc(ahci_platform_put_resources, sizeof(*hpriv),
399			     GFP_KERNEL);
400	if (!hpriv)
401		goto err_out;
402
403	devres_add(dev, hpriv);
404
405	hpriv->mmio = devm_ioremap_resource(dev,
406			      platform_get_resource(pdev, IORESOURCE_MEM, 0));
407	if (IS_ERR(hpriv->mmio)) {
408		rc = PTR_ERR(hpriv->mmio);
409		goto err_out;
410	}
411
412	for (i = 0; i < AHCI_MAX_CLKS; i++) {
413		/*
414		 * For now we must use clk_get(dev, NULL) for the first clock,
415		 * because some platforms (da850, spear13xx) are not yet
416		 * converted to use devicetree for clocks.  For new platforms
417		 * this is equivalent to of_clk_get(dev->of_node, 0).
418		 */
419		if (i == 0)
420			clk = clk_get(dev, NULL);
421		else
422			clk = of_clk_get(dev->of_node, i);
423
424		if (IS_ERR(clk)) {
425			rc = PTR_ERR(clk);
426			if (rc == -EPROBE_DEFER)
427				goto err_out;
428			break;
429		}
430		hpriv->clks[i] = clk;
431	}
432
433	hpriv->ahci_regulator = devm_regulator_get(dev, "ahci");
434	if (IS_ERR(hpriv->ahci_regulator)) {
435		rc = PTR_ERR(hpriv->ahci_regulator);
436		if (rc != 0)
437			goto err_out;
438	}
439
440	hpriv->phy_regulator = devm_regulator_get(dev, "phy");
441	if (IS_ERR(hpriv->phy_regulator)) {
442		rc = PTR_ERR(hpriv->phy_regulator);
443		goto err_out;
444	}
445
446	if (flags & AHCI_PLATFORM_GET_RESETS) {
447		hpriv->rsts = devm_reset_control_array_get_optional_shared(dev);
448		if (IS_ERR(hpriv->rsts)) {
449			rc = PTR_ERR(hpriv->rsts);
450			goto err_out;
451		}
452	}
453
454	/*
455	 * Too many sub-nodes most likely means having something wrong with
456	 * the firmware.
457	 */
458	child_nodes = of_get_child_count(dev->of_node);
459	if (child_nodes > AHCI_MAX_PORTS) {
460		rc = -EINVAL;
461		goto err_out;
462	}
463
464	/*
465	 * If no sub-node was found, we still need to set nports to
466	 * one in order to be able to use the
467	 * ahci_platform_[en|dis]able_[phys|regulators] functions.
468	 */
469	if (child_nodes)
470		hpriv->nports = child_nodes;
471	else
472		hpriv->nports = 1;
473
474	hpriv->phys = devm_kcalloc(dev, hpriv->nports, sizeof(*hpriv->phys), GFP_KERNEL);
475	if (!hpriv->phys) {
476		rc = -ENOMEM;
477		goto err_out;
478	}
479	/*
480	 * We cannot use devm_ here, since ahci_platform_put_resources() uses
481	 * target_pwrs after devm_ have freed memory
482	 */
483	hpriv->target_pwrs = kcalloc(hpriv->nports, sizeof(*hpriv->target_pwrs), GFP_KERNEL);
484	if (!hpriv->target_pwrs) {
485		rc = -ENOMEM;
486		goto err_out;
487	}
488
489	if (child_nodes) {
490		for_each_child_of_node(dev->of_node, child) {
491			u32 port;
492			struct platform_device *port_dev __maybe_unused;
493
494			if (!of_device_is_available(child))
495				continue;
496
497			if (of_property_read_u32(child, "reg", &port)) {
498				rc = -EINVAL;
499				of_node_put(child);
500				goto err_out;
501			}
502
503			if (port >= hpriv->nports) {
504				dev_warn(dev, "invalid port number %d\n", port);
505				continue;
506			}
507			mask_port_map |= BIT(port);
508
509#ifdef CONFIG_OF_ADDRESS
510			of_platform_device_create(child, NULL, NULL);
511
512			port_dev = of_find_device_by_node(child);
513
514			if (port_dev) {
515				rc = ahci_platform_get_regulator(hpriv, port,
516								&port_dev->dev);
517				if (rc == -EPROBE_DEFER) {
518					of_node_put(child);
519					goto err_out;
520				}
521			}
522#endif
523
524			rc = ahci_platform_get_phy(hpriv, port, dev, child);
525			if (rc) {
526				of_node_put(child);
527				goto err_out;
528			}
529
530			enabled_ports++;
531		}
532		if (!enabled_ports) {
533			dev_warn(dev, "No port enabled\n");
534			rc = -ENODEV;
535			goto err_out;
536		}
537
538		if (!hpriv->mask_port_map)
539			hpriv->mask_port_map = mask_port_map;
540	} else {
541		/*
542		 * If no sub-node was found, keep this for device tree
543		 * compatibility
544		 */
545		rc = ahci_platform_get_phy(hpriv, 0, dev, dev->of_node);
546		if (rc)
547			goto err_out;
548
549		rc = ahci_platform_get_regulator(hpriv, 0, dev);
550		if (rc == -EPROBE_DEFER)
551			goto err_out;
552	}
553	pm_runtime_enable(dev);
554	pm_runtime_get_sync(dev);
555	hpriv->got_runtime_pm = true;
556
557	devres_remove_group(dev, NULL);
558	return hpriv;
559
560err_out:
561	devres_release_group(dev, NULL);
562	return ERR_PTR(rc);
563}
564EXPORT_SYMBOL_GPL(ahci_platform_get_resources);
565
566/**
567 * ahci_platform_init_host - Bring up an ahci-platform host
568 * @pdev: platform device pointer for the host
569 * @hpriv: ahci-host private data for the host
570 * @pi_template: template for the ata_port_info to use
571 * @sht: scsi_host_template to use when registering
572 *
573 * This function does all the usual steps needed to bring up an
574 * ahci-platform host, note any necessary resources (ie clks, phys, etc.)
575 * must be initialized / enabled before calling this.
576 *
577 * RETURNS:
578 * 0 on success otherwise a negative error code
579 */
580int ahci_platform_init_host(struct platform_device *pdev,
581			    struct ahci_host_priv *hpriv,
582			    const struct ata_port_info *pi_template,
583			    struct scsi_host_template *sht)
584{
585	struct device *dev = &pdev->dev;
586	struct ata_port_info pi = *pi_template;
587	const struct ata_port_info *ppi[] = { &pi, NULL };
588	struct ata_host *host;
589	int i, irq, n_ports, rc;
590
591	irq = platform_get_irq(pdev, 0);
592	if (irq < 0) {
593		if (irq != -EPROBE_DEFER)
594			dev_err(dev, "no irq\n");
595		return irq;
596	}
597	if (!irq)
598		return -EINVAL;
599
600	hpriv->irq = irq;
601
602	/* prepare host */
603	pi.private_data = (void *)(unsigned long)hpriv->flags;
604
605	ahci_save_initial_config(dev, hpriv);
606
607	if (hpriv->cap & HOST_CAP_NCQ)
608		pi.flags |= ATA_FLAG_NCQ;
609
610	if (hpriv->cap & HOST_CAP_PMP)
611		pi.flags |= ATA_FLAG_PMP;
612
613	ahci_set_em_messages(hpriv, &pi);
614
615	/* CAP.NP sometimes indicate the index of the last enabled
616	 * port, at other times, that of the last possible port, so
617	 * determining the maximum port number requires looking at
618	 * both CAP.NP and port_map.
619	 */
620	n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
621
622	host = ata_host_alloc_pinfo(dev, ppi, n_ports);
623	if (!host)
624		return -ENOMEM;
625
626	host->private_data = hpriv;
627
628	if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
629		host->flags |= ATA_HOST_PARALLEL_SCAN;
630	else
631		dev_info(dev, "SSS flag set, parallel bus scan disabled\n");
632
633	if (pi.flags & ATA_FLAG_EM)
634		ahci_reset_em(host);
635
636	for (i = 0; i < host->n_ports; i++) {
637		struct ata_port *ap = host->ports[i];
638
639		ata_port_desc(ap, "mmio %pR",
640			      platform_get_resource(pdev, IORESOURCE_MEM, 0));
641		ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
642
643		/* set enclosure management message type */
644		if (ap->flags & ATA_FLAG_EM)
645			ap->em_message_type = hpriv->em_msg_type;
646
647		/* disabled/not-implemented port */
648		if (!(hpriv->port_map & (1 << i)))
649			ap->ops = &ata_dummy_port_ops;
650	}
651
652	if (hpriv->cap & HOST_CAP_64) {
653		rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
654		if (rc) {
655			rc = dma_coerce_mask_and_coherent(dev,
656							  DMA_BIT_MASK(32));
657			if (rc) {
658				dev_err(dev, "Failed to enable 64-bit DMA.\n");
659				return rc;
660			}
661			dev_warn(dev, "Enable 32-bit DMA instead of 64-bit.\n");
662		}
663	}
664
665	rc = ahci_reset_controller(host);
666	if (rc)
667		return rc;
668
669	ahci_init_controller(host);
670	ahci_print_info(host, "platform");
671
672	return ahci_host_activate(host, sht);
673}
674EXPORT_SYMBOL_GPL(ahci_platform_init_host);
675
676static void ahci_host_stop(struct ata_host *host)
677{
678	struct ahci_host_priv *hpriv = host->private_data;
679
680	ahci_platform_disable_resources(hpriv);
681}
682
683/**
684 * ahci_platform_shutdown - Disable interrupts and stop DMA for host ports
685 * @pdev: platform device pointer for the host
686 *
687 * This function is called during system shutdown and performs the minimal
688 * deconfiguration required to ensure that an ahci_platform host cannot
689 * corrupt or otherwise interfere with a new kernel being started with kexec.
690 */
691void ahci_platform_shutdown(struct platform_device *pdev)
692{
693	struct ata_host *host = platform_get_drvdata(pdev);
694	struct ahci_host_priv *hpriv = host->private_data;
695	void __iomem *mmio = hpriv->mmio;
696	int i;
697
698	for (i = 0; i < host->n_ports; i++) {
699		struct ata_port *ap = host->ports[i];
700
701		/* Disable port interrupts */
702		if (ap->ops->freeze)
703			ap->ops->freeze(ap);
704
705		/* Stop the port DMA engines */
706		if (ap->ops->port_stop)
707			ap->ops->port_stop(ap);
708	}
709
710	/* Disable and clear host interrupts */
711	writel(readl(mmio + HOST_CTL) & ~HOST_IRQ_EN, mmio + HOST_CTL);
712	readl(mmio + HOST_CTL); /* flush */
713	writel(GENMASK(host->n_ports, 0), mmio + HOST_IRQ_STAT);
714}
715EXPORT_SYMBOL_GPL(ahci_platform_shutdown);
716
717#ifdef CONFIG_PM_SLEEP
718/**
719 * ahci_platform_suspend_host - Suspend an ahci-platform host
720 * @dev: device pointer for the host
721 *
722 * This function does all the usual steps needed to suspend an
723 * ahci-platform host, note any necessary resources (ie clks, phys, etc.)
724 * must be disabled after calling this.
725 *
726 * RETURNS:
727 * 0 on success otherwise a negative error code
728 */
729int ahci_platform_suspend_host(struct device *dev)
730{
731	struct ata_host *host = dev_get_drvdata(dev);
732	struct ahci_host_priv *hpriv = host->private_data;
733	void __iomem *mmio = hpriv->mmio;
734	u32 ctl;
735
736	if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
737		dev_err(dev, "firmware update required for suspend/resume\n");
738		return -EIO;
739	}
740
741	/*
742	 * AHCI spec rev1.1 section 8.3.3:
743	 * Software must disable interrupts prior to requesting a
744	 * transition of the HBA to D3 state.
745	 */
746	ctl = readl(mmio + HOST_CTL);
747	ctl &= ~HOST_IRQ_EN;
748	writel(ctl, mmio + HOST_CTL);
749	readl(mmio + HOST_CTL); /* flush */
750
751	if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS)
752		ahci_platform_disable_phys(hpriv);
753
754	return ata_host_suspend(host, PMSG_SUSPEND);
755}
756EXPORT_SYMBOL_GPL(ahci_platform_suspend_host);
757
758/**
759 * ahci_platform_resume_host - Resume an ahci-platform host
760 * @dev: device pointer for the host
761 *
762 * This function does all the usual steps needed to resume an ahci-platform
763 * host, note any necessary resources (ie clks, phys, etc.)  must be
764 * initialized / enabled before calling this.
765 *
766 * RETURNS:
767 * 0 on success otherwise a negative error code
768 */
769int ahci_platform_resume_host(struct device *dev)
770{
771	struct ata_host *host = dev_get_drvdata(dev);
772	struct ahci_host_priv *hpriv = host->private_data;
773	int rc;
774
775	if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
776		rc = ahci_reset_controller(host);
777		if (rc)
778			return rc;
779
780		ahci_init_controller(host);
781	}
782
783	if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS)
784		ahci_platform_enable_phys(hpriv);
785
786	ata_host_resume(host);
787
788	return 0;
789}
790EXPORT_SYMBOL_GPL(ahci_platform_resume_host);
791
792/**
793 * ahci_platform_suspend - Suspend an ahci-platform device
794 * @dev: the platform device to suspend
795 *
796 * This function suspends the host associated with the device, followed by
797 * disabling all the resources of the device.
798 *
799 * RETURNS:
800 * 0 on success otherwise a negative error code
801 */
802int ahci_platform_suspend(struct device *dev)
803{
804	struct ata_host *host = dev_get_drvdata(dev);
805	struct ahci_host_priv *hpriv = host->private_data;
806	int rc;
807
808	rc = ahci_platform_suspend_host(dev);
809	if (rc)
810		return rc;
811
812	ahci_platform_disable_resources(hpriv);
813
814	return 0;
815}
816EXPORT_SYMBOL_GPL(ahci_platform_suspend);
817
818/**
819 * ahci_platform_resume - Resume an ahci-platform device
820 * @dev: the platform device to resume
821 *
822 * This function enables all the resources of the device followed by
823 * resuming the host associated with the device.
824 *
825 * RETURNS:
826 * 0 on success otherwise a negative error code
827 */
828int ahci_platform_resume(struct device *dev)
829{
830	struct ata_host *host = dev_get_drvdata(dev);
831	struct ahci_host_priv *hpriv = host->private_data;
832	int rc;
833
834	rc = ahci_platform_enable_resources(hpriv);
835	if (rc)
836		return rc;
837
838	rc = ahci_platform_resume_host(dev);
839	if (rc)
840		goto disable_resources;
841
842	/* We resumed so update PM runtime state */
843	pm_runtime_disable(dev);
844	pm_runtime_set_active(dev);
845	pm_runtime_enable(dev);
846
847	return 0;
848
849disable_resources:
850	ahci_platform_disable_resources(hpriv);
851
852	return rc;
853}
854EXPORT_SYMBOL_GPL(ahci_platform_resume);
855#endif
856
857MODULE_DESCRIPTION("AHCI SATA platform library");
858MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
859MODULE_LICENSE("GPL");
860