1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Core of Xen paravirt_ops implementation. 4 * 5 * This file contains the xen_paravirt_ops structure itself, and the 6 * implementations for: 7 * - privileged instructions 8 * - interrupt flags 9 * - segment operations 10 * - booting and setup 11 * 12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 13 */ 14 15#include <linux/cpu.h> 16#include <linux/kernel.h> 17#include <linux/init.h> 18#include <linux/smp.h> 19#include <linux/preempt.h> 20#include <linux/hardirq.h> 21#include <linux/percpu.h> 22#include <linux/delay.h> 23#include <linux/start_kernel.h> 24#include <linux/sched.h> 25#include <linux/kprobes.h> 26#include <linux/memblock.h> 27#include <linux/export.h> 28#include <linux/mm.h> 29#include <linux/page-flags.h> 30#include <linux/highmem.h> 31#include <linux/console.h> 32#include <linux/pci.h> 33#include <linux/gfp.h> 34#include <linux/edd.h> 35#include <linux/objtool.h> 36 37#include <xen/xen.h> 38#include <xen/events.h> 39#include <xen/interface/xen.h> 40#include <xen/interface/version.h> 41#include <xen/interface/physdev.h> 42#include <xen/interface/vcpu.h> 43#include <xen/interface/memory.h> 44#include <xen/interface/nmi.h> 45#include <xen/interface/xen-mca.h> 46#include <xen/features.h> 47#include <xen/page.h> 48#include <xen/hvc-console.h> 49#include <xen/acpi.h> 50 51#include <asm/paravirt.h> 52#include <asm/apic.h> 53#include <asm/page.h> 54#include <asm/xen/pci.h> 55#include <asm/xen/hypercall.h> 56#include <asm/xen/hypervisor.h> 57#include <asm/xen/cpuid.h> 58#include <asm/fixmap.h> 59#include <asm/processor.h> 60#include <asm/proto.h> 61#include <asm/msr-index.h> 62#include <asm/traps.h> 63#include <asm/setup.h> 64#include <asm/desc.h> 65#include <asm/pgalloc.h> 66#include <asm/tlbflush.h> 67#include <asm/reboot.h> 68#include <asm/stackprotector.h> 69#include <asm/hypervisor.h> 70#include <asm/mach_traps.h> 71#include <asm/mwait.h> 72#include <asm/pci_x86.h> 73#include <asm/cpu.h> 74#ifdef CONFIG_X86_IOPL_IOPERM 75#include <asm/io_bitmap.h> 76#endif 77 78#ifdef CONFIG_ACPI 79#include <linux/acpi.h> 80#include <asm/acpi.h> 81#include <acpi/pdc_intel.h> 82#include <acpi/processor.h> 83#include <xen/interface/platform.h> 84#endif 85 86#include "xen-ops.h" 87#include "mmu.h" 88#include "smp.h" 89#include "multicalls.h" 90#include "pmu.h" 91 92#include "../kernel/cpu/cpu.h" /* get_cpu_cap() */ 93 94void *xen_initial_gdt; 95 96static int xen_cpu_up_prepare_pv(unsigned int cpu); 97static int xen_cpu_dead_pv(unsigned int cpu); 98 99struct tls_descs { 100 struct desc_struct desc[3]; 101}; 102 103/* 104 * Updating the 3 TLS descriptors in the GDT on every task switch is 105 * surprisingly expensive so we avoid updating them if they haven't 106 * changed. Since Xen writes different descriptors than the one 107 * passed in the update_descriptor hypercall we keep shadow copies to 108 * compare against. 109 */ 110static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); 111 112static void __init xen_banner(void) 113{ 114 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); 115 struct xen_extraversion extra; 116 HYPERVISOR_xen_version(XENVER_extraversion, &extra); 117 118 pr_info("Booting paravirtualized kernel on %s\n", pv_info.name); 119 printk(KERN_INFO "Xen version: %d.%d%s%s\n", 120 version >> 16, version & 0xffff, extra.extraversion, 121 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); 122} 123 124static void __init xen_pv_init_platform(void) 125{ 126 populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP)); 127 128 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info); 129 HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); 130 131 /* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */ 132 xen_vcpu_info_reset(0); 133 134 /* pvclock is in shared info area */ 135 xen_init_time_ops(); 136} 137 138static void __init xen_pv_guest_late_init(void) 139{ 140#ifndef CONFIG_SMP 141 /* Setup shared vcpu info for non-smp configurations */ 142 xen_setup_vcpu_info_placement(); 143#endif 144} 145 146/* Check if running on Xen version (major, minor) or later */ 147bool 148xen_running_on_version_or_later(unsigned int major, unsigned int minor) 149{ 150 unsigned int version; 151 152 if (!xen_domain()) 153 return false; 154 155 version = HYPERVISOR_xen_version(XENVER_version, NULL); 156 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || 157 ((version >> 16) > major)) 158 return true; 159 return false; 160} 161 162static __read_mostly unsigned int cpuid_leaf5_ecx_val; 163static __read_mostly unsigned int cpuid_leaf5_edx_val; 164 165static void xen_cpuid(unsigned int *ax, unsigned int *bx, 166 unsigned int *cx, unsigned int *dx) 167{ 168 unsigned maskebx = ~0; 169 170 /* 171 * Mask out inconvenient features, to try and disable as many 172 * unsupported kernel subsystems as possible. 173 */ 174 switch (*ax) { 175 case CPUID_MWAIT_LEAF: 176 /* Synthesize the values.. */ 177 *ax = 0; 178 *bx = 0; 179 *cx = cpuid_leaf5_ecx_val; 180 *dx = cpuid_leaf5_edx_val; 181 return; 182 183 case 0xb: 184 /* Suppress extended topology stuff */ 185 maskebx = 0; 186 break; 187 } 188 189 asm(XEN_EMULATE_PREFIX "cpuid" 190 : "=a" (*ax), 191 "=b" (*bx), 192 "=c" (*cx), 193 "=d" (*dx) 194 : "0" (*ax), "2" (*cx)); 195 196 *bx &= maskebx; 197} 198STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */ 199 200static bool __init xen_check_mwait(void) 201{ 202#ifdef CONFIG_ACPI 203 struct xen_platform_op op = { 204 .cmd = XENPF_set_processor_pminfo, 205 .u.set_pminfo.id = -1, 206 .u.set_pminfo.type = XEN_PM_PDC, 207 }; 208 uint32_t buf[3]; 209 unsigned int ax, bx, cx, dx; 210 unsigned int mwait_mask; 211 212 /* We need to determine whether it is OK to expose the MWAIT 213 * capability to the kernel to harvest deeper than C3 states from ACPI 214 * _CST using the processor_harvest_xen.c module. For this to work, we 215 * need to gather the MWAIT_LEAF values (which the cstate.c code 216 * checks against). The hypervisor won't expose the MWAIT flag because 217 * it would break backwards compatibility; so we will find out directly 218 * from the hardware and hypercall. 219 */ 220 if (!xen_initial_domain()) 221 return false; 222 223 /* 224 * When running under platform earlier than Xen4.2, do not expose 225 * mwait, to avoid the risk of loading native acpi pad driver 226 */ 227 if (!xen_running_on_version_or_later(4, 2)) 228 return false; 229 230 ax = 1; 231 cx = 0; 232 233 native_cpuid(&ax, &bx, &cx, &dx); 234 235 mwait_mask = (1 << (X86_FEATURE_EST % 32)) | 236 (1 << (X86_FEATURE_MWAIT % 32)); 237 238 if ((cx & mwait_mask) != mwait_mask) 239 return false; 240 241 /* We need to emulate the MWAIT_LEAF and for that we need both 242 * ecx and edx. The hypercall provides only partial information. 243 */ 244 245 ax = CPUID_MWAIT_LEAF; 246 bx = 0; 247 cx = 0; 248 dx = 0; 249 250 native_cpuid(&ax, &bx, &cx, &dx); 251 252 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, 253 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. 254 */ 255 buf[0] = ACPI_PDC_REVISION_ID; 256 buf[1] = 1; 257 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); 258 259 set_xen_guest_handle(op.u.set_pminfo.pdc, buf); 260 261 if ((HYPERVISOR_platform_op(&op) == 0) && 262 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { 263 cpuid_leaf5_ecx_val = cx; 264 cpuid_leaf5_edx_val = dx; 265 } 266 return true; 267#else 268 return false; 269#endif 270} 271 272static bool __init xen_check_xsave(void) 273{ 274 unsigned int cx, xsave_mask; 275 276 cx = cpuid_ecx(1); 277 278 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) | 279 (1 << (X86_FEATURE_OSXSAVE % 32)); 280 281 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 282 return (cx & xsave_mask) == xsave_mask; 283} 284 285static void __init xen_init_capabilities(void) 286{ 287 setup_force_cpu_cap(X86_FEATURE_XENPV); 288 setup_clear_cpu_cap(X86_FEATURE_DCA); 289 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF); 290 setup_clear_cpu_cap(X86_FEATURE_MTRR); 291 setup_clear_cpu_cap(X86_FEATURE_ACC); 292 setup_clear_cpu_cap(X86_FEATURE_X2APIC); 293 setup_clear_cpu_cap(X86_FEATURE_SME); 294 295 /* 296 * Xen PV would need some work to support PCID: CR3 handling as well 297 * as xen_flush_tlb_others() would need updating. 298 */ 299 setup_clear_cpu_cap(X86_FEATURE_PCID); 300 301 if (!xen_initial_domain()) 302 setup_clear_cpu_cap(X86_FEATURE_ACPI); 303 304 if (xen_check_mwait()) 305 setup_force_cpu_cap(X86_FEATURE_MWAIT); 306 else 307 setup_clear_cpu_cap(X86_FEATURE_MWAIT); 308 309 if (!xen_check_xsave()) { 310 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 311 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE); 312 } 313} 314 315static void xen_set_debugreg(int reg, unsigned long val) 316{ 317 HYPERVISOR_set_debugreg(reg, val); 318} 319 320static unsigned long xen_get_debugreg(int reg) 321{ 322 return HYPERVISOR_get_debugreg(reg); 323} 324 325static void xen_end_context_switch(struct task_struct *next) 326{ 327 xen_mc_flush(); 328 paravirt_end_context_switch(next); 329} 330 331static unsigned long xen_store_tr(void) 332{ 333 return 0; 334} 335 336/* 337 * Set the page permissions for a particular virtual address. If the 338 * address is a vmalloc mapping (or other non-linear mapping), then 339 * find the linear mapping of the page and also set its protections to 340 * match. 341 */ 342static void set_aliased_prot(void *v, pgprot_t prot) 343{ 344 int level; 345 pte_t *ptep; 346 pte_t pte; 347 unsigned long pfn; 348 unsigned char dummy; 349 void *va; 350 351 ptep = lookup_address((unsigned long)v, &level); 352 BUG_ON(ptep == NULL); 353 354 pfn = pte_pfn(*ptep); 355 pte = pfn_pte(pfn, prot); 356 357 /* 358 * Careful: update_va_mapping() will fail if the virtual address 359 * we're poking isn't populated in the page tables. We don't 360 * need to worry about the direct map (that's always in the page 361 * tables), but we need to be careful about vmap space. In 362 * particular, the top level page table can lazily propagate 363 * entries between processes, so if we've switched mms since we 364 * vmapped the target in the first place, we might not have the 365 * top-level page table entry populated. 366 * 367 * We disable preemption because we want the same mm active when 368 * we probe the target and when we issue the hypercall. We'll 369 * have the same nominal mm, but if we're a kernel thread, lazy 370 * mm dropping could change our pgd. 371 * 372 * Out of an abundance of caution, this uses __get_user() to fault 373 * in the target address just in case there's some obscure case 374 * in which the target address isn't readable. 375 */ 376 377 preempt_disable(); 378 379 copy_from_kernel_nofault(&dummy, v, 1); 380 381 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) 382 BUG(); 383 384 va = __va(PFN_PHYS(pfn)); 385 386 if (va != v && HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 387 BUG(); 388 389 preempt_enable(); 390} 391 392static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) 393{ 394 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 395 int i; 396 397 /* 398 * We need to mark the all aliases of the LDT pages RO. We 399 * don't need to call vm_flush_aliases(), though, since that's 400 * only responsible for flushing aliases out the TLBs, not the 401 * page tables, and Xen will flush the TLB for us if needed. 402 * 403 * To avoid confusing future readers: none of this is necessary 404 * to load the LDT. The hypervisor only checks this when the 405 * LDT is faulted in due to subsequent descriptor access. 406 */ 407 408 for (i = 0; i < entries; i += entries_per_page) 409 set_aliased_prot(ldt + i, PAGE_KERNEL_RO); 410} 411 412static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) 413{ 414 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 415 int i; 416 417 for (i = 0; i < entries; i += entries_per_page) 418 set_aliased_prot(ldt + i, PAGE_KERNEL); 419} 420 421static void xen_set_ldt(const void *addr, unsigned entries) 422{ 423 struct mmuext_op *op; 424 struct multicall_space mcs = xen_mc_entry(sizeof(*op)); 425 426 trace_xen_cpu_set_ldt(addr, entries); 427 428 op = mcs.args; 429 op->cmd = MMUEXT_SET_LDT; 430 op->arg1.linear_addr = (unsigned long)addr; 431 op->arg2.nr_ents = entries; 432 433 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 434 435 xen_mc_issue(PARAVIRT_LAZY_CPU); 436} 437 438static void xen_load_gdt(const struct desc_ptr *dtr) 439{ 440 unsigned long va = dtr->address; 441 unsigned int size = dtr->size + 1; 442 unsigned long pfn, mfn; 443 int level; 444 pte_t *ptep; 445 void *virt; 446 447 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 448 BUG_ON(size > PAGE_SIZE); 449 BUG_ON(va & ~PAGE_MASK); 450 451 /* 452 * The GDT is per-cpu and is in the percpu data area. 453 * That can be virtually mapped, so we need to do a 454 * page-walk to get the underlying MFN for the 455 * hypercall. The page can also be in the kernel's 456 * linear range, so we need to RO that mapping too. 457 */ 458 ptep = lookup_address(va, &level); 459 BUG_ON(ptep == NULL); 460 461 pfn = pte_pfn(*ptep); 462 mfn = pfn_to_mfn(pfn); 463 virt = __va(PFN_PHYS(pfn)); 464 465 make_lowmem_page_readonly((void *)va); 466 make_lowmem_page_readonly(virt); 467 468 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 469 BUG(); 470} 471 472/* 473 * load_gdt for early boot, when the gdt is only mapped once 474 */ 475static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) 476{ 477 unsigned long va = dtr->address; 478 unsigned int size = dtr->size + 1; 479 unsigned long pfn, mfn; 480 pte_t pte; 481 482 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 483 BUG_ON(size > PAGE_SIZE); 484 BUG_ON(va & ~PAGE_MASK); 485 486 pfn = virt_to_pfn(va); 487 mfn = pfn_to_mfn(pfn); 488 489 pte = pfn_pte(pfn, PAGE_KERNEL_RO); 490 491 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 492 BUG(); 493 494 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 495 BUG(); 496} 497 498static inline bool desc_equal(const struct desc_struct *d1, 499 const struct desc_struct *d2) 500{ 501 return !memcmp(d1, d2, sizeof(*d1)); 502} 503 504static void load_TLS_descriptor(struct thread_struct *t, 505 unsigned int cpu, unsigned int i) 506{ 507 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; 508 struct desc_struct *gdt; 509 xmaddr_t maddr; 510 struct multicall_space mc; 511 512 if (desc_equal(shadow, &t->tls_array[i])) 513 return; 514 515 *shadow = t->tls_array[i]; 516 517 gdt = get_cpu_gdt_rw(cpu); 518 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); 519 mc = __xen_mc_entry(0); 520 521 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); 522} 523 524static void xen_load_tls(struct thread_struct *t, unsigned int cpu) 525{ 526 /* 527 * In lazy mode we need to zero %fs, otherwise we may get an 528 * exception between the new %fs descriptor being loaded and 529 * %fs being effectively cleared at __switch_to(). 530 */ 531 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) 532 loadsegment(fs, 0); 533 534 xen_mc_batch(); 535 536 load_TLS_descriptor(t, cpu, 0); 537 load_TLS_descriptor(t, cpu, 1); 538 load_TLS_descriptor(t, cpu, 2); 539 540 xen_mc_issue(PARAVIRT_LAZY_CPU); 541} 542 543static void xen_load_gs_index(unsigned int idx) 544{ 545 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) 546 BUG(); 547} 548 549static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, 550 const void *ptr) 551{ 552 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); 553 u64 entry = *(u64 *)ptr; 554 555 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); 556 557 preempt_disable(); 558 559 xen_mc_flush(); 560 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) 561 BUG(); 562 563 preempt_enable(); 564} 565 566void noist_exc_debug(struct pt_regs *regs); 567 568DEFINE_IDTENTRY_RAW(xenpv_exc_nmi) 569{ 570 /* On Xen PV, NMI doesn't use IST. The C part is the sane as native. */ 571 exc_nmi(regs); 572} 573 574DEFINE_IDTENTRY_RAW(xenpv_exc_debug) 575{ 576 /* 577 * There's no IST on Xen PV, but we still need to dispatch 578 * to the correct handler. 579 */ 580 if (user_mode(regs)) 581 noist_exc_debug(regs); 582 else 583 exc_debug(regs); 584} 585 586DEFINE_IDTENTRY_RAW(exc_xen_unknown_trap) 587{ 588 /* This should never happen and there is no way to handle it. */ 589 instrumentation_begin(); 590 pr_err("Unknown trap in Xen PV mode."); 591 BUG(); 592 instrumentation_end(); 593} 594 595struct trap_array_entry { 596 void (*orig)(void); 597 void (*xen)(void); 598 bool ist_okay; 599}; 600 601#define TRAP_ENTRY(func, ist_ok) { \ 602 .orig = asm_##func, \ 603 .xen = xen_asm_##func, \ 604 .ist_okay = ist_ok } 605 606#define TRAP_ENTRY_REDIR(func, ist_ok) { \ 607 .orig = asm_##func, \ 608 .xen = xen_asm_xenpv_##func, \ 609 .ist_okay = ist_ok } 610 611static struct trap_array_entry trap_array[] = { 612 TRAP_ENTRY_REDIR(exc_debug, true ), 613 TRAP_ENTRY(exc_double_fault, true ), 614#ifdef CONFIG_X86_MCE 615 TRAP_ENTRY(exc_machine_check, true ), 616#endif 617 TRAP_ENTRY_REDIR(exc_nmi, true ), 618 TRAP_ENTRY(exc_int3, false ), 619 TRAP_ENTRY(exc_overflow, false ), 620#ifdef CONFIG_IA32_EMULATION 621 { entry_INT80_compat, xen_entry_INT80_compat, false }, 622#endif 623 TRAP_ENTRY(exc_page_fault, false ), 624 TRAP_ENTRY(exc_divide_error, false ), 625 TRAP_ENTRY(exc_bounds, false ), 626 TRAP_ENTRY(exc_invalid_op, false ), 627 TRAP_ENTRY(exc_device_not_available, false ), 628 TRAP_ENTRY(exc_coproc_segment_overrun, false ), 629 TRAP_ENTRY(exc_invalid_tss, false ), 630 TRAP_ENTRY(exc_segment_not_present, false ), 631 TRAP_ENTRY(exc_stack_segment, false ), 632 TRAP_ENTRY(exc_general_protection, false ), 633 TRAP_ENTRY(exc_spurious_interrupt_bug, false ), 634 TRAP_ENTRY(exc_coprocessor_error, false ), 635 TRAP_ENTRY(exc_alignment_check, false ), 636 TRAP_ENTRY(exc_simd_coprocessor_error, false ), 637}; 638 639static bool __ref get_trap_addr(void **addr, unsigned int ist) 640{ 641 unsigned int nr; 642 bool ist_okay = false; 643 bool found = false; 644 645 /* 646 * Replace trap handler addresses by Xen specific ones. 647 * Check for known traps using IST and whitelist them. 648 * The debugger ones are the only ones we care about. 649 * Xen will handle faults like double_fault, so we should never see 650 * them. Warn if there's an unexpected IST-using fault handler. 651 */ 652 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) { 653 struct trap_array_entry *entry = trap_array + nr; 654 655 if (*addr == entry->orig) { 656 *addr = entry->xen; 657 ist_okay = entry->ist_okay; 658 found = true; 659 break; 660 } 661 } 662 663 if (nr == ARRAY_SIZE(trap_array) && 664 *addr >= (void *)early_idt_handler_array[0] && 665 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) { 666 nr = (*addr - (void *)early_idt_handler_array[0]) / 667 EARLY_IDT_HANDLER_SIZE; 668 *addr = (void *)xen_early_idt_handler_array[nr]; 669 found = true; 670 } 671 672 if (!found) 673 *addr = (void *)xen_asm_exc_xen_unknown_trap; 674 675 if (WARN_ON(found && ist != 0 && !ist_okay)) 676 return false; 677 678 return true; 679} 680 681static int cvt_gate_to_trap(int vector, const gate_desc *val, 682 struct trap_info *info) 683{ 684 unsigned long addr; 685 686 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT) 687 return 0; 688 689 info->vector = vector; 690 691 addr = gate_offset(val); 692 if (!get_trap_addr((void **)&addr, val->bits.ist)) 693 return 0; 694 info->address = addr; 695 696 info->cs = gate_segment(val); 697 info->flags = val->bits.dpl; 698 /* interrupt gates clear IF */ 699 if (val->bits.type == GATE_INTERRUPT) 700 info->flags |= 1 << 2; 701 702 return 1; 703} 704 705/* Locations of each CPU's IDT */ 706static DEFINE_PER_CPU(struct desc_ptr, idt_desc); 707 708/* Set an IDT entry. If the entry is part of the current IDT, then 709 also update Xen. */ 710static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) 711{ 712 unsigned long p = (unsigned long)&dt[entrynum]; 713 unsigned long start, end; 714 715 trace_xen_cpu_write_idt_entry(dt, entrynum, g); 716 717 preempt_disable(); 718 719 start = __this_cpu_read(idt_desc.address); 720 end = start + __this_cpu_read(idt_desc.size) + 1; 721 722 xen_mc_flush(); 723 724 native_write_idt_entry(dt, entrynum, g); 725 726 if (p >= start && (p + 8) <= end) { 727 struct trap_info info[2]; 728 729 info[1].address = 0; 730 731 if (cvt_gate_to_trap(entrynum, g, &info[0])) 732 if (HYPERVISOR_set_trap_table(info)) 733 BUG(); 734 } 735 736 preempt_enable(); 737} 738 739static unsigned xen_convert_trap_info(const struct desc_ptr *desc, 740 struct trap_info *traps, bool full) 741{ 742 unsigned in, out, count; 743 744 count = (desc->size+1) / sizeof(gate_desc); 745 BUG_ON(count > 256); 746 747 for (in = out = 0; in < count; in++) { 748 gate_desc *entry = (gate_desc *)(desc->address) + in; 749 750 if (cvt_gate_to_trap(in, entry, &traps[out]) || full) 751 out++; 752 } 753 754 return out; 755} 756 757void xen_copy_trap_info(struct trap_info *traps) 758{ 759 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); 760 761 xen_convert_trap_info(desc, traps, true); 762} 763 764/* Load a new IDT into Xen. In principle this can be per-CPU, so we 765 hold a spinlock to protect the static traps[] array (static because 766 it avoids allocation, and saves stack space). */ 767static void xen_load_idt(const struct desc_ptr *desc) 768{ 769 static DEFINE_SPINLOCK(lock); 770 static struct trap_info traps[257]; 771 static const struct trap_info zero = { }; 772 unsigned out; 773 774 trace_xen_cpu_load_idt(desc); 775 776 spin_lock(&lock); 777 778 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); 779 780 out = xen_convert_trap_info(desc, traps, false); 781 traps[out] = zero; 782 783 xen_mc_flush(); 784 if (HYPERVISOR_set_trap_table(traps)) 785 BUG(); 786 787 spin_unlock(&lock); 788} 789 790/* Write a GDT descriptor entry. Ignore LDT descriptors, since 791 they're handled differently. */ 792static void xen_write_gdt_entry(struct desc_struct *dt, int entry, 793 const void *desc, int type) 794{ 795 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 796 797 preempt_disable(); 798 799 switch (type) { 800 case DESC_LDT: 801 case DESC_TSS: 802 /* ignore */ 803 break; 804 805 default: { 806 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); 807 808 xen_mc_flush(); 809 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 810 BUG(); 811 } 812 813 } 814 815 preempt_enable(); 816} 817 818/* 819 * Version of write_gdt_entry for use at early boot-time needed to 820 * update an entry as simply as possible. 821 */ 822static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, 823 const void *desc, int type) 824{ 825 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 826 827 switch (type) { 828 case DESC_LDT: 829 case DESC_TSS: 830 /* ignore */ 831 break; 832 833 default: { 834 xmaddr_t maddr = virt_to_machine(&dt[entry]); 835 836 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 837 dt[entry] = *(struct desc_struct *)desc; 838 } 839 840 } 841} 842 843static void xen_load_sp0(unsigned long sp0) 844{ 845 struct multicall_space mcs; 846 847 mcs = xen_mc_entry(0); 848 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0); 849 xen_mc_issue(PARAVIRT_LAZY_CPU); 850 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); 851} 852 853#ifdef CONFIG_X86_IOPL_IOPERM 854static void xen_invalidate_io_bitmap(void) 855{ 856 struct physdev_set_iobitmap iobitmap = { 857 .bitmap = NULL, 858 .nr_ports = 0, 859 }; 860 861 native_tss_invalidate_io_bitmap(); 862 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap); 863} 864 865static void xen_update_io_bitmap(void) 866{ 867 struct physdev_set_iobitmap iobitmap; 868 struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw); 869 870 native_tss_update_io_bitmap(); 871 872 iobitmap.bitmap = (uint8_t *)(&tss->x86_tss) + 873 tss->x86_tss.io_bitmap_base; 874 if (tss->x86_tss.io_bitmap_base == IO_BITMAP_OFFSET_INVALID) 875 iobitmap.nr_ports = 0; 876 else 877 iobitmap.nr_ports = IO_BITMAP_BITS; 878 879 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap); 880} 881#endif 882 883static void xen_io_delay(void) 884{ 885} 886 887static DEFINE_PER_CPU(unsigned long, xen_cr0_value); 888 889static unsigned long xen_read_cr0(void) 890{ 891 unsigned long cr0 = this_cpu_read(xen_cr0_value); 892 893 if (unlikely(cr0 == 0)) { 894 cr0 = native_read_cr0(); 895 this_cpu_write(xen_cr0_value, cr0); 896 } 897 898 return cr0; 899} 900 901static void xen_write_cr0(unsigned long cr0) 902{ 903 struct multicall_space mcs; 904 905 this_cpu_write(xen_cr0_value, cr0); 906 907 /* Only pay attention to cr0.TS; everything else is 908 ignored. */ 909 mcs = xen_mc_entry(0); 910 911 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); 912 913 xen_mc_issue(PARAVIRT_LAZY_CPU); 914} 915 916static void xen_write_cr4(unsigned long cr4) 917{ 918 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); 919 920 native_write_cr4(cr4); 921} 922 923static u64 xen_read_msr_safe(unsigned int msr, int *err) 924{ 925 u64 val; 926 927 if (pmu_msr_read(msr, &val, err)) 928 return val; 929 930 val = native_read_msr_safe(msr, err); 931 switch (msr) { 932 case MSR_IA32_APICBASE: 933 val &= ~X2APIC_ENABLE; 934 break; 935 } 936 return val; 937} 938 939static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 940{ 941 int ret; 942 unsigned int which; 943 u64 base; 944 945 ret = 0; 946 947 switch (msr) { 948 case MSR_FS_BASE: which = SEGBASE_FS; goto set; 949 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; 950 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; 951 952 set: 953 base = ((u64)high << 32) | low; 954 if (HYPERVISOR_set_segment_base(which, base) != 0) 955 ret = -EIO; 956 break; 957 958 case MSR_STAR: 959 case MSR_CSTAR: 960 case MSR_LSTAR: 961 case MSR_SYSCALL_MASK: 962 case MSR_IA32_SYSENTER_CS: 963 case MSR_IA32_SYSENTER_ESP: 964 case MSR_IA32_SYSENTER_EIP: 965 /* Fast syscall setup is all done in hypercalls, so 966 these are all ignored. Stub them out here to stop 967 Xen console noise. */ 968 break; 969 970 default: 971 if (!pmu_msr_write(msr, low, high, &ret)) 972 ret = native_write_msr_safe(msr, low, high); 973 } 974 975 return ret; 976} 977 978static u64 xen_read_msr(unsigned int msr) 979{ 980 /* 981 * This will silently swallow a #GP from RDMSR. It may be worth 982 * changing that. 983 */ 984 int err; 985 986 return xen_read_msr_safe(msr, &err); 987} 988 989static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) 990{ 991 /* 992 * This will silently swallow a #GP from WRMSR. It may be worth 993 * changing that. 994 */ 995 xen_write_msr_safe(msr, low, high); 996} 997 998/* This is called once we have the cpu_possible_mask */ 999void __init xen_setup_vcpu_info_placement(void) 1000{ 1001 int cpu; 1002 1003 for_each_possible_cpu(cpu) { 1004 /* Set up direct vCPU id mapping for PV guests. */ 1005 per_cpu(xen_vcpu_id, cpu) = cpu; 1006 1007 /* 1008 * xen_vcpu_setup(cpu) can fail -- in which case it 1009 * falls back to the shared_info version for cpus 1010 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS. 1011 * 1012 * xen_cpu_up_prepare_pv() handles the rest by failing 1013 * them in hotplug. 1014 */ 1015 (void) xen_vcpu_setup(cpu); 1016 } 1017 1018 /* 1019 * xen_vcpu_setup managed to place the vcpu_info within the 1020 * percpu area for all cpus, so make use of it. 1021 */ 1022 if (xen_have_vcpu_info_placement) { 1023 pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); 1024 pv_ops.irq.restore_fl = 1025 __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); 1026 pv_ops.irq.irq_disable = 1027 __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); 1028 pv_ops.irq.irq_enable = 1029 __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); 1030 pv_ops.mmu.read_cr2 = 1031 __PV_IS_CALLEE_SAVE(xen_read_cr2_direct); 1032 } 1033} 1034 1035static const struct pv_info xen_info __initconst = { 1036 .extra_user_64bit_cs = FLAT_USER_CS64, 1037 .name = "Xen", 1038}; 1039 1040static const struct pv_cpu_ops xen_cpu_ops __initconst = { 1041 .cpuid = xen_cpuid, 1042 1043 .set_debugreg = xen_set_debugreg, 1044 .get_debugreg = xen_get_debugreg, 1045 1046 .read_cr0 = xen_read_cr0, 1047 .write_cr0 = xen_write_cr0, 1048 1049 .write_cr4 = xen_write_cr4, 1050 1051 .wbinvd = native_wbinvd, 1052 1053 .read_msr = xen_read_msr, 1054 .write_msr = xen_write_msr, 1055 1056 .read_msr_safe = xen_read_msr_safe, 1057 .write_msr_safe = xen_write_msr_safe, 1058 1059 .read_pmc = xen_read_pmc, 1060 1061 .iret = xen_iret, 1062 .usergs_sysret64 = xen_sysret64, 1063 1064 .load_tr_desc = paravirt_nop, 1065 .set_ldt = xen_set_ldt, 1066 .load_gdt = xen_load_gdt, 1067 .load_idt = xen_load_idt, 1068 .load_tls = xen_load_tls, 1069 .load_gs_index = xen_load_gs_index, 1070 1071 .alloc_ldt = xen_alloc_ldt, 1072 .free_ldt = xen_free_ldt, 1073 1074 .store_tr = xen_store_tr, 1075 1076 .write_ldt_entry = xen_write_ldt_entry, 1077 .write_gdt_entry = xen_write_gdt_entry, 1078 .write_idt_entry = xen_write_idt_entry, 1079 .load_sp0 = xen_load_sp0, 1080 1081#ifdef CONFIG_X86_IOPL_IOPERM 1082 .invalidate_io_bitmap = xen_invalidate_io_bitmap, 1083 .update_io_bitmap = xen_update_io_bitmap, 1084#endif 1085 .io_delay = xen_io_delay, 1086 1087 .start_context_switch = paravirt_start_context_switch, 1088 .end_context_switch = xen_end_context_switch, 1089}; 1090 1091static void xen_restart(char *msg) 1092{ 1093 xen_reboot(SHUTDOWN_reboot); 1094} 1095 1096static void xen_machine_halt(void) 1097{ 1098 xen_reboot(SHUTDOWN_poweroff); 1099} 1100 1101static void xen_machine_power_off(void) 1102{ 1103 if (pm_power_off) 1104 pm_power_off(); 1105 xen_reboot(SHUTDOWN_poweroff); 1106} 1107 1108static void xen_crash_shutdown(struct pt_regs *regs) 1109{ 1110 xen_reboot(SHUTDOWN_crash); 1111} 1112 1113static const struct machine_ops xen_machine_ops __initconst = { 1114 .restart = xen_restart, 1115 .halt = xen_machine_halt, 1116 .power_off = xen_machine_power_off, 1117 .shutdown = xen_machine_halt, 1118 .crash_shutdown = xen_crash_shutdown, 1119 .emergency_restart = xen_emergency_restart, 1120}; 1121 1122static unsigned char xen_get_nmi_reason(void) 1123{ 1124 unsigned char reason = 0; 1125 1126 /* Construct a value which looks like it came from port 0x61. */ 1127 if (test_bit(_XEN_NMIREASON_io_error, 1128 &HYPERVISOR_shared_info->arch.nmi_reason)) 1129 reason |= NMI_REASON_IOCHK; 1130 if (test_bit(_XEN_NMIREASON_pci_serr, 1131 &HYPERVISOR_shared_info->arch.nmi_reason)) 1132 reason |= NMI_REASON_SERR; 1133 1134 return reason; 1135} 1136 1137static void __init xen_boot_params_init_edd(void) 1138{ 1139#if IS_ENABLED(CONFIG_EDD) 1140 struct xen_platform_op op; 1141 struct edd_info *edd_info; 1142 u32 *mbr_signature; 1143 unsigned nr; 1144 int ret; 1145 1146 edd_info = boot_params.eddbuf; 1147 mbr_signature = boot_params.edd_mbr_sig_buffer; 1148 1149 op.cmd = XENPF_firmware_info; 1150 1151 op.u.firmware_info.type = XEN_FW_DISK_INFO; 1152 for (nr = 0; nr < EDDMAXNR; nr++) { 1153 struct edd_info *info = edd_info + nr; 1154 1155 op.u.firmware_info.index = nr; 1156 info->params.length = sizeof(info->params); 1157 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, 1158 &info->params); 1159 ret = HYPERVISOR_platform_op(&op); 1160 if (ret) 1161 break; 1162 1163#define C(x) info->x = op.u.firmware_info.u.disk_info.x 1164 C(device); 1165 C(version); 1166 C(interface_support); 1167 C(legacy_max_cylinder); 1168 C(legacy_max_head); 1169 C(legacy_sectors_per_track); 1170#undef C 1171 } 1172 boot_params.eddbuf_entries = nr; 1173 1174 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; 1175 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { 1176 op.u.firmware_info.index = nr; 1177 ret = HYPERVISOR_platform_op(&op); 1178 if (ret) 1179 break; 1180 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; 1181 } 1182 boot_params.edd_mbr_sig_buf_entries = nr; 1183#endif 1184} 1185 1186/* 1187 * Set up the GDT and segment registers for -fstack-protector. Until 1188 * we do this, we have to be careful not to call any stack-protected 1189 * function, which is most of the kernel. 1190 */ 1191static void __init xen_setup_gdt(int cpu) 1192{ 1193 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry_boot; 1194 pv_ops.cpu.load_gdt = xen_load_gdt_boot; 1195 1196 setup_stack_canary_segment(cpu); 1197 switch_to_new_gdt(cpu); 1198 1199 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry; 1200 pv_ops.cpu.load_gdt = xen_load_gdt; 1201} 1202 1203static void __init xen_dom0_set_legacy_features(void) 1204{ 1205 x86_platform.legacy.rtc = 1; 1206} 1207 1208static void __init xen_domu_set_legacy_features(void) 1209{ 1210 x86_platform.legacy.rtc = 0; 1211} 1212 1213/* First C function to be called on Xen boot */ 1214asmlinkage __visible void __init xen_start_kernel(void) 1215{ 1216 struct physdev_set_iopl set_iopl; 1217 unsigned long initrd_start = 0; 1218 int rc; 1219 1220 if (!xen_start_info) 1221 return; 1222 1223 xen_domain_type = XEN_PV_DOMAIN; 1224 xen_start_flags = xen_start_info->flags; 1225 1226 xen_setup_features(); 1227 1228 /* Install Xen paravirt ops */ 1229 pv_info = xen_info; 1230 pv_ops.init.patch = paravirt_patch_default; 1231 pv_ops.cpu = xen_cpu_ops; 1232 xen_init_irq_ops(); 1233 1234 /* 1235 * Setup xen_vcpu early because it is needed for 1236 * local_irq_disable(), irqs_disabled(), e.g. in printk(). 1237 * 1238 * Don't do the full vcpu_info placement stuff until we have 1239 * the cpu_possible_mask and a non-dummy shared_info. 1240 */ 1241 xen_vcpu_info_reset(0); 1242 1243 x86_platform.get_nmi_reason = xen_get_nmi_reason; 1244 1245 x86_init.resources.memory_setup = xen_memory_setup; 1246 x86_init.irqs.intr_mode_select = x86_init_noop; 1247 x86_init.irqs.intr_mode_init = x86_init_noop; 1248 x86_init.oem.arch_setup = xen_arch_setup; 1249 x86_init.oem.banner = xen_banner; 1250 x86_init.hyper.init_platform = xen_pv_init_platform; 1251 x86_init.hyper.guest_late_init = xen_pv_guest_late_init; 1252 1253 /* 1254 * Set up some pagetable state before starting to set any ptes. 1255 */ 1256 1257 xen_setup_machphys_mapping(); 1258 xen_init_mmu_ops(); 1259 1260 /* Prevent unwanted bits from being set in PTEs. */ 1261 __supported_pte_mask &= ~_PAGE_GLOBAL; 1262 __default_kernel_pte_mask &= ~_PAGE_GLOBAL; 1263 1264 /* 1265 * Prevent page tables from being allocated in highmem, even 1266 * if CONFIG_HIGHPTE is enabled. 1267 */ 1268 __userpte_alloc_gfp &= ~__GFP_HIGHMEM; 1269 1270 /* Get mfn list */ 1271 xen_build_dynamic_phys_to_machine(); 1272 1273 /* Work out if we support NX */ 1274 get_cpu_cap(&boot_cpu_data); 1275 x86_configure_nx(); 1276 1277 /* 1278 * Set up kernel GDT and segment registers, mainly so that 1279 * -fstack-protector code can be executed. 1280 */ 1281 xen_setup_gdt(0); 1282 1283 /* Determine virtual and physical address sizes */ 1284 get_cpu_address_sizes(&boot_cpu_data); 1285 1286 /* Let's presume PV guests always boot on vCPU with id 0. */ 1287 per_cpu(xen_vcpu_id, 0) = 0; 1288 1289 idt_setup_early_handler(); 1290 1291 xen_init_capabilities(); 1292 1293#ifdef CONFIG_X86_LOCAL_APIC 1294 /* 1295 * set up the basic apic ops. 1296 */ 1297 xen_init_apic(); 1298#endif 1299 1300 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { 1301 pv_ops.mmu.ptep_modify_prot_start = 1302 xen_ptep_modify_prot_start; 1303 pv_ops.mmu.ptep_modify_prot_commit = 1304 xen_ptep_modify_prot_commit; 1305 } 1306 1307 machine_ops = xen_machine_ops; 1308 1309 /* 1310 * The only reliable way to retain the initial address of the 1311 * percpu gdt_page is to remember it here, so we can go and 1312 * mark it RW later, when the initial percpu area is freed. 1313 */ 1314 xen_initial_gdt = &per_cpu(gdt_page, 0); 1315 1316 xen_smp_init(); 1317 1318#ifdef CONFIG_ACPI_NUMA 1319 /* 1320 * The pages we from Xen are not related to machine pages, so 1321 * any NUMA information the kernel tries to get from ACPI will 1322 * be meaningless. Prevent it from trying. 1323 */ 1324 disable_srat(); 1325#endif 1326 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv)); 1327 1328 local_irq_disable(); 1329 early_boot_irqs_disabled = true; 1330 1331 xen_raw_console_write("mapping kernel into physical memory\n"); 1332 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, 1333 xen_start_info->nr_pages); 1334 xen_reserve_special_pages(); 1335 1336 /* 1337 * We used to do this in xen_arch_setup, but that is too late 1338 * on AMD were early_cpu_init (run before ->arch_setup()) calls 1339 * early_amd_init which pokes 0xcf8 port. 1340 */ 1341 set_iopl.iopl = 1; 1342 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 1343 if (rc != 0) 1344 xen_raw_printk("physdev_op failed %d\n", rc); 1345 1346 1347 if (xen_start_info->mod_start) { 1348 if (xen_start_info->flags & SIF_MOD_START_PFN) 1349 initrd_start = PFN_PHYS(xen_start_info->mod_start); 1350 else 1351 initrd_start = __pa(xen_start_info->mod_start); 1352 } 1353 1354 /* Poke various useful things into boot_params */ 1355 boot_params.hdr.type_of_loader = (9 << 4) | 0; 1356 boot_params.hdr.ramdisk_image = initrd_start; 1357 boot_params.hdr.ramdisk_size = xen_start_info->mod_len; 1358 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); 1359 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; 1360 1361 if (!xen_initial_domain()) { 1362 add_preferred_console("xenboot", 0, NULL); 1363 if (pci_xen) 1364 x86_init.pci.arch_init = pci_xen_init; 1365 x86_platform.set_legacy_features = 1366 xen_domu_set_legacy_features; 1367 } else { 1368 const struct dom0_vga_console_info *info = 1369 (void *)((char *)xen_start_info + 1370 xen_start_info->console.dom0.info_off); 1371 struct xen_platform_op op = { 1372 .cmd = XENPF_firmware_info, 1373 .interface_version = XENPF_INTERFACE_VERSION, 1374 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, 1375 }; 1376 1377 x86_platform.set_legacy_features = 1378 xen_dom0_set_legacy_features; 1379 xen_init_vga(info, xen_start_info->console.dom0.info_size); 1380 xen_start_info->console.domU.mfn = 0; 1381 xen_start_info->console.domU.evtchn = 0; 1382 1383 if (HYPERVISOR_platform_op(&op) == 0) 1384 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; 1385 1386 /* Make sure ACS will be enabled */ 1387 pci_request_acs(); 1388 1389 xen_acpi_sleep_register(); 1390 1391 xen_boot_params_init_edd(); 1392 1393#ifdef CONFIG_ACPI 1394 /* 1395 * Disable selecting "Firmware First mode" for correctable 1396 * memory errors, as this is the duty of the hypervisor to 1397 * decide. 1398 */ 1399 acpi_disable_cmcff = 1; 1400#endif 1401 } 1402 1403 if (!boot_params.screen_info.orig_video_isVGA) 1404 add_preferred_console("tty", 0, NULL); 1405 add_preferred_console("hvc", 0, NULL); 1406 if (boot_params.screen_info.orig_video_isVGA) 1407 add_preferred_console("tty", 0, NULL); 1408 1409#ifdef CONFIG_PCI 1410 /* PCI BIOS service won't work from a PV guest. */ 1411 pci_probe &= ~PCI_PROBE_BIOS; 1412#endif 1413 xen_raw_console_write("about to get started...\n"); 1414 1415 /* We need this for printk timestamps */ 1416 xen_setup_runstate_info(0); 1417 1418 xen_efi_init(&boot_params); 1419 1420 /* Start the world */ 1421 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ 1422 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1423} 1424 1425static int xen_cpu_up_prepare_pv(unsigned int cpu) 1426{ 1427 int rc; 1428 1429 if (per_cpu(xen_vcpu, cpu) == NULL) 1430 return -ENODEV; 1431 1432 xen_setup_timer(cpu); 1433 1434 rc = xen_smp_intr_init(cpu); 1435 if (rc) { 1436 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n", 1437 cpu, rc); 1438 return rc; 1439 } 1440 1441 rc = xen_smp_intr_init_pv(cpu); 1442 if (rc) { 1443 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n", 1444 cpu, rc); 1445 return rc; 1446 } 1447 1448 return 0; 1449} 1450 1451static int xen_cpu_dead_pv(unsigned int cpu) 1452{ 1453 xen_smp_intr_free(cpu); 1454 xen_smp_intr_free_pv(cpu); 1455 1456 xen_teardown_timer(cpu); 1457 1458 return 0; 1459} 1460 1461static uint32_t __init xen_platform_pv(void) 1462{ 1463 if (xen_pv_domain()) 1464 return xen_cpuid_base(); 1465 1466 return 0; 1467} 1468 1469const __initconst struct hypervisor_x86 x86_hyper_xen_pv = { 1470 .name = "Xen PV", 1471 .detect = xen_platform_pv, 1472 .type = X86_HYPER_XEN_PV, 1473 .runtime.pin_vcpu = xen_pin_vcpu, 1474 .ignore_nopv = true, 1475}; 1476