1// SPDX-License-Identifier: GPL-2.0 2#include <linux/io.h> 3#include <linux/slab.h> 4#include <linux/memblock.h> 5#include <linux/mem_encrypt.h> 6#include <linux/pgtable.h> 7 8#include <asm/set_memory.h> 9#include <asm/realmode.h> 10#include <asm/tlbflush.h> 11#include <asm/crash.h> 12#include <asm/sev-es.h> 13 14struct real_mode_header *real_mode_header; 15u32 *trampoline_cr4_features; 16 17/* Hold the pgd entry used on booting additional CPUs */ 18pgd_t trampoline_pgd_entry; 19 20void load_trampoline_pgtable(void) 21{ 22#ifdef CONFIG_X86_32 23 load_cr3(initial_page_table); 24#else 25 /* 26 * This function is called before exiting to real-mode and that will 27 * fail with CR4.PCIDE still set. 28 */ 29 if (boot_cpu_has(X86_FEATURE_PCID)) 30 cr4_clear_bits(X86_CR4_PCIDE); 31 32 write_cr3(real_mode_header->trampoline_pgd); 33#endif 34 35 /* 36 * The CR3 write above will not flush global TLB entries. 37 * Stale, global entries from previous page tables may still be 38 * present. Flush those stale entries. 39 * 40 * This ensures that memory accessed while running with 41 * trampoline_pgd is *actually* mapped into trampoline_pgd. 42 */ 43 __flush_tlb_all(); 44} 45 46void __init reserve_real_mode(void) 47{ 48 phys_addr_t mem; 49 size_t size = real_mode_size_needed(); 50 51 if (!size) 52 return; 53 54 WARN_ON(slab_is_available()); 55 56 /* Has to be under 1M so we can execute real-mode AP code. */ 57 mem = memblock_find_in_range(0, 1<<20, size, PAGE_SIZE); 58 if (!mem) { 59 pr_info("No sub-1M memory is available for the trampoline\n"); 60 return; 61 } 62 63 memblock_reserve(mem, size); 64 set_real_mode_mem(mem); 65 crash_reserve_low_1M(); 66} 67 68static void sme_sev_setup_real_mode(struct trampoline_header *th) 69{ 70#ifdef CONFIG_AMD_MEM_ENCRYPT 71 if (sme_active()) 72 th->flags |= TH_FLAGS_SME_ACTIVE; 73 74 if (sev_es_active()) { 75 /* 76 * Skip the call to verify_cpu() in secondary_startup_64 as it 77 * will cause #VC exceptions when the AP can't handle them yet. 78 */ 79 th->start = (u64) secondary_startup_64_no_verify; 80 81 if (sev_es_setup_ap_jump_table(real_mode_header)) 82 panic("Failed to get/update SEV-ES AP Jump Table"); 83 } 84#endif 85} 86 87static void __init setup_real_mode(void) 88{ 89 u16 real_mode_seg; 90 const u32 *rel; 91 u32 count; 92 unsigned char *base; 93 unsigned long phys_base; 94 struct trampoline_header *trampoline_header; 95 size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob); 96#ifdef CONFIG_X86_64 97 u64 *trampoline_pgd; 98 u64 efer; 99 int i; 100#endif 101 102 base = (unsigned char *)real_mode_header; 103 104 /* 105 * If SME is active, the trampoline area will need to be in 106 * decrypted memory in order to bring up other processors 107 * successfully. This is not needed for SEV. 108 */ 109 if (sme_active()) 110 set_memory_decrypted((unsigned long)base, size >> PAGE_SHIFT); 111 112 memcpy(base, real_mode_blob, size); 113 114 phys_base = __pa(base); 115 real_mode_seg = phys_base >> 4; 116 117 rel = (u32 *) real_mode_relocs; 118 119 /* 16-bit segment relocations. */ 120 count = *rel++; 121 while (count--) { 122 u16 *seg = (u16 *) (base + *rel++); 123 *seg = real_mode_seg; 124 } 125 126 /* 32-bit linear relocations. */ 127 count = *rel++; 128 while (count--) { 129 u32 *ptr = (u32 *) (base + *rel++); 130 *ptr += phys_base; 131 } 132 133 /* Must be perfomed *after* relocation. */ 134 trampoline_header = (struct trampoline_header *) 135 __va(real_mode_header->trampoline_header); 136 137#ifdef CONFIG_X86_32 138 trampoline_header->start = __pa_symbol(startup_32_smp); 139 trampoline_header->gdt_limit = __BOOT_DS + 7; 140 trampoline_header->gdt_base = __pa_symbol(boot_gdt); 141#else 142 /* 143 * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR 144 * so we need to mask it out. 145 */ 146 rdmsrl(MSR_EFER, efer); 147 trampoline_header->efer = efer & ~EFER_LMA; 148 149 trampoline_header->start = (u64) secondary_startup_64; 150 trampoline_cr4_features = &trampoline_header->cr4; 151 *trampoline_cr4_features = mmu_cr4_features; 152 153 trampoline_header->flags = 0; 154 155 trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd); 156 157 /* Map the real mode stub as virtual == physical */ 158 trampoline_pgd[0] = trampoline_pgd_entry.pgd; 159 160 /* 161 * Include the entirety of the kernel mapping into the trampoline 162 * PGD. This way, all mappings present in the normal kernel page 163 * tables are usable while running on trampoline_pgd. 164 */ 165 for (i = pgd_index(__PAGE_OFFSET); i < PTRS_PER_PGD; i++) 166 trampoline_pgd[i] = init_top_pgt[i].pgd; 167#endif 168 169 sme_sev_setup_real_mode(trampoline_header); 170} 171 172/* 173 * reserve_real_mode() gets called very early, to guarantee the 174 * availability of low memory. This is before the proper kernel page 175 * tables are set up, so we cannot set page permissions in that 176 * function. Also trampoline code will be executed by APs so we 177 * need to mark it executable at do_pre_smp_initcalls() at least, 178 * thus run it as a early_initcall(). 179 */ 180static void __init set_real_mode_permissions(void) 181{ 182 unsigned char *base = (unsigned char *) real_mode_header; 183 size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob); 184 185 size_t ro_size = 186 PAGE_ALIGN(real_mode_header->ro_end) - 187 __pa(base); 188 189 size_t text_size = 190 PAGE_ALIGN(real_mode_header->ro_end) - 191 real_mode_header->text_start; 192 193 unsigned long text_start = 194 (unsigned long) __va(real_mode_header->text_start); 195 196 set_memory_nx((unsigned long) base, size >> PAGE_SHIFT); 197 set_memory_ro((unsigned long) base, ro_size >> PAGE_SHIFT); 198 set_memory_x((unsigned long) text_start, text_size >> PAGE_SHIFT); 199} 200 201static int __init init_real_mode(void) 202{ 203 if (!real_mode_header) 204 panic("Real mode trampoline was not allocated"); 205 206 setup_real_mode(); 207 set_real_mode_permissions(); 208 209 return 0; 210} 211early_initcall(init_real_mode); 212