18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ci#include <linux/io.h> 38c2ecf20Sopenharmony_ci#include <linux/slab.h> 48c2ecf20Sopenharmony_ci#include <linux/memblock.h> 58c2ecf20Sopenharmony_ci#include <linux/mem_encrypt.h> 68c2ecf20Sopenharmony_ci#include <linux/pgtable.h> 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#include <asm/set_memory.h> 98c2ecf20Sopenharmony_ci#include <asm/realmode.h> 108c2ecf20Sopenharmony_ci#include <asm/tlbflush.h> 118c2ecf20Sopenharmony_ci#include <asm/crash.h> 128c2ecf20Sopenharmony_ci#include <asm/sev-es.h> 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_cistruct real_mode_header *real_mode_header; 158c2ecf20Sopenharmony_ciu32 *trampoline_cr4_features; 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci/* Hold the pgd entry used on booting additional CPUs */ 188c2ecf20Sopenharmony_cipgd_t trampoline_pgd_entry; 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_civoid load_trampoline_pgtable(void) 218c2ecf20Sopenharmony_ci{ 228c2ecf20Sopenharmony_ci#ifdef CONFIG_X86_32 238c2ecf20Sopenharmony_ci load_cr3(initial_page_table); 248c2ecf20Sopenharmony_ci#else 258c2ecf20Sopenharmony_ci /* 268c2ecf20Sopenharmony_ci * This function is called before exiting to real-mode and that will 278c2ecf20Sopenharmony_ci * fail with CR4.PCIDE still set. 288c2ecf20Sopenharmony_ci */ 298c2ecf20Sopenharmony_ci if (boot_cpu_has(X86_FEATURE_PCID)) 308c2ecf20Sopenharmony_ci cr4_clear_bits(X86_CR4_PCIDE); 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ci write_cr3(real_mode_header->trampoline_pgd); 338c2ecf20Sopenharmony_ci#endif 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci /* 368c2ecf20Sopenharmony_ci * The CR3 write above will not flush global TLB entries. 378c2ecf20Sopenharmony_ci * Stale, global entries from previous page tables may still be 388c2ecf20Sopenharmony_ci * present. Flush those stale entries. 398c2ecf20Sopenharmony_ci * 408c2ecf20Sopenharmony_ci * This ensures that memory accessed while running with 418c2ecf20Sopenharmony_ci * trampoline_pgd is *actually* mapped into trampoline_pgd. 428c2ecf20Sopenharmony_ci */ 438c2ecf20Sopenharmony_ci __flush_tlb_all(); 448c2ecf20Sopenharmony_ci} 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_civoid __init reserve_real_mode(void) 478c2ecf20Sopenharmony_ci{ 488c2ecf20Sopenharmony_ci phys_addr_t mem; 498c2ecf20Sopenharmony_ci size_t size = real_mode_size_needed(); 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ci if (!size) 528c2ecf20Sopenharmony_ci return; 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci WARN_ON(slab_is_available()); 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_ci /* Has to be under 1M so we can execute real-mode AP code. */ 578c2ecf20Sopenharmony_ci mem = memblock_find_in_range(0, 1<<20, size, PAGE_SIZE); 588c2ecf20Sopenharmony_ci if (!mem) { 598c2ecf20Sopenharmony_ci pr_info("No sub-1M memory is available for the trampoline\n"); 608c2ecf20Sopenharmony_ci return; 618c2ecf20Sopenharmony_ci } 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci memblock_reserve(mem, size); 648c2ecf20Sopenharmony_ci set_real_mode_mem(mem); 658c2ecf20Sopenharmony_ci crash_reserve_low_1M(); 668c2ecf20Sopenharmony_ci} 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_cistatic void sme_sev_setup_real_mode(struct trampoline_header *th) 698c2ecf20Sopenharmony_ci{ 708c2ecf20Sopenharmony_ci#ifdef CONFIG_AMD_MEM_ENCRYPT 718c2ecf20Sopenharmony_ci if (sme_active()) 728c2ecf20Sopenharmony_ci th->flags |= TH_FLAGS_SME_ACTIVE; 738c2ecf20Sopenharmony_ci 748c2ecf20Sopenharmony_ci if (sev_es_active()) { 758c2ecf20Sopenharmony_ci /* 768c2ecf20Sopenharmony_ci * Skip the call to verify_cpu() in secondary_startup_64 as it 778c2ecf20Sopenharmony_ci * will cause #VC exceptions when the AP can't handle them yet. 788c2ecf20Sopenharmony_ci */ 798c2ecf20Sopenharmony_ci th->start = (u64) secondary_startup_64_no_verify; 808c2ecf20Sopenharmony_ci 818c2ecf20Sopenharmony_ci if (sev_es_setup_ap_jump_table(real_mode_header)) 828c2ecf20Sopenharmony_ci panic("Failed to get/update SEV-ES AP Jump Table"); 838c2ecf20Sopenharmony_ci } 848c2ecf20Sopenharmony_ci#endif 858c2ecf20Sopenharmony_ci} 868c2ecf20Sopenharmony_ci 878c2ecf20Sopenharmony_cistatic void __init setup_real_mode(void) 888c2ecf20Sopenharmony_ci{ 898c2ecf20Sopenharmony_ci u16 real_mode_seg; 908c2ecf20Sopenharmony_ci const u32 *rel; 918c2ecf20Sopenharmony_ci u32 count; 928c2ecf20Sopenharmony_ci unsigned char *base; 938c2ecf20Sopenharmony_ci unsigned long phys_base; 948c2ecf20Sopenharmony_ci struct trampoline_header *trampoline_header; 958c2ecf20Sopenharmony_ci size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob); 968c2ecf20Sopenharmony_ci#ifdef CONFIG_X86_64 978c2ecf20Sopenharmony_ci u64 *trampoline_pgd; 988c2ecf20Sopenharmony_ci u64 efer; 998c2ecf20Sopenharmony_ci int i; 1008c2ecf20Sopenharmony_ci#endif 1018c2ecf20Sopenharmony_ci 1028c2ecf20Sopenharmony_ci base = (unsigned char *)real_mode_header; 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ci /* 1058c2ecf20Sopenharmony_ci * If SME is active, the trampoline area will need to be in 1068c2ecf20Sopenharmony_ci * decrypted memory in order to bring up other processors 1078c2ecf20Sopenharmony_ci * successfully. This is not needed for SEV. 1088c2ecf20Sopenharmony_ci */ 1098c2ecf20Sopenharmony_ci if (sme_active()) 1108c2ecf20Sopenharmony_ci set_memory_decrypted((unsigned long)base, size >> PAGE_SHIFT); 1118c2ecf20Sopenharmony_ci 1128c2ecf20Sopenharmony_ci memcpy(base, real_mode_blob, size); 1138c2ecf20Sopenharmony_ci 1148c2ecf20Sopenharmony_ci phys_base = __pa(base); 1158c2ecf20Sopenharmony_ci real_mode_seg = phys_base >> 4; 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_ci rel = (u32 *) real_mode_relocs; 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_ci /* 16-bit segment relocations. */ 1208c2ecf20Sopenharmony_ci count = *rel++; 1218c2ecf20Sopenharmony_ci while (count--) { 1228c2ecf20Sopenharmony_ci u16 *seg = (u16 *) (base + *rel++); 1238c2ecf20Sopenharmony_ci *seg = real_mode_seg; 1248c2ecf20Sopenharmony_ci } 1258c2ecf20Sopenharmony_ci 1268c2ecf20Sopenharmony_ci /* 32-bit linear relocations. */ 1278c2ecf20Sopenharmony_ci count = *rel++; 1288c2ecf20Sopenharmony_ci while (count--) { 1298c2ecf20Sopenharmony_ci u32 *ptr = (u32 *) (base + *rel++); 1308c2ecf20Sopenharmony_ci *ptr += phys_base; 1318c2ecf20Sopenharmony_ci } 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ci /* Must be perfomed *after* relocation. */ 1348c2ecf20Sopenharmony_ci trampoline_header = (struct trampoline_header *) 1358c2ecf20Sopenharmony_ci __va(real_mode_header->trampoline_header); 1368c2ecf20Sopenharmony_ci 1378c2ecf20Sopenharmony_ci#ifdef CONFIG_X86_32 1388c2ecf20Sopenharmony_ci trampoline_header->start = __pa_symbol(startup_32_smp); 1398c2ecf20Sopenharmony_ci trampoline_header->gdt_limit = __BOOT_DS + 7; 1408c2ecf20Sopenharmony_ci trampoline_header->gdt_base = __pa_symbol(boot_gdt); 1418c2ecf20Sopenharmony_ci#else 1428c2ecf20Sopenharmony_ci /* 1438c2ecf20Sopenharmony_ci * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR 1448c2ecf20Sopenharmony_ci * so we need to mask it out. 1458c2ecf20Sopenharmony_ci */ 1468c2ecf20Sopenharmony_ci rdmsrl(MSR_EFER, efer); 1478c2ecf20Sopenharmony_ci trampoline_header->efer = efer & ~EFER_LMA; 1488c2ecf20Sopenharmony_ci 1498c2ecf20Sopenharmony_ci trampoline_header->start = (u64) secondary_startup_64; 1508c2ecf20Sopenharmony_ci trampoline_cr4_features = &trampoline_header->cr4; 1518c2ecf20Sopenharmony_ci *trampoline_cr4_features = mmu_cr4_features; 1528c2ecf20Sopenharmony_ci 1538c2ecf20Sopenharmony_ci trampoline_header->flags = 0; 1548c2ecf20Sopenharmony_ci 1558c2ecf20Sopenharmony_ci trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd); 1568c2ecf20Sopenharmony_ci 1578c2ecf20Sopenharmony_ci /* Map the real mode stub as virtual == physical */ 1588c2ecf20Sopenharmony_ci trampoline_pgd[0] = trampoline_pgd_entry.pgd; 1598c2ecf20Sopenharmony_ci 1608c2ecf20Sopenharmony_ci /* 1618c2ecf20Sopenharmony_ci * Include the entirety of the kernel mapping into the trampoline 1628c2ecf20Sopenharmony_ci * PGD. This way, all mappings present in the normal kernel page 1638c2ecf20Sopenharmony_ci * tables are usable while running on trampoline_pgd. 1648c2ecf20Sopenharmony_ci */ 1658c2ecf20Sopenharmony_ci for (i = pgd_index(__PAGE_OFFSET); i < PTRS_PER_PGD; i++) 1668c2ecf20Sopenharmony_ci trampoline_pgd[i] = init_top_pgt[i].pgd; 1678c2ecf20Sopenharmony_ci#endif 1688c2ecf20Sopenharmony_ci 1698c2ecf20Sopenharmony_ci sme_sev_setup_real_mode(trampoline_header); 1708c2ecf20Sopenharmony_ci} 1718c2ecf20Sopenharmony_ci 1728c2ecf20Sopenharmony_ci/* 1738c2ecf20Sopenharmony_ci * reserve_real_mode() gets called very early, to guarantee the 1748c2ecf20Sopenharmony_ci * availability of low memory. This is before the proper kernel page 1758c2ecf20Sopenharmony_ci * tables are set up, so we cannot set page permissions in that 1768c2ecf20Sopenharmony_ci * function. Also trampoline code will be executed by APs so we 1778c2ecf20Sopenharmony_ci * need to mark it executable at do_pre_smp_initcalls() at least, 1788c2ecf20Sopenharmony_ci * thus run it as a early_initcall(). 1798c2ecf20Sopenharmony_ci */ 1808c2ecf20Sopenharmony_cistatic void __init set_real_mode_permissions(void) 1818c2ecf20Sopenharmony_ci{ 1828c2ecf20Sopenharmony_ci unsigned char *base = (unsigned char *) real_mode_header; 1838c2ecf20Sopenharmony_ci size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob); 1848c2ecf20Sopenharmony_ci 1858c2ecf20Sopenharmony_ci size_t ro_size = 1868c2ecf20Sopenharmony_ci PAGE_ALIGN(real_mode_header->ro_end) - 1878c2ecf20Sopenharmony_ci __pa(base); 1888c2ecf20Sopenharmony_ci 1898c2ecf20Sopenharmony_ci size_t text_size = 1908c2ecf20Sopenharmony_ci PAGE_ALIGN(real_mode_header->ro_end) - 1918c2ecf20Sopenharmony_ci real_mode_header->text_start; 1928c2ecf20Sopenharmony_ci 1938c2ecf20Sopenharmony_ci unsigned long text_start = 1948c2ecf20Sopenharmony_ci (unsigned long) __va(real_mode_header->text_start); 1958c2ecf20Sopenharmony_ci 1968c2ecf20Sopenharmony_ci set_memory_nx((unsigned long) base, size >> PAGE_SHIFT); 1978c2ecf20Sopenharmony_ci set_memory_ro((unsigned long) base, ro_size >> PAGE_SHIFT); 1988c2ecf20Sopenharmony_ci set_memory_x((unsigned long) text_start, text_size >> PAGE_SHIFT); 1998c2ecf20Sopenharmony_ci} 2008c2ecf20Sopenharmony_ci 2018c2ecf20Sopenharmony_cistatic int __init init_real_mode(void) 2028c2ecf20Sopenharmony_ci{ 2038c2ecf20Sopenharmony_ci if (!real_mode_header) 2048c2ecf20Sopenharmony_ci panic("Real mode trampoline was not allocated"); 2058c2ecf20Sopenharmony_ci 2068c2ecf20Sopenharmony_ci setup_real_mode(); 2078c2ecf20Sopenharmony_ci set_real_mode_permissions(); 2088c2ecf20Sopenharmony_ci 2098c2ecf20Sopenharmony_ci return 0; 2108c2ecf20Sopenharmony_ci} 2118c2ecf20Sopenharmony_ciearly_initcall(init_real_mode); 212