1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * intel_mid_sfi.c: Intel MID SFI initialization code 4 * 5 * (C) Copyright 2013 Intel Corporation 6 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com> 7 */ 8 9#include <linux/init.h> 10#include <linux/kernel.h> 11#include <linux/interrupt.h> 12#include <linux/scatterlist.h> 13#include <linux/sfi.h> 14#include <linux/spi/spi.h> 15#include <linux/i2c.h> 16#include <linux/skbuff.h> 17#include <linux/gpio.h> 18#include <linux/gpio_keys.h> 19#include <linux/input.h> 20#include <linux/platform_device.h> 21#include <linux/irq.h> 22#include <linux/export.h> 23#include <linux/notifier.h> 24#include <linux/mmc/core.h> 25#include <linux/mmc/card.h> 26#include <linux/blkdev.h> 27 28#include <asm/setup.h> 29#include <asm/mpspec_def.h> 30#include <asm/hw_irq.h> 31#include <asm/apic.h> 32#include <asm/io_apic.h> 33#include <asm/intel-mid.h> 34#include <asm/intel_mid_vrtc.h> 35#include <asm/io.h> 36#include <asm/i8259.h> 37#include <asm/intel_scu_ipc.h> 38#include <asm/apb_timer.h> 39#include <asm/reboot.h> 40 41#define SFI_SIG_OEM0 "OEM0" 42#define MAX_IPCDEVS 24 43#define MAX_SCU_SPI 24 44#define MAX_SCU_I2C 24 45 46static struct platform_device *ipc_devs[MAX_IPCDEVS]; 47static struct spi_board_info *spi_devs[MAX_SCU_SPI]; 48static struct i2c_board_info *i2c_devs[MAX_SCU_I2C]; 49static struct sfi_gpio_table_entry *gpio_table; 50static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM]; 51static int ipc_next_dev; 52static int spi_next_dev; 53static int i2c_next_dev; 54static int i2c_bus[MAX_SCU_I2C]; 55static int gpio_num_entry; 56static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM]; 57int sfi_mrtc_num; 58int sfi_mtimer_num; 59 60struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX]; 61EXPORT_SYMBOL_GPL(sfi_mrtc_array); 62 63struct blocking_notifier_head intel_scu_notifier = 64 BLOCKING_NOTIFIER_INIT(intel_scu_notifier); 65EXPORT_SYMBOL_GPL(intel_scu_notifier); 66 67#define intel_mid_sfi_get_pdata(dev, priv) \ 68 ((dev)->get_platform_data ? (dev)->get_platform_data(priv) : NULL) 69 70/* parse all the mtimer info to a static mtimer array */ 71int __init sfi_parse_mtmr(struct sfi_table_header *table) 72{ 73 struct sfi_table_simple *sb; 74 struct sfi_timer_table_entry *pentry; 75 struct mpc_intsrc mp_irq; 76 int totallen; 77 78 sb = (struct sfi_table_simple *)table; 79 if (!sfi_mtimer_num) { 80 sfi_mtimer_num = SFI_GET_NUM_ENTRIES(sb, 81 struct sfi_timer_table_entry); 82 pentry = (struct sfi_timer_table_entry *) sb->pentry; 83 totallen = sfi_mtimer_num * sizeof(*pentry); 84 memcpy(sfi_mtimer_array, pentry, totallen); 85 } 86 87 pr_debug("SFI MTIMER info (num = %d):\n", sfi_mtimer_num); 88 pentry = sfi_mtimer_array; 89 for (totallen = 0; totallen < sfi_mtimer_num; totallen++, pentry++) { 90 pr_debug("timer[%d]: paddr = 0x%08x, freq = %dHz, irq = %d\n", 91 totallen, (u32)pentry->phys_addr, 92 pentry->freq_hz, pentry->irq); 93 mp_irq.type = MP_INTSRC; 94 mp_irq.irqtype = mp_INT; 95 mp_irq.irqflag = MP_IRQTRIG_EDGE | MP_IRQPOL_ACTIVE_HIGH; 96 mp_irq.srcbus = MP_BUS_ISA; 97 mp_irq.srcbusirq = pentry->irq; /* IRQ */ 98 mp_irq.dstapic = MP_APIC_ALL; 99 mp_irq.dstirq = pentry->irq; 100 mp_save_irq(&mp_irq); 101 mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC, NULL); 102 } 103 104 return 0; 105} 106 107struct sfi_timer_table_entry *sfi_get_mtmr(int hint) 108{ 109 int i; 110 if (hint < sfi_mtimer_num) { 111 if (!sfi_mtimer_usage[hint]) { 112 pr_debug("hint taken for timer %d irq %d\n", 113 hint, sfi_mtimer_array[hint].irq); 114 sfi_mtimer_usage[hint] = 1; 115 return &sfi_mtimer_array[hint]; 116 } 117 } 118 /* take the first timer available */ 119 for (i = 0; i < sfi_mtimer_num;) { 120 if (!sfi_mtimer_usage[i]) { 121 sfi_mtimer_usage[i] = 1; 122 return &sfi_mtimer_array[i]; 123 } 124 i++; 125 } 126 return NULL; 127} 128 129void sfi_free_mtmr(struct sfi_timer_table_entry *mtmr) 130{ 131 int i; 132 for (i = 0; i < sfi_mtimer_num;) { 133 if (mtmr->irq == sfi_mtimer_array[i].irq) { 134 sfi_mtimer_usage[i] = 0; 135 return; 136 } 137 i++; 138 } 139} 140 141/* parse all the mrtc info to a global mrtc array */ 142int __init sfi_parse_mrtc(struct sfi_table_header *table) 143{ 144 struct sfi_table_simple *sb; 145 struct sfi_rtc_table_entry *pentry; 146 struct mpc_intsrc mp_irq; 147 148 int totallen; 149 150 sb = (struct sfi_table_simple *)table; 151 if (!sfi_mrtc_num) { 152 sfi_mrtc_num = SFI_GET_NUM_ENTRIES(sb, 153 struct sfi_rtc_table_entry); 154 pentry = (struct sfi_rtc_table_entry *)sb->pentry; 155 totallen = sfi_mrtc_num * sizeof(*pentry); 156 memcpy(sfi_mrtc_array, pentry, totallen); 157 } 158 159 pr_debug("SFI RTC info (num = %d):\n", sfi_mrtc_num); 160 pentry = sfi_mrtc_array; 161 for (totallen = 0; totallen < sfi_mrtc_num; totallen++, pentry++) { 162 pr_debug("RTC[%d]: paddr = 0x%08x, irq = %d\n", 163 totallen, (u32)pentry->phys_addr, pentry->irq); 164 mp_irq.type = MP_INTSRC; 165 mp_irq.irqtype = mp_INT; 166 mp_irq.irqflag = MP_IRQTRIG_LEVEL | MP_IRQPOL_ACTIVE_LOW; 167 mp_irq.srcbus = MP_BUS_ISA; 168 mp_irq.srcbusirq = pentry->irq; /* IRQ */ 169 mp_irq.dstapic = MP_APIC_ALL; 170 mp_irq.dstirq = pentry->irq; 171 mp_save_irq(&mp_irq); 172 mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC, NULL); 173 } 174 return 0; 175} 176 177 178/* 179 * Parsing GPIO table first, since the DEVS table will need this table 180 * to map the pin name to the actual pin. 181 */ 182static int __init sfi_parse_gpio(struct sfi_table_header *table) 183{ 184 struct sfi_table_simple *sb; 185 struct sfi_gpio_table_entry *pentry; 186 int num, i; 187 188 if (gpio_table) 189 return 0; 190 sb = (struct sfi_table_simple *)table; 191 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_gpio_table_entry); 192 pentry = (struct sfi_gpio_table_entry *)sb->pentry; 193 194 gpio_table = kmemdup(pentry, num * sizeof(*pentry), GFP_KERNEL); 195 if (!gpio_table) 196 return -1; 197 gpio_num_entry = num; 198 199 pr_debug("GPIO pin info:\n"); 200 for (i = 0; i < num; i++, pentry++) 201 pr_debug("info[%2d]: controller = %16.16s, pin_name = %16.16s," 202 " pin = %d\n", i, 203 pentry->controller_name, 204 pentry->pin_name, 205 pentry->pin_no); 206 return 0; 207} 208 209int get_gpio_by_name(const char *name) 210{ 211 struct sfi_gpio_table_entry *pentry = gpio_table; 212 int i; 213 214 if (!pentry) 215 return -1; 216 for (i = 0; i < gpio_num_entry; i++, pentry++) { 217 if (!strncmp(name, pentry->pin_name, SFI_NAME_LEN)) 218 return pentry->pin_no; 219 } 220 return -EINVAL; 221} 222 223static void __init intel_scu_ipc_device_register(struct platform_device *pdev) 224{ 225 if (ipc_next_dev == MAX_IPCDEVS) 226 pr_err("too many SCU IPC devices"); 227 else 228 ipc_devs[ipc_next_dev++] = pdev; 229} 230 231static void __init intel_scu_spi_device_register(struct spi_board_info *sdev) 232{ 233 struct spi_board_info *new_dev; 234 235 if (spi_next_dev == MAX_SCU_SPI) { 236 pr_err("too many SCU SPI devices"); 237 return; 238 } 239 240 new_dev = kzalloc(sizeof(*sdev), GFP_KERNEL); 241 if (!new_dev) { 242 pr_err("failed to alloc mem for delayed spi dev %s\n", 243 sdev->modalias); 244 return; 245 } 246 *new_dev = *sdev; 247 248 spi_devs[spi_next_dev++] = new_dev; 249} 250 251static void __init intel_scu_i2c_device_register(int bus, 252 struct i2c_board_info *idev) 253{ 254 struct i2c_board_info *new_dev; 255 256 if (i2c_next_dev == MAX_SCU_I2C) { 257 pr_err("too many SCU I2C devices"); 258 return; 259 } 260 261 new_dev = kzalloc(sizeof(*idev), GFP_KERNEL); 262 if (!new_dev) { 263 pr_err("failed to alloc mem for delayed i2c dev %s\n", 264 idev->type); 265 return; 266 } 267 *new_dev = *idev; 268 269 i2c_bus[i2c_next_dev] = bus; 270 i2c_devs[i2c_next_dev++] = new_dev; 271} 272 273/* Called by IPC driver */ 274void intel_scu_devices_create(void) 275{ 276 int i; 277 278 for (i = 0; i < ipc_next_dev; i++) 279 platform_device_add(ipc_devs[i]); 280 281 for (i = 0; i < spi_next_dev; i++) 282 spi_register_board_info(spi_devs[i], 1); 283 284 for (i = 0; i < i2c_next_dev; i++) { 285 struct i2c_adapter *adapter; 286 struct i2c_client *client; 287 288 adapter = i2c_get_adapter(i2c_bus[i]); 289 if (adapter) { 290 client = i2c_new_client_device(adapter, i2c_devs[i]); 291 if (IS_ERR(client)) 292 pr_err("can't create i2c device %s\n", 293 i2c_devs[i]->type); 294 } else 295 i2c_register_board_info(i2c_bus[i], i2c_devs[i], 1); 296 } 297 intel_scu_notifier_post(SCU_AVAILABLE, NULL); 298} 299EXPORT_SYMBOL_GPL(intel_scu_devices_create); 300 301/* Called by IPC driver */ 302void intel_scu_devices_destroy(void) 303{ 304 int i; 305 306 intel_scu_notifier_post(SCU_DOWN, NULL); 307 308 for (i = 0; i < ipc_next_dev; i++) 309 platform_device_del(ipc_devs[i]); 310} 311EXPORT_SYMBOL_GPL(intel_scu_devices_destroy); 312 313static void __init install_irq_resource(struct platform_device *pdev, int irq) 314{ 315 /* Single threaded */ 316 static struct resource res __initdata = { 317 .name = "IRQ", 318 .flags = IORESOURCE_IRQ, 319 }; 320 res.start = irq; 321 platform_device_add_resources(pdev, &res, 1); 322} 323 324static void __init sfi_handle_ipc_dev(struct sfi_device_table_entry *pentry, 325 struct devs_id *dev) 326{ 327 struct platform_device *pdev; 328 void *pdata = NULL; 329 330 pr_debug("IPC bus, name = %16.16s, irq = 0x%2x\n", 331 pentry->name, pentry->irq); 332 333 /* 334 * We need to call platform init of IPC devices to fill misc_pdata 335 * structure. It will be used in msic_init for initialization. 336 */ 337 pdata = intel_mid_sfi_get_pdata(dev, pentry); 338 if (IS_ERR(pdata)) 339 return; 340 341 /* 342 * On Medfield the platform device creation is handled by the MSIC 343 * MFD driver so we don't need to do it here. 344 */ 345 if (dev->msic && intel_mid_has_msic()) 346 return; 347 348 pdev = platform_device_alloc(pentry->name, 0); 349 if (pdev == NULL) { 350 pr_err("out of memory for SFI platform device '%s'.\n", 351 pentry->name); 352 return; 353 } 354 install_irq_resource(pdev, pentry->irq); 355 356 pdev->dev.platform_data = pdata; 357 if (dev->delay) 358 intel_scu_ipc_device_register(pdev); 359 else 360 platform_device_add(pdev); 361} 362 363static void __init sfi_handle_spi_dev(struct sfi_device_table_entry *pentry, 364 struct devs_id *dev) 365{ 366 struct spi_board_info spi_info; 367 void *pdata = NULL; 368 369 memset(&spi_info, 0, sizeof(spi_info)); 370 strncpy(spi_info.modalias, pentry->name, SFI_NAME_LEN); 371 spi_info.irq = ((pentry->irq == (u8)0xff) ? 0 : pentry->irq); 372 spi_info.bus_num = pentry->host_num; 373 spi_info.chip_select = pentry->addr; 374 spi_info.max_speed_hz = pentry->max_freq; 375 pr_debug("SPI bus=%d, name=%16.16s, irq=0x%2x, max_freq=%d, cs=%d\n", 376 spi_info.bus_num, 377 spi_info.modalias, 378 spi_info.irq, 379 spi_info.max_speed_hz, 380 spi_info.chip_select); 381 382 pdata = intel_mid_sfi_get_pdata(dev, &spi_info); 383 if (IS_ERR(pdata)) 384 return; 385 386 spi_info.platform_data = pdata; 387 if (dev->delay) 388 intel_scu_spi_device_register(&spi_info); 389 else 390 spi_register_board_info(&spi_info, 1); 391} 392 393static void __init sfi_handle_i2c_dev(struct sfi_device_table_entry *pentry, 394 struct devs_id *dev) 395{ 396 struct i2c_board_info i2c_info; 397 void *pdata = NULL; 398 399 memset(&i2c_info, 0, sizeof(i2c_info)); 400 strncpy(i2c_info.type, pentry->name, SFI_NAME_LEN); 401 i2c_info.irq = ((pentry->irq == (u8)0xff) ? 0 : pentry->irq); 402 i2c_info.addr = pentry->addr; 403 pr_debug("I2C bus = %d, name = %16.16s, irq = 0x%2x, addr = 0x%x\n", 404 pentry->host_num, 405 i2c_info.type, 406 i2c_info.irq, 407 i2c_info.addr); 408 pdata = intel_mid_sfi_get_pdata(dev, &i2c_info); 409 i2c_info.platform_data = pdata; 410 if (IS_ERR(pdata)) 411 return; 412 413 if (dev->delay) 414 intel_scu_i2c_device_register(pentry->host_num, &i2c_info); 415 else 416 i2c_register_board_info(pentry->host_num, &i2c_info, 1); 417} 418 419static void __init sfi_handle_sd_dev(struct sfi_device_table_entry *pentry, 420 struct devs_id *dev) 421{ 422 struct mid_sd_board_info sd_info; 423 void *pdata; 424 425 memset(&sd_info, 0, sizeof(sd_info)); 426 strncpy(sd_info.name, pentry->name, SFI_NAME_LEN); 427 sd_info.bus_num = pentry->host_num; 428 sd_info.max_clk = pentry->max_freq; 429 sd_info.addr = pentry->addr; 430 pr_debug("SD bus = %d, name = %16.16s, max_clk = %d, addr = 0x%x\n", 431 sd_info.bus_num, 432 sd_info.name, 433 sd_info.max_clk, 434 sd_info.addr); 435 pdata = intel_mid_sfi_get_pdata(dev, &sd_info); 436 if (IS_ERR(pdata)) 437 return; 438 439 /* Nothing we can do with this for now */ 440 sd_info.platform_data = pdata; 441 442 pr_debug("Successfully registered %16.16s", sd_info.name); 443} 444 445extern struct devs_id *const __x86_intel_mid_dev_start[], 446 *const __x86_intel_mid_dev_end[]; 447 448static struct devs_id __init *get_device_id(u8 type, char *name) 449{ 450 struct devs_id *const *dev_table; 451 452 for (dev_table = __x86_intel_mid_dev_start; 453 dev_table < __x86_intel_mid_dev_end; dev_table++) { 454 struct devs_id *dev = *dev_table; 455 if (dev->type == type && 456 !strncmp(dev->name, name, SFI_NAME_LEN)) { 457 return dev; 458 } 459 } 460 461 return NULL; 462} 463 464static int __init sfi_parse_devs(struct sfi_table_header *table) 465{ 466 struct sfi_table_simple *sb; 467 struct sfi_device_table_entry *pentry; 468 struct devs_id *dev = NULL; 469 int num, i, ret; 470 int polarity; 471 struct irq_alloc_info info; 472 473 sb = (struct sfi_table_simple *)table; 474 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_device_table_entry); 475 pentry = (struct sfi_device_table_entry *)sb->pentry; 476 477 for (i = 0; i < num; i++, pentry++) { 478 int irq = pentry->irq; 479 480 if (irq != (u8)0xff) { /* native RTE case */ 481 /* these SPI2 devices are not exposed to system as PCI 482 * devices, but they have separate RTE entry in IOAPIC 483 * so we have to enable them one by one here 484 */ 485 if (intel_mid_identify_cpu() == 486 INTEL_MID_CPU_CHIP_TANGIER) { 487 if (!strncmp(pentry->name, "r69001-ts-i2c", 13)) 488 /* active low */ 489 polarity = 1; 490 else if (!strncmp(pentry->name, 491 "synaptics_3202", 14)) 492 /* active low */ 493 polarity = 1; 494 else if (irq == 41) 495 /* fast_int_1 */ 496 polarity = 1; 497 else 498 /* active high */ 499 polarity = 0; 500 } else { 501 /* PNW and CLV go with active low */ 502 polarity = 1; 503 } 504 505 ioapic_set_alloc_attr(&info, NUMA_NO_NODE, 1, polarity); 506 ret = mp_map_gsi_to_irq(irq, IOAPIC_MAP_ALLOC, &info); 507 WARN_ON(ret < 0); 508 } 509 510 dev = get_device_id(pentry->type, pentry->name); 511 512 if (!dev) 513 continue; 514 515 switch (pentry->type) { 516 case SFI_DEV_TYPE_IPC: 517 sfi_handle_ipc_dev(pentry, dev); 518 break; 519 case SFI_DEV_TYPE_SPI: 520 sfi_handle_spi_dev(pentry, dev); 521 break; 522 case SFI_DEV_TYPE_I2C: 523 sfi_handle_i2c_dev(pentry, dev); 524 break; 525 case SFI_DEV_TYPE_SD: 526 sfi_handle_sd_dev(pentry, dev); 527 break; 528 case SFI_DEV_TYPE_UART: 529 case SFI_DEV_TYPE_HSI: 530 default: 531 break; 532 } 533 } 534 return 0; 535} 536 537static int __init intel_mid_platform_init(void) 538{ 539 sfi_table_parse(SFI_SIG_GPIO, NULL, NULL, sfi_parse_gpio); 540 sfi_table_parse(SFI_SIG_DEVS, NULL, NULL, sfi_parse_devs); 541 return 0; 542} 543arch_initcall(intel_mid_platform_init); 544