xref: /kernel/linux/linux-5.10/arch/x86/kvm/x86.h (revision 8c2ecf20) 
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef ARCH_X86_KVM_X86_H
3#define ARCH_X86_KVM_X86_H
4
5#include <linux/kvm_host.h>
6#include <asm/pvclock.h>
7#include "kvm_cache_regs.h"
8#include "kvm_emulate.h"
9
10#define KVM_DEFAULT_PLE_GAP		128
11#define KVM_VMX_DEFAULT_PLE_WINDOW	4096
12#define KVM_DEFAULT_PLE_WINDOW_GROW	2
13#define KVM_DEFAULT_PLE_WINDOW_SHRINK	0
14#define KVM_VMX_DEFAULT_PLE_WINDOW_MAX	UINT_MAX
15#define KVM_SVM_DEFAULT_PLE_WINDOW_MAX	USHRT_MAX
16#define KVM_SVM_DEFAULT_PLE_WINDOW	3000
17
18static inline unsigned int __grow_ple_window(unsigned int val,
19		unsigned int base, unsigned int modifier, unsigned int max)
20{
21	u64 ret = val;
22
23	if (modifier < 1)
24		return base;
25
26	if (modifier < base)
27		ret *= modifier;
28	else
29		ret += modifier;
30
31	return min(ret, (u64)max);
32}
33
34static inline unsigned int __shrink_ple_window(unsigned int val,
35		unsigned int base, unsigned int modifier, unsigned int min)
36{
37	if (modifier < 1)
38		return base;
39
40	if (modifier < base)
41		val /= modifier;
42	else
43		val -= modifier;
44
45	return max(val, min);
46}
47
48#define MSR_IA32_CR_PAT_DEFAULT  0x0007040600070406ULL
49
50static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu)
51{
52	vcpu->arch.exception.pending = false;
53	vcpu->arch.exception.injected = false;
54}
55
56static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector,
57	bool soft)
58{
59	vcpu->arch.interrupt.injected = true;
60	vcpu->arch.interrupt.soft = soft;
61	vcpu->arch.interrupt.nr = vector;
62}
63
64static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu)
65{
66	vcpu->arch.interrupt.injected = false;
67}
68
69static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu)
70{
71	return vcpu->arch.exception.injected || vcpu->arch.interrupt.injected ||
72		vcpu->arch.nmi_injected;
73}
74
75static inline bool kvm_exception_is_soft(unsigned int nr)
76{
77	return (nr == BP_VECTOR) || (nr == OF_VECTOR);
78}
79
80static inline bool is_protmode(struct kvm_vcpu *vcpu)
81{
82	return kvm_read_cr0_bits(vcpu, X86_CR0_PE);
83}
84
85static inline int is_long_mode(struct kvm_vcpu *vcpu)
86{
87#ifdef CONFIG_X86_64
88	return vcpu->arch.efer & EFER_LMA;
89#else
90	return 0;
91#endif
92}
93
94static inline bool is_64_bit_mode(struct kvm_vcpu *vcpu)
95{
96	int cs_db, cs_l;
97
98	if (!is_long_mode(vcpu))
99		return false;
100	kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
101	return cs_l;
102}
103
104static inline bool is_la57_mode(struct kvm_vcpu *vcpu)
105{
106#ifdef CONFIG_X86_64
107	return (vcpu->arch.efer & EFER_LMA) &&
108		 kvm_read_cr4_bits(vcpu, X86_CR4_LA57);
109#else
110	return 0;
111#endif
112}
113
114static inline bool x86_exception_has_error_code(unsigned int vector)
115{
116	static u32 exception_has_error_code = BIT(DF_VECTOR) | BIT(TS_VECTOR) |
117			BIT(NP_VECTOR) | BIT(SS_VECTOR) | BIT(GP_VECTOR) |
118			BIT(PF_VECTOR) | BIT(AC_VECTOR);
119
120	return (1U << vector) & exception_has_error_code;
121}
122
123static inline bool mmu_is_nested(struct kvm_vcpu *vcpu)
124{
125	return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu;
126}
127
128static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
129{
130	++vcpu->stat.tlb_flush;
131	kvm_x86_ops.tlb_flush_current(vcpu);
132}
133
134static inline int is_pae(struct kvm_vcpu *vcpu)
135{
136	return kvm_read_cr4_bits(vcpu, X86_CR4_PAE);
137}
138
139static inline int is_pse(struct kvm_vcpu *vcpu)
140{
141	return kvm_read_cr4_bits(vcpu, X86_CR4_PSE);
142}
143
144static inline int is_paging(struct kvm_vcpu *vcpu)
145{
146	return likely(kvm_read_cr0_bits(vcpu, X86_CR0_PG));
147}
148
149static inline bool is_pae_paging(struct kvm_vcpu *vcpu)
150{
151	return !is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu);
152}
153
154static inline u8 vcpu_virt_addr_bits(struct kvm_vcpu *vcpu)
155{
156	return kvm_read_cr4_bits(vcpu, X86_CR4_LA57) ? 57 : 48;
157}
158
159static inline bool is_noncanonical_address(u64 la, struct kvm_vcpu *vcpu)
160{
161	return !__is_canonical_address(la, vcpu_virt_addr_bits(vcpu));
162}
163
164static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu,
165					gva_t gva, gfn_t gfn, unsigned access)
166{
167	u64 gen = kvm_memslots(vcpu->kvm)->generation;
168
169	if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS))
170		return;
171
172	/*
173	 * If this is a shadow nested page table, the "GVA" is
174	 * actually a nGPA.
175	 */
176	vcpu->arch.mmio_gva = mmu_is_nested(vcpu) ? 0 : gva & PAGE_MASK;
177	vcpu->arch.mmio_access = access;
178	vcpu->arch.mmio_gfn = gfn;
179	vcpu->arch.mmio_gen = gen;
180}
181
182static inline bool vcpu_match_mmio_gen(struct kvm_vcpu *vcpu)
183{
184	return vcpu->arch.mmio_gen == kvm_memslots(vcpu->kvm)->generation;
185}
186
187/*
188 * Clear the mmio cache info for the given gva. If gva is MMIO_GVA_ANY, we
189 * clear all mmio cache info.
190 */
191#define MMIO_GVA_ANY (~(gva_t)0)
192
193static inline void vcpu_clear_mmio_info(struct kvm_vcpu *vcpu, gva_t gva)
194{
195	if (gva != MMIO_GVA_ANY && vcpu->arch.mmio_gva != (gva & PAGE_MASK))
196		return;
197
198	vcpu->arch.mmio_gva = 0;
199}
200
201static inline bool vcpu_match_mmio_gva(struct kvm_vcpu *vcpu, unsigned long gva)
202{
203	if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gva &&
204	      vcpu->arch.mmio_gva == (gva & PAGE_MASK))
205		return true;
206
207	return false;
208}
209
210static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
211{
212	if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gfn &&
213	      vcpu->arch.mmio_gfn == gpa >> PAGE_SHIFT)
214		return true;
215
216	return false;
217}
218
219static inline unsigned long kvm_register_readl(struct kvm_vcpu *vcpu, int reg)
220{
221	unsigned long val = kvm_register_read(vcpu, reg);
222
223	return is_64_bit_mode(vcpu) ? val : (u32)val;
224}
225
226static inline void kvm_register_writel(struct kvm_vcpu *vcpu,
227				       int reg, unsigned long val)
228{
229	if (!is_64_bit_mode(vcpu))
230		val = (u32)val;
231	return kvm_register_write(vcpu, reg, val);
232}
233
234static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk)
235{
236	return !(kvm->arch.disabled_quirks & quirk);
237}
238
239static inline bool kvm_vcpu_latch_init(struct kvm_vcpu *vcpu)
240{
241	return is_smm(vcpu) || kvm_x86_ops.apic_init_signal_blocked(vcpu);
242}
243
244void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip);
245
246void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr);
247u64 get_kvmclock_ns(struct kvm *kvm);
248
249int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
250	gva_t addr, void *val, unsigned int bytes,
251	struct x86_exception *exception);
252
253int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu,
254	gva_t addr, void *val, unsigned int bytes,
255	struct x86_exception *exception);
256
257int handle_ud(struct kvm_vcpu *vcpu);
258
259void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu);
260
261void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu);
262u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
263bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data);
264int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);
265int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
266bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
267					  int page_num);
268bool kvm_vector_hashing_enabled(void);
269void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code);
270int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
271				    void *insn, int insn_len);
272int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
273			    int emulation_type, void *insn, int insn_len);
274fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu);
275
276extern u64 host_xcr0;
277extern u64 supported_xcr0;
278extern u64 supported_xss;
279
280static inline bool kvm_mpx_supported(void)
281{
282	return (supported_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR))
283		== (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR);
284}
285
286extern unsigned int min_timer_period_us;
287
288extern bool enable_vmware_backdoor;
289
290extern int pi_inject_timer;
291
292extern struct static_key kvm_no_apic_vcpu;
293
294static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
295{
296	return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
297				   vcpu->arch.virtual_tsc_shift);
298}
299
300/* Same "calling convention" as do_div:
301 * - divide (n << 32) by base
302 * - put result in n
303 * - return remainder
304 */
305#define do_shl32_div32(n, base)					\
306	({							\
307	    u32 __quot, __rem;					\
308	    asm("divl %2" : "=a" (__quot), "=d" (__rem)		\
309			: "rm" (base), "0" (0), "1" ((u32) n));	\
310	    n = __quot;						\
311	    __rem;						\
312	 })
313
314static inline bool kvm_mwait_in_guest(struct kvm *kvm)
315{
316	return kvm->arch.mwait_in_guest;
317}
318
319static inline bool kvm_hlt_in_guest(struct kvm *kvm)
320{
321	return kvm->arch.hlt_in_guest;
322}
323
324static inline bool kvm_pause_in_guest(struct kvm *kvm)
325{
326	return kvm->arch.pause_in_guest;
327}
328
329static inline bool kvm_cstate_in_guest(struct kvm *kvm)
330{
331	return kvm->arch.cstate_in_guest;
332}
333
334DECLARE_PER_CPU(struct kvm_vcpu *, current_vcpu);
335
336static inline void kvm_before_interrupt(struct kvm_vcpu *vcpu)
337{
338	__this_cpu_write(current_vcpu, vcpu);
339}
340
341static inline void kvm_after_interrupt(struct kvm_vcpu *vcpu)
342{
343	__this_cpu_write(current_vcpu, NULL);
344}
345
346
347static inline bool kvm_pat_valid(u64 data)
348{
349	if (data & 0xF8F8F8F8F8F8F8F8ull)
350		return false;
351	/* 0, 1, 4, 5, 6, 7 are valid values.  */
352	return (data | ((data & 0x0202020202020202ull) << 1)) == data;
353}
354
355static inline bool kvm_dr7_valid(u64 data)
356{
357	/* Bits [63:32] are reserved */
358	return !(data >> 32);
359}
360static inline bool kvm_dr6_valid(u64 data)
361{
362	/* Bits [63:32] are reserved */
363	return !(data >> 32);
364}
365
366void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu);
367void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu);
368int kvm_spec_ctrl_test_value(u64 value);
369int kvm_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
370bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu);
371int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
372			      struct x86_exception *e);
373int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva);
374bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type);
375
376/*
377 * Internal error codes that are used to indicate that MSR emulation encountered
378 * an error that should result in #GP in the guest, unless userspace
379 * handles it.
380 */
381#define  KVM_MSR_RET_INVALID	2	/* in-kernel MSR emulation #GP condition */
382#define  KVM_MSR_RET_FILTERED	3	/* #GP due to userspace MSR filter */
383
384#define __cr4_reserved_bits(__cpu_has, __c)             \
385({                                                      \
386	u64 __reserved_bits = CR4_RESERVED_BITS;        \
387                                                        \
388	if (!__cpu_has(__c, X86_FEATURE_XSAVE))         \
389		__reserved_bits |= X86_CR4_OSXSAVE;     \
390	if (!__cpu_has(__c, X86_FEATURE_SMEP))          \
391		__reserved_bits |= X86_CR4_SMEP;        \
392	if (!__cpu_has(__c, X86_FEATURE_SMAP))          \
393		__reserved_bits |= X86_CR4_SMAP;        \
394	if (!__cpu_has(__c, X86_FEATURE_FSGSBASE))      \
395		__reserved_bits |= X86_CR4_FSGSBASE;    \
396	if (!__cpu_has(__c, X86_FEATURE_PKU))           \
397		__reserved_bits |= X86_CR4_PKE;         \
398	if (!__cpu_has(__c, X86_FEATURE_LA57))          \
399		__reserved_bits |= X86_CR4_LA57;        \
400	if (!__cpu_has(__c, X86_FEATURE_UMIP))          \
401		__reserved_bits |= X86_CR4_UMIP;        \
402	if (!__cpu_has(__c, X86_FEATURE_VMX))           \
403		__reserved_bits |= X86_CR4_VMXE;        \
404	if (!__cpu_has(__c, X86_FEATURE_PCID))          \
405		__reserved_bits |= X86_CR4_PCIDE;       \
406	__reserved_bits;                                \
407})
408
409#endif
410