1/* SPDX-License-Identifier: GPL-2.0 */ 2#ifndef __KVM_IO_APIC_H 3#define __KVM_IO_APIC_H 4 5#include <linux/kvm_host.h> 6#include <kvm/iodev.h> 7#include "irq.h" 8 9struct kvm; 10struct kvm_vcpu; 11 12#define IOAPIC_NUM_PINS KVM_IOAPIC_NUM_PINS 13#define MAX_NR_RESERVED_IOAPIC_PINS KVM_MAX_IRQ_ROUTES 14#define IOAPIC_VERSION_ID 0x11 /* IOAPIC version */ 15#define IOAPIC_EDGE_TRIG 0 16#define IOAPIC_LEVEL_TRIG 1 17 18#define IOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000 19#define IOAPIC_MEM_LENGTH 0x100 20 21/* Direct registers. */ 22#define IOAPIC_REG_SELECT 0x00 23#define IOAPIC_REG_WINDOW 0x10 24 25/* Indirect registers. */ 26#define IOAPIC_REG_APIC_ID 0x00 /* x86 IOAPIC only */ 27#define IOAPIC_REG_VERSION 0x01 28#define IOAPIC_REG_ARB_ID 0x02 /* x86 IOAPIC only */ 29 30/*ioapic delivery mode*/ 31#define IOAPIC_FIXED 0x0 32#define IOAPIC_LOWEST_PRIORITY 0x1 33#define IOAPIC_PMI 0x2 34#define IOAPIC_NMI 0x4 35#define IOAPIC_INIT 0x5 36#define IOAPIC_EXTINT 0x7 37 38#ifdef CONFIG_X86 39#define RTC_GSI 8 40#else 41#define RTC_GSI -1U 42#endif 43 44struct dest_map { 45 /* vcpu bitmap where IRQ has been sent */ 46 DECLARE_BITMAP(map, KVM_MAX_VCPU_ID); 47 48 /* 49 * Vector sent to a given vcpu, only valid when 50 * the vcpu's bit in map is set 51 */ 52 u8 vectors[KVM_MAX_VCPU_ID]; 53}; 54 55 56struct rtc_status { 57 int pending_eoi; 58 struct dest_map dest_map; 59}; 60 61union kvm_ioapic_redirect_entry { 62 u64 bits; 63 struct { 64 u8 vector; 65 u8 delivery_mode:3; 66 u8 dest_mode:1; 67 u8 delivery_status:1; 68 u8 polarity:1; 69 u8 remote_irr:1; 70 u8 trig_mode:1; 71 u8 mask:1; 72 u8 reserve:7; 73 u8 reserved[4]; 74 u8 dest_id; 75 } fields; 76}; 77 78struct kvm_ioapic { 79 u64 base_address; 80 u32 ioregsel; 81 u32 id; 82 u32 irr; 83 u32 pad; 84 union kvm_ioapic_redirect_entry redirtbl[IOAPIC_NUM_PINS]; 85 unsigned long irq_states[IOAPIC_NUM_PINS]; 86 struct kvm_io_device dev; 87 struct kvm *kvm; 88 void (*ack_notifier)(void *opaque, int irq); 89 spinlock_t lock; 90 struct rtc_status rtc_status; 91 struct delayed_work eoi_inject; 92 u32 irq_eoi[IOAPIC_NUM_PINS]; 93 u32 irr_delivered; 94}; 95 96#ifdef DEBUG 97#define ASSERT(x) \ 98do { \ 99 if (!(x)) { \ 100 printk(KERN_EMERG "assertion failed %s: %d: %s\n", \ 101 __FILE__, __LINE__, #x); \ 102 BUG(); \ 103 } \ 104} while (0) 105#else 106#define ASSERT(x) do { } while (0) 107#endif 108 109static inline int ioapic_in_kernel(struct kvm *kvm) 110{ 111 return irqchip_kernel(kvm); 112} 113 114void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu); 115void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, 116 int trigger_mode); 117int kvm_ioapic_init(struct kvm *kvm); 118void kvm_ioapic_destroy(struct kvm *kvm); 119int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id, 120 int level, bool line_status); 121void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id); 122void kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state); 123void kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state); 124void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, 125 ulong *ioapic_handled_vectors); 126void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu, 127 ulong *ioapic_handled_vectors); 128#endif 129