18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: LGPL-2.0+ WITH Linux-syscall-note */ 28c2ecf20Sopenharmony_ci/* Generic MTRR (Memory Type Range Register) ioctls. 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ci Copyright (C) 1997-1999 Richard Gooch 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ci This library is free software; you can redistribute it and/or 78c2ecf20Sopenharmony_ci modify it under the terms of the GNU Library General Public 88c2ecf20Sopenharmony_ci License as published by the Free Software Foundation; either 98c2ecf20Sopenharmony_ci version 2 of the License, or (at your option) any later version. 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci This library is distributed in the hope that it will be useful, 128c2ecf20Sopenharmony_ci but WITHOUT ANY WARRANTY; without even the implied warranty of 138c2ecf20Sopenharmony_ci MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 148c2ecf20Sopenharmony_ci Library General Public License for more details. 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci You should have received a copy of the GNU Library General Public 178c2ecf20Sopenharmony_ci License along with this library; if not, write to the Free 188c2ecf20Sopenharmony_ci Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci Richard Gooch may be reached by email at rgooch@atnf.csiro.au 218c2ecf20Sopenharmony_ci The postal address is: 228c2ecf20Sopenharmony_ci Richard Gooch, c/o ATNF, P. O. Box 76, Epping, N.S.W., 2121, Australia. 238c2ecf20Sopenharmony_ci*/ 248c2ecf20Sopenharmony_ci#ifndef _UAPI_ASM_X86_MTRR_H 258c2ecf20Sopenharmony_ci#define _UAPI_ASM_X86_MTRR_H 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci#include <linux/types.h> 288c2ecf20Sopenharmony_ci#include <linux/ioctl.h> 298c2ecf20Sopenharmony_ci#include <linux/errno.h> 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci#define MTRR_IOCTL_BASE 'M' 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci/* Warning: this structure has a different order from i386 348c2ecf20Sopenharmony_ci on x86-64. The 32bit emulation code takes care of that. 358c2ecf20Sopenharmony_ci But you need to use this for 64bit, otherwise your X server 368c2ecf20Sopenharmony_ci will break. */ 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ci#ifdef __i386__ 398c2ecf20Sopenharmony_cistruct mtrr_sentry { 408c2ecf20Sopenharmony_ci unsigned long base; /* Base address */ 418c2ecf20Sopenharmony_ci unsigned int size; /* Size of region */ 428c2ecf20Sopenharmony_ci unsigned int type; /* Type of region */ 438c2ecf20Sopenharmony_ci}; 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_cistruct mtrr_gentry { 468c2ecf20Sopenharmony_ci unsigned int regnum; /* Register number */ 478c2ecf20Sopenharmony_ci unsigned long base; /* Base address */ 488c2ecf20Sopenharmony_ci unsigned int size; /* Size of region */ 498c2ecf20Sopenharmony_ci unsigned int type; /* Type of region */ 508c2ecf20Sopenharmony_ci}; 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci#else /* __i386__ */ 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_cistruct mtrr_sentry { 558c2ecf20Sopenharmony_ci __u64 base; /* Base address */ 568c2ecf20Sopenharmony_ci __u32 size; /* Size of region */ 578c2ecf20Sopenharmony_ci __u32 type; /* Type of region */ 588c2ecf20Sopenharmony_ci}; 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_cistruct mtrr_gentry { 618c2ecf20Sopenharmony_ci __u64 base; /* Base address */ 628c2ecf20Sopenharmony_ci __u32 size; /* Size of region */ 638c2ecf20Sopenharmony_ci __u32 regnum; /* Register number */ 648c2ecf20Sopenharmony_ci __u32 type; /* Type of region */ 658c2ecf20Sopenharmony_ci __u32 _pad; /* Unused */ 668c2ecf20Sopenharmony_ci}; 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_ci#endif /* !__i386__ */ 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_cistruct mtrr_var_range { 718c2ecf20Sopenharmony_ci __u32 base_lo; 728c2ecf20Sopenharmony_ci __u32 base_hi; 738c2ecf20Sopenharmony_ci __u32 mask_lo; 748c2ecf20Sopenharmony_ci __u32 mask_hi; 758c2ecf20Sopenharmony_ci}; 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_ci/* In the Intel processor's MTRR interface, the MTRR type is always held in 788c2ecf20Sopenharmony_ci an 8 bit field: */ 798c2ecf20Sopenharmony_citypedef __u8 mtrr_type; 808c2ecf20Sopenharmony_ci 818c2ecf20Sopenharmony_ci#define MTRR_NUM_FIXED_RANGES 88 828c2ecf20Sopenharmony_ci#define MTRR_MAX_VAR_RANGES 256 838c2ecf20Sopenharmony_ci 848c2ecf20Sopenharmony_cistruct mtrr_state_type { 858c2ecf20Sopenharmony_ci struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES]; 868c2ecf20Sopenharmony_ci mtrr_type fixed_ranges[MTRR_NUM_FIXED_RANGES]; 878c2ecf20Sopenharmony_ci unsigned char enabled; 888c2ecf20Sopenharmony_ci unsigned char have_fixed; 898c2ecf20Sopenharmony_ci mtrr_type def_type; 908c2ecf20Sopenharmony_ci}; 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_ci#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg)) 938c2ecf20Sopenharmony_ci#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1) 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_ci/* These are the various ioctls */ 968c2ecf20Sopenharmony_ci#define MTRRIOC_ADD_ENTRY _IOW(MTRR_IOCTL_BASE, 0, struct mtrr_sentry) 978c2ecf20Sopenharmony_ci#define MTRRIOC_SET_ENTRY _IOW(MTRR_IOCTL_BASE, 1, struct mtrr_sentry) 988c2ecf20Sopenharmony_ci#define MTRRIOC_DEL_ENTRY _IOW(MTRR_IOCTL_BASE, 2, struct mtrr_sentry) 998c2ecf20Sopenharmony_ci#define MTRRIOC_GET_ENTRY _IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry) 1008c2ecf20Sopenharmony_ci#define MTRRIOC_KILL_ENTRY _IOW(MTRR_IOCTL_BASE, 4, struct mtrr_sentry) 1018c2ecf20Sopenharmony_ci#define MTRRIOC_ADD_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 5, struct mtrr_sentry) 1028c2ecf20Sopenharmony_ci#define MTRRIOC_SET_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 6, struct mtrr_sentry) 1038c2ecf20Sopenharmony_ci#define MTRRIOC_DEL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 7, struct mtrr_sentry) 1048c2ecf20Sopenharmony_ci#define MTRRIOC_GET_PAGE_ENTRY _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry) 1058c2ecf20Sopenharmony_ci#define MTRRIOC_KILL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 9, struct mtrr_sentry) 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_ci/* MTRR memory types, which are defined in SDM */ 1088c2ecf20Sopenharmony_ci#define MTRR_TYPE_UNCACHABLE 0 1098c2ecf20Sopenharmony_ci#define MTRR_TYPE_WRCOMB 1 1108c2ecf20Sopenharmony_ci/*#define MTRR_TYPE_ 2*/ 1118c2ecf20Sopenharmony_ci/*#define MTRR_TYPE_ 3*/ 1128c2ecf20Sopenharmony_ci#define MTRR_TYPE_WRTHROUGH 4 1138c2ecf20Sopenharmony_ci#define MTRR_TYPE_WRPROT 5 1148c2ecf20Sopenharmony_ci#define MTRR_TYPE_WRBACK 6 1158c2ecf20Sopenharmony_ci#define MTRR_NUM_TYPES 7 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_ci/* 1188c2ecf20Sopenharmony_ci * Invalid MTRR memory type. mtrr_type_lookup() returns this value when 1198c2ecf20Sopenharmony_ci * MTRRs are disabled. Note, this value is allocated from the reserved 1208c2ecf20Sopenharmony_ci * values (0x7-0xff) of the MTRR memory types. 1218c2ecf20Sopenharmony_ci */ 1228c2ecf20Sopenharmony_ci#define MTRR_TYPE_INVALID 0xff 1238c2ecf20Sopenharmony_ci 1248c2ecf20Sopenharmony_ci#endif /* _UAPI_ASM_X86_MTRR_H */ 125