18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 28c2ecf20Sopenharmony_ci#ifndef _UAPI_ASM_X86_MCE_H 38c2ecf20Sopenharmony_ci#define _UAPI_ASM_X86_MCE_H 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci#include <linux/types.h> 68c2ecf20Sopenharmony_ci#include <linux/ioctl.h> 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci/* 98c2ecf20Sopenharmony_ci * Fields are zero when not available. Also, this struct is shared with 108c2ecf20Sopenharmony_ci * userspace mcelog and thus must keep existing fields at current offsets. 118c2ecf20Sopenharmony_ci * Only add new fields to the end of the structure 128c2ecf20Sopenharmony_ci */ 138c2ecf20Sopenharmony_cistruct mce { 148c2ecf20Sopenharmony_ci __u64 status; /* Bank's MCi_STATUS MSR */ 158c2ecf20Sopenharmony_ci __u64 misc; /* Bank's MCi_MISC MSR */ 168c2ecf20Sopenharmony_ci __u64 addr; /* Bank's MCi_ADDR MSR */ 178c2ecf20Sopenharmony_ci __u64 mcgstatus; /* Machine Check Global Status MSR */ 188c2ecf20Sopenharmony_ci __u64 ip; /* Instruction Pointer when the error happened */ 198c2ecf20Sopenharmony_ci __u64 tsc; /* CPU time stamp counter */ 208c2ecf20Sopenharmony_ci __u64 time; /* Wall time_t when error was detected */ 218c2ecf20Sopenharmony_ci __u8 cpuvendor; /* Kernel's X86_VENDOR enum */ 228c2ecf20Sopenharmony_ci __u8 inject_flags; /* Software inject flags */ 238c2ecf20Sopenharmony_ci __u8 severity; /* Error severity */ 248c2ecf20Sopenharmony_ci __u8 pad; 258c2ecf20Sopenharmony_ci __u32 cpuid; /* CPUID 1 EAX */ 268c2ecf20Sopenharmony_ci __u8 cs; /* Code segment */ 278c2ecf20Sopenharmony_ci __u8 bank; /* Machine check bank reporting the error */ 288c2ecf20Sopenharmony_ci __u8 cpu; /* CPU number; obsoleted by extcpu */ 298c2ecf20Sopenharmony_ci __u8 finished; /* Entry is valid */ 308c2ecf20Sopenharmony_ci __u32 extcpu; /* Linux CPU number that detected the error */ 318c2ecf20Sopenharmony_ci __u32 socketid; /* CPU socket ID */ 328c2ecf20Sopenharmony_ci __u32 apicid; /* CPU initial APIC ID */ 338c2ecf20Sopenharmony_ci __u64 mcgcap; /* MCGCAP MSR: machine check capabilities of CPU */ 348c2ecf20Sopenharmony_ci __u64 synd; /* MCA_SYND MSR: only valid on SMCA systems */ 358c2ecf20Sopenharmony_ci __u64 ipid; /* MCA_IPID MSR: only valid on SMCA systems */ 368c2ecf20Sopenharmony_ci __u64 ppin; /* Protected Processor Inventory Number */ 378c2ecf20Sopenharmony_ci __u32 microcode; /* Microcode revision */ 388c2ecf20Sopenharmony_ci __u64 kflags; /* Internal kernel use */ 398c2ecf20Sopenharmony_ci}; 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci#define MCE_GET_RECORD_LEN _IOR('M', 1, int) 428c2ecf20Sopenharmony_ci#define MCE_GET_LOG_LEN _IOR('M', 2, int) 438c2ecf20Sopenharmony_ci#define MCE_GETCLEAR_FLAGS _IOR('M', 3, int) 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci#endif /* _UAPI_ASM_X86_MCE_H */ 46