1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2#ifndef _ASM_X86_KVM_H 3#define _ASM_X86_KVM_H 4 5/* 6 * KVM x86 specific structures and definitions 7 * 8 */ 9 10#include <linux/types.h> 11#include <linux/ioctl.h> 12 13#define KVM_PIO_PAGE_OFFSET 1 14#define KVM_COALESCED_MMIO_PAGE_OFFSET 2 15 16#define DE_VECTOR 0 17#define DB_VECTOR 1 18#define BP_VECTOR 3 19#define OF_VECTOR 4 20#define BR_VECTOR 5 21#define UD_VECTOR 6 22#define NM_VECTOR 7 23#define DF_VECTOR 8 24#define TS_VECTOR 10 25#define NP_VECTOR 11 26#define SS_VECTOR 12 27#define GP_VECTOR 13 28#define PF_VECTOR 14 29#define MF_VECTOR 16 30#define AC_VECTOR 17 31#define MC_VECTOR 18 32#define XM_VECTOR 19 33#define VE_VECTOR 20 34 35/* Select x86 specific features in <linux/kvm.h> */ 36#define __KVM_HAVE_PIT 37#define __KVM_HAVE_IOAPIC 38#define __KVM_HAVE_IRQ_LINE 39#define __KVM_HAVE_MSI 40#define __KVM_HAVE_USER_NMI 41#define __KVM_HAVE_GUEST_DEBUG 42#define __KVM_HAVE_MSIX 43#define __KVM_HAVE_MCE 44#define __KVM_HAVE_PIT_STATE2 45#define __KVM_HAVE_XEN_HVM 46#define __KVM_HAVE_VCPU_EVENTS 47#define __KVM_HAVE_DEBUGREGS 48#define __KVM_HAVE_XSAVE 49#define __KVM_HAVE_XCRS 50#define __KVM_HAVE_READONLY_MEM 51 52/* Architectural interrupt line count. */ 53#define KVM_NR_INTERRUPTS 256 54 55struct kvm_memory_alias { 56 __u32 slot; /* this has a different namespace than memory slots */ 57 __u32 flags; 58 __u64 guest_phys_addr; 59 __u64 memory_size; 60 __u64 target_phys_addr; 61}; 62 63/* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */ 64struct kvm_pic_state { 65 __u8 last_irr; /* edge detection */ 66 __u8 irr; /* interrupt request register */ 67 __u8 imr; /* interrupt mask register */ 68 __u8 isr; /* interrupt service register */ 69 __u8 priority_add; /* highest irq priority */ 70 __u8 irq_base; 71 __u8 read_reg_select; 72 __u8 poll; 73 __u8 special_mask; 74 __u8 init_state; 75 __u8 auto_eoi; 76 __u8 rotate_on_auto_eoi; 77 __u8 special_fully_nested_mode; 78 __u8 init4; /* true if 4 byte init */ 79 __u8 elcr; /* PIIX edge/trigger selection */ 80 __u8 elcr_mask; 81}; 82 83#define KVM_IOAPIC_NUM_PINS 24 84struct kvm_ioapic_state { 85 __u64 base_address; 86 __u32 ioregsel; 87 __u32 id; 88 __u32 irr; 89 __u32 pad; 90 union { 91 __u64 bits; 92 struct { 93 __u8 vector; 94 __u8 delivery_mode:3; 95 __u8 dest_mode:1; 96 __u8 delivery_status:1; 97 __u8 polarity:1; 98 __u8 remote_irr:1; 99 __u8 trig_mode:1; 100 __u8 mask:1; 101 __u8 reserve:7; 102 __u8 reserved[4]; 103 __u8 dest_id; 104 } fields; 105 } redirtbl[KVM_IOAPIC_NUM_PINS]; 106}; 107 108#define KVM_IRQCHIP_PIC_MASTER 0 109#define KVM_IRQCHIP_PIC_SLAVE 1 110#define KVM_IRQCHIP_IOAPIC 2 111#define KVM_NR_IRQCHIPS 3 112 113#define KVM_RUN_X86_SMM (1 << 0) 114 115/* for KVM_GET_REGS and KVM_SET_REGS */ 116struct kvm_regs { 117 /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */ 118 __u64 rax, rbx, rcx, rdx; 119 __u64 rsi, rdi, rsp, rbp; 120 __u64 r8, r9, r10, r11; 121 __u64 r12, r13, r14, r15; 122 __u64 rip, rflags; 123}; 124 125/* for KVM_GET_LAPIC and KVM_SET_LAPIC */ 126#define KVM_APIC_REG_SIZE 0x400 127struct kvm_lapic_state { 128 char regs[KVM_APIC_REG_SIZE]; 129}; 130 131struct kvm_segment { 132 __u64 base; 133 __u32 limit; 134 __u16 selector; 135 __u8 type; 136 __u8 present, dpl, db, s, l, g, avl; 137 __u8 unusable; 138 __u8 padding; 139}; 140 141struct kvm_dtable { 142 __u64 base; 143 __u16 limit; 144 __u16 padding[3]; 145}; 146 147 148/* for KVM_GET_SREGS and KVM_SET_SREGS */ 149struct kvm_sregs { 150 /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */ 151 struct kvm_segment cs, ds, es, fs, gs, ss; 152 struct kvm_segment tr, ldt; 153 struct kvm_dtable gdt, idt; 154 __u64 cr0, cr2, cr3, cr4, cr8; 155 __u64 efer; 156 __u64 apic_base; 157 __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64]; 158}; 159 160/* for KVM_GET_FPU and KVM_SET_FPU */ 161struct kvm_fpu { 162 __u8 fpr[8][16]; 163 __u16 fcw; 164 __u16 fsw; 165 __u8 ftwx; /* in fxsave format */ 166 __u8 pad1; 167 __u16 last_opcode; 168 __u64 last_ip; 169 __u64 last_dp; 170 __u8 xmm[16][16]; 171 __u32 mxcsr; 172 __u32 pad2; 173}; 174 175struct kvm_msr_entry { 176 __u32 index; 177 __u32 reserved; 178 __u64 data; 179}; 180 181/* for KVM_GET_MSRS and KVM_SET_MSRS */ 182struct kvm_msrs { 183 __u32 nmsrs; /* number of msrs in entries */ 184 __u32 pad; 185 186 struct kvm_msr_entry entries[0]; 187}; 188 189/* for KVM_GET_MSR_INDEX_LIST */ 190struct kvm_msr_list { 191 __u32 nmsrs; /* number of msrs in entries */ 192 __u32 indices[0]; 193}; 194 195/* Maximum size of any access bitmap in bytes */ 196#define KVM_MSR_FILTER_MAX_BITMAP_SIZE 0x600 197 198/* for KVM_X86_SET_MSR_FILTER */ 199struct kvm_msr_filter_range { 200#define KVM_MSR_FILTER_READ (1 << 0) 201#define KVM_MSR_FILTER_WRITE (1 << 1) 202 __u32 flags; 203 __u32 nmsrs; /* number of msrs in bitmap */ 204 __u32 base; /* MSR index the bitmap starts at */ 205 __u8 *bitmap; /* a 1 bit allows the operations in flags, 0 denies */ 206}; 207 208#define KVM_MSR_FILTER_MAX_RANGES 16 209struct kvm_msr_filter { 210#define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0) 211#define KVM_MSR_FILTER_DEFAULT_DENY (1 << 0) 212 __u32 flags; 213 struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES]; 214}; 215 216struct kvm_cpuid_entry { 217 __u32 function; 218 __u32 eax; 219 __u32 ebx; 220 __u32 ecx; 221 __u32 edx; 222 __u32 padding; 223}; 224 225/* for KVM_SET_CPUID */ 226struct kvm_cpuid { 227 __u32 nent; 228 __u32 padding; 229 struct kvm_cpuid_entry entries[0]; 230}; 231 232struct kvm_cpuid_entry2 { 233 __u32 function; 234 __u32 index; 235 __u32 flags; 236 __u32 eax; 237 __u32 ebx; 238 __u32 ecx; 239 __u32 edx; 240 __u32 padding[3]; 241}; 242 243#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX (1 << 0) 244#define KVM_CPUID_FLAG_STATEFUL_FUNC (1 << 1) 245#define KVM_CPUID_FLAG_STATE_READ_NEXT (1 << 2) 246 247/* for KVM_SET_CPUID2 */ 248struct kvm_cpuid2 { 249 __u32 nent; 250 __u32 padding; 251 struct kvm_cpuid_entry2 entries[0]; 252}; 253 254/* for KVM_GET_PIT and KVM_SET_PIT */ 255struct kvm_pit_channel_state { 256 __u32 count; /* can be 65536 */ 257 __u16 latched_count; 258 __u8 count_latched; 259 __u8 status_latched; 260 __u8 status; 261 __u8 read_state; 262 __u8 write_state; 263 __u8 write_latch; 264 __u8 rw_mode; 265 __u8 mode; 266 __u8 bcd; 267 __u8 gate; 268 __s64 count_load_time; 269}; 270 271struct kvm_debug_exit_arch { 272 __u32 exception; 273 __u32 pad; 274 __u64 pc; 275 __u64 dr6; 276 __u64 dr7; 277}; 278 279#define KVM_GUESTDBG_USE_SW_BP 0x00010000 280#define KVM_GUESTDBG_USE_HW_BP 0x00020000 281#define KVM_GUESTDBG_INJECT_DB 0x00040000 282#define KVM_GUESTDBG_INJECT_BP 0x00080000 283 284/* for KVM_SET_GUEST_DEBUG */ 285struct kvm_guest_debug_arch { 286 __u64 debugreg[8]; 287}; 288 289struct kvm_pit_state { 290 struct kvm_pit_channel_state channels[3]; 291}; 292 293#define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001 294 295struct kvm_pit_state2 { 296 struct kvm_pit_channel_state channels[3]; 297 __u32 flags; 298 __u32 reserved[9]; 299}; 300 301struct kvm_reinject_control { 302 __u8 pit_reinject; 303 __u8 reserved[31]; 304}; 305 306/* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */ 307#define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001 308#define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002 309#define KVM_VCPUEVENT_VALID_SHADOW 0x00000004 310#define KVM_VCPUEVENT_VALID_SMM 0x00000008 311#define KVM_VCPUEVENT_VALID_PAYLOAD 0x00000010 312 313/* Interrupt shadow states */ 314#define KVM_X86_SHADOW_INT_MOV_SS 0x01 315#define KVM_X86_SHADOW_INT_STI 0x02 316 317/* for KVM_GET/SET_VCPU_EVENTS */ 318struct kvm_vcpu_events { 319 struct { 320 __u8 injected; 321 __u8 nr; 322 __u8 has_error_code; 323 __u8 pending; 324 __u32 error_code; 325 } exception; 326 struct { 327 __u8 injected; 328 __u8 nr; 329 __u8 soft; 330 __u8 shadow; 331 } interrupt; 332 struct { 333 __u8 injected; 334 __u8 pending; 335 __u8 masked; 336 __u8 pad; 337 } nmi; 338 __u32 sipi_vector; 339 __u32 flags; 340 struct { 341 __u8 smm; 342 __u8 pending; 343 __u8 smm_inside_nmi; 344 __u8 latched_init; 345 } smi; 346 __u8 reserved[27]; 347 __u8 exception_has_payload; 348 __u64 exception_payload; 349}; 350 351/* for KVM_GET/SET_DEBUGREGS */ 352struct kvm_debugregs { 353 __u64 db[4]; 354 __u64 dr6; 355 __u64 dr7; 356 __u64 flags; 357 __u64 reserved[9]; 358}; 359 360/* for KVM_CAP_XSAVE */ 361struct kvm_xsave { 362 __u32 region[1024]; 363}; 364 365#define KVM_MAX_XCRS 16 366 367struct kvm_xcr { 368 __u32 xcr; 369 __u32 reserved; 370 __u64 value; 371}; 372 373struct kvm_xcrs { 374 __u32 nr_xcrs; 375 __u32 flags; 376 struct kvm_xcr xcrs[KVM_MAX_XCRS]; 377 __u64 padding[16]; 378}; 379 380#define KVM_SYNC_X86_REGS (1UL << 0) 381#define KVM_SYNC_X86_SREGS (1UL << 1) 382#define KVM_SYNC_X86_EVENTS (1UL << 2) 383 384#define KVM_SYNC_X86_VALID_FIELDS \ 385 (KVM_SYNC_X86_REGS| \ 386 KVM_SYNC_X86_SREGS| \ 387 KVM_SYNC_X86_EVENTS) 388 389/* kvm_sync_regs struct included by kvm_run struct */ 390struct kvm_sync_regs { 391 /* Members of this structure are potentially malicious. 392 * Care must be taken by code reading, esp. interpreting, 393 * data fields from them inside KVM to prevent TOCTOU and 394 * double-fetch types of vulnerabilities. 395 */ 396 struct kvm_regs regs; 397 struct kvm_sregs sregs; 398 struct kvm_vcpu_events events; 399}; 400 401#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0) 402#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1) 403#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2) 404#define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3) 405#define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4) 406 407#define KVM_STATE_NESTED_FORMAT_VMX 0 408#define KVM_STATE_NESTED_FORMAT_SVM 1 409 410#define KVM_STATE_NESTED_GUEST_MODE 0x00000001 411#define KVM_STATE_NESTED_RUN_PENDING 0x00000002 412#define KVM_STATE_NESTED_EVMCS 0x00000004 413#define KVM_STATE_NESTED_MTF_PENDING 0x00000008 414#define KVM_STATE_NESTED_GIF_SET 0x00000100 415 416#define KVM_STATE_NESTED_SMM_GUEST_MODE 0x00000001 417#define KVM_STATE_NESTED_SMM_VMXON 0x00000002 418 419#define KVM_STATE_NESTED_VMX_VMCS_SIZE 0x1000 420 421#define KVM_STATE_NESTED_SVM_VMCB_SIZE 0x1000 422 423#define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001 424 425struct kvm_vmx_nested_state_data { 426 __u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE]; 427 __u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE]; 428}; 429 430struct kvm_vmx_nested_state_hdr { 431 __u64 vmxon_pa; 432 __u64 vmcs12_pa; 433 434 struct { 435 __u16 flags; 436 } smm; 437 438 __u32 flags; 439 __u64 preemption_timer_deadline; 440}; 441 442struct kvm_svm_nested_state_data { 443 /* Save area only used if KVM_STATE_NESTED_RUN_PENDING. */ 444 __u8 vmcb12[KVM_STATE_NESTED_SVM_VMCB_SIZE]; 445}; 446 447struct kvm_svm_nested_state_hdr { 448 __u64 vmcb_pa; 449}; 450 451/* for KVM_CAP_NESTED_STATE */ 452struct kvm_nested_state { 453 __u16 flags; 454 __u16 format; 455 __u32 size; 456 457 union { 458 struct kvm_vmx_nested_state_hdr vmx; 459 struct kvm_svm_nested_state_hdr svm; 460 461 /* Pad the header to 128 bytes. */ 462 __u8 pad[120]; 463 } hdr; 464 465 /* 466 * Define data region as 0 bytes to preserve backwards-compatability 467 * to old definition of kvm_nested_state in order to avoid changing 468 * KVM_{GET,PUT}_NESTED_STATE ioctl values. 469 */ 470 union { 471 struct kvm_vmx_nested_state_data vmx[0]; 472 struct kvm_svm_nested_state_data svm[0]; 473 } data; 474}; 475 476/* for KVM_CAP_PMU_EVENT_FILTER */ 477struct kvm_pmu_event_filter { 478 __u32 action; 479 __u32 nevents; 480 __u32 fixed_counter_bitmap; 481 __u32 flags; 482 __u32 pad[4]; 483 __u64 events[0]; 484}; 485 486#define KVM_PMU_EVENT_ALLOW 0 487#define KVM_PMU_EVENT_DENY 1 488 489#endif /* _ASM_X86_KVM_H */ 490