18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci#ifndef _ASM_X86_SPINLOCK_H 38c2ecf20Sopenharmony_ci#define _ASM_X86_SPINLOCK_H 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci#include <linux/jump_label.h> 68c2ecf20Sopenharmony_ci#include <linux/atomic.h> 78c2ecf20Sopenharmony_ci#include <asm/page.h> 88c2ecf20Sopenharmony_ci#include <asm/processor.h> 98c2ecf20Sopenharmony_ci#include <linux/compiler.h> 108c2ecf20Sopenharmony_ci#include <asm/paravirt.h> 118c2ecf20Sopenharmony_ci#include <asm/bitops.h> 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci/* 148c2ecf20Sopenharmony_ci * Your basic SMP spinlocks, allowing only a single CPU anywhere 158c2ecf20Sopenharmony_ci * 168c2ecf20Sopenharmony_ci * Simple spin lock operations. There are two variants, one clears IRQ's 178c2ecf20Sopenharmony_ci * on the local processor, one does not. 188c2ecf20Sopenharmony_ci * 198c2ecf20Sopenharmony_ci * These are fair FIFO ticket locks, which support up to 2^16 CPUs. 208c2ecf20Sopenharmony_ci * 218c2ecf20Sopenharmony_ci * (the type definitions are in asm/spinlock_types.h) 228c2ecf20Sopenharmony_ci */ 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci/* How long a lock should spin before we consider blocking */ 258c2ecf20Sopenharmony_ci#define SPIN_THRESHOLD (1 << 15) 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci#include <asm/qspinlock.h> 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci/* 308c2ecf20Sopenharmony_ci * Read-write spinlocks, allowing multiple readers 318c2ecf20Sopenharmony_ci * but only one writer. 328c2ecf20Sopenharmony_ci * 338c2ecf20Sopenharmony_ci * NOTE! it is quite common to have readers in interrupts 348c2ecf20Sopenharmony_ci * but no interrupt writers. For those circumstances we 358c2ecf20Sopenharmony_ci * can "mix" irq-safe locks - any writer needs to get a 368c2ecf20Sopenharmony_ci * irq-safe write-lock, but readers can get non-irqsafe 378c2ecf20Sopenharmony_ci * read-locks. 388c2ecf20Sopenharmony_ci * 398c2ecf20Sopenharmony_ci * On x86, we implement read-write locks using the generic qrwlock with 408c2ecf20Sopenharmony_ci * x86 specific optimization. 418c2ecf20Sopenharmony_ci */ 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ci#include <asm/qrwlock.h> 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci#endif /* _ASM_X86_SPINLOCK_H */ 46