1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8#ifndef _ASM_X86_KVM_HOST_H 9#define _ASM_X86_KVM_HOST_H 10 11#include <linux/types.h> 12#include <linux/mm.h> 13#include <linux/mmu_notifier.h> 14#include <linux/tracepoint.h> 15#include <linux/cpumask.h> 16#include <linux/irq_work.h> 17#include <linux/irq.h> 18 19#include <linux/kvm.h> 20#include <linux/kvm_para.h> 21#include <linux/kvm_types.h> 22#include <linux/perf_event.h> 23#include <linux/pvclock_gtod.h> 24#include <linux/clocksource.h> 25#include <linux/irqbypass.h> 26#include <linux/hyperv.h> 27 28#include <asm/apic.h> 29#include <asm/pvclock-abi.h> 30#include <asm/desc.h> 31#include <asm/mtrr.h> 32#include <asm/msr-index.h> 33#include <asm/asm.h> 34#include <asm/kvm_page_track.h> 35#include <asm/kvm_vcpu_regs.h> 36#include <asm/hyperv-tlfs.h> 37 38#define __KVM_HAVE_ARCH_VCPU_DEBUGFS 39 40#define KVM_MAX_VCPUS 288 41#define KVM_SOFT_MAX_VCPUS 240 42#define KVM_MAX_VCPU_ID 1023 43#define KVM_USER_MEM_SLOTS 509 44/* memory slots that are not exposed to userspace */ 45#define KVM_PRIVATE_MEM_SLOTS 3 46#define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 47 48#define KVM_HALT_POLL_NS_DEFAULT 200000 49 50#define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 51 52#define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 53 KVM_DIRTY_LOG_INITIALLY_SET) 54 55/* x86-specific vcpu->requests bit members */ 56#define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 57#define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 58#define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 59#define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 60#define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 61#define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5) 62#define KVM_REQ_EVENT KVM_ARCH_REQ(6) 63#define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 64#define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 65#define KVM_REQ_NMI KVM_ARCH_REQ(9) 66#define KVM_REQ_PMU KVM_ARCH_REQ(10) 67#define KVM_REQ_PMI KVM_ARCH_REQ(11) 68#define KVM_REQ_SMI KVM_ARCH_REQ(12) 69#define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 70#define KVM_REQ_MCLOCK_INPROGRESS \ 71 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 72#define KVM_REQ_SCAN_IOAPIC \ 73 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 74#define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 75#define KVM_REQ_APIC_PAGE_RELOAD \ 76 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 77#define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 78#define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 79#define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 80#define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 81#define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 82#define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 83#define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24) 84#define KVM_REQ_APICV_UPDATE \ 85 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 86#define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26) 87#define KVM_REQ_TLB_FLUSH_GUEST \ 88 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 89#define KVM_REQ_APF_READY KVM_ARCH_REQ(28) 90#define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29) 91 92#define CR0_RESERVED_BITS \ 93 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 94 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 95 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 96 97#define CR4_RESERVED_BITS \ 98 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 99 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 100 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 101 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 102 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 103 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 104 105#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 106 107 108 109#define INVALID_PAGE (~(hpa_t)0) 110#define VALID_PAGE(x) ((x) != INVALID_PAGE) 111 112#define UNMAPPED_GVA (~(gpa_t)0) 113 114/* KVM Hugepage definitions for x86 */ 115#define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G 116#define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1) 117#define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 118#define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 119#define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 120#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 121#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 122 123static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 124{ 125 /* KVM_HPAGE_GFN_SHIFT(PG_LEVEL_4K) must be 0. */ 126 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 127 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 128} 129 130#define KVM_PERMILLE_MMU_PAGES 20 131#define KVM_MIN_ALLOC_MMU_PAGES 64UL 132#define KVM_MMU_HASH_SHIFT 12 133#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 134#define KVM_MIN_FREE_MMU_PAGES 5 135#define KVM_REFILL_PAGES 25 136#define KVM_MAX_CPUID_ENTRIES 256 137#define KVM_NR_FIXED_MTRR_REGION 88 138#define KVM_NR_VAR_MTRR 8 139 140#define ASYNC_PF_PER_VCPU 64 141 142enum kvm_reg { 143 VCPU_REGS_RAX = __VCPU_REGS_RAX, 144 VCPU_REGS_RCX = __VCPU_REGS_RCX, 145 VCPU_REGS_RDX = __VCPU_REGS_RDX, 146 VCPU_REGS_RBX = __VCPU_REGS_RBX, 147 VCPU_REGS_RSP = __VCPU_REGS_RSP, 148 VCPU_REGS_RBP = __VCPU_REGS_RBP, 149 VCPU_REGS_RSI = __VCPU_REGS_RSI, 150 VCPU_REGS_RDI = __VCPU_REGS_RDI, 151#ifdef CONFIG_X86_64 152 VCPU_REGS_R8 = __VCPU_REGS_R8, 153 VCPU_REGS_R9 = __VCPU_REGS_R9, 154 VCPU_REGS_R10 = __VCPU_REGS_R10, 155 VCPU_REGS_R11 = __VCPU_REGS_R11, 156 VCPU_REGS_R12 = __VCPU_REGS_R12, 157 VCPU_REGS_R13 = __VCPU_REGS_R13, 158 VCPU_REGS_R14 = __VCPU_REGS_R14, 159 VCPU_REGS_R15 = __VCPU_REGS_R15, 160#endif 161 VCPU_REGS_RIP, 162 NR_VCPU_REGS, 163 164 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 165 VCPU_EXREG_CR0, 166 VCPU_EXREG_CR3, 167 VCPU_EXREG_CR4, 168 VCPU_EXREG_RFLAGS, 169 VCPU_EXREG_SEGMENTS, 170 VCPU_EXREG_EXIT_INFO_1, 171 VCPU_EXREG_EXIT_INFO_2, 172}; 173 174enum { 175 VCPU_SREG_ES, 176 VCPU_SREG_CS, 177 VCPU_SREG_SS, 178 VCPU_SREG_DS, 179 VCPU_SREG_FS, 180 VCPU_SREG_GS, 181 VCPU_SREG_TR, 182 VCPU_SREG_LDTR, 183}; 184 185enum exit_fastpath_completion { 186 EXIT_FASTPATH_NONE, 187 EXIT_FASTPATH_REENTER_GUEST, 188 EXIT_FASTPATH_EXIT_HANDLED, 189}; 190typedef enum exit_fastpath_completion fastpath_t; 191 192struct x86_emulate_ctxt; 193struct x86_exception; 194enum x86_intercept; 195enum x86_intercept_stage; 196 197#define KVM_NR_DB_REGS 4 198 199#define DR6_BD (1 << 13) 200#define DR6_BS (1 << 14) 201#define DR6_BT (1 << 15) 202#define DR6_RTM (1 << 16) 203#define DR6_FIXED_1 0xfffe0ff0 204#define DR6_INIT 0xffff0ff0 205#define DR6_VOLATILE 0x0001e00f 206 207#define DR7_BP_EN_MASK 0x000000ff 208#define DR7_GE (1 << 9) 209#define DR7_GD (1 << 13) 210#define DR7_FIXED_1 0x00000400 211#define DR7_VOLATILE 0xffff2bff 212 213#define PFERR_PRESENT_BIT 0 214#define PFERR_WRITE_BIT 1 215#define PFERR_USER_BIT 2 216#define PFERR_RSVD_BIT 3 217#define PFERR_FETCH_BIT 4 218#define PFERR_PK_BIT 5 219#define PFERR_GUEST_FINAL_BIT 32 220#define PFERR_GUEST_PAGE_BIT 33 221 222#define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 223#define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 224#define PFERR_USER_MASK (1U << PFERR_USER_BIT) 225#define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 226#define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 227#define PFERR_PK_MASK (1U << PFERR_PK_BIT) 228#define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 229#define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 230 231#define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 232 PFERR_WRITE_MASK | \ 233 PFERR_PRESENT_MASK) 234 235/* apic attention bits */ 236#define KVM_APIC_CHECK_VAPIC 0 237/* 238 * The following bit is set with PV-EOI, unset on EOI. 239 * We detect PV-EOI changes by guest by comparing 240 * this bit with PV-EOI in guest memory. 241 * See the implementation in apic_update_pv_eoi. 242 */ 243#define KVM_APIC_PV_EOI_PENDING 1 244 245struct kvm_kernel_irq_routing_entry; 246 247/* 248 * the pages used as guest page table on soft mmu are tracked by 249 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 250 * by indirect shadow page can not be more than 15 bits. 251 * 252 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access, 253 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 254 */ 255union kvm_mmu_page_role { 256 u32 word; 257 struct { 258 unsigned level:4; 259 unsigned gpte_is_8_bytes:1; 260 unsigned quadrant:2; 261 unsigned direct:1; 262 unsigned access:3; 263 unsigned invalid:1; 264 unsigned nxe:1; 265 unsigned cr0_wp:1; 266 unsigned smep_andnot_wp:1; 267 unsigned smap_andnot_wp:1; 268 unsigned ad_disabled:1; 269 unsigned guest_mode:1; 270 unsigned :6; 271 272 /* 273 * This is left at the top of the word so that 274 * kvm_memslots_for_spte_role can extract it with a 275 * simple shift. While there is room, give it a whole 276 * byte so it is also faster to load it from memory. 277 */ 278 unsigned smm:8; 279 }; 280}; 281 282union kvm_mmu_extended_role { 283/* 284 * This structure complements kvm_mmu_page_role caching everything needed for 285 * MMU configuration. If nothing in both these structures changed, MMU 286 * re-configuration can be skipped. @valid bit is set on first usage so we don't 287 * treat all-zero structure as valid data. 288 */ 289 u32 word; 290 struct { 291 unsigned int valid:1; 292 unsigned int execonly:1; 293 unsigned int cr0_pg:1; 294 unsigned int cr4_pae:1; 295 unsigned int cr4_pse:1; 296 unsigned int cr4_pke:1; 297 unsigned int cr4_smap:1; 298 unsigned int cr4_smep:1; 299 unsigned int cr4_la57:1; 300 unsigned int maxphyaddr:6; 301 }; 302}; 303 304union kvm_mmu_role { 305 u64 as_u64; 306 struct { 307 union kvm_mmu_page_role base; 308 union kvm_mmu_extended_role ext; 309 }; 310}; 311 312struct kvm_rmap_head { 313 unsigned long val; 314}; 315 316struct kvm_pio_request { 317 unsigned long linear_rip; 318 unsigned long count; 319 int in; 320 int port; 321 int size; 322}; 323 324#define PT64_ROOT_MAX_LEVEL 5 325 326struct rsvd_bits_validate { 327 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 328 u64 bad_mt_xwr; 329}; 330 331struct kvm_mmu_root_info { 332 gpa_t pgd; 333 hpa_t hpa; 334}; 335 336#define KVM_MMU_ROOT_INFO_INVALID \ 337 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE }) 338 339#define KVM_MMU_NUM_PREV_ROOTS 3 340 341struct kvm_mmu_page; 342 343/* 344 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 345 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 346 * current mmu mode. 347 */ 348struct kvm_mmu { 349 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu); 350 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 351 int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err, 352 bool prefault); 353 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 354 struct x86_exception *fault); 355 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa, 356 u32 access, struct x86_exception *exception); 357 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 358 struct x86_exception *exception); 359 int (*sync_page)(struct kvm_vcpu *vcpu, 360 struct kvm_mmu_page *sp); 361 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 362 hpa_t root_hpa; 363 gpa_t root_pgd; 364 union kvm_mmu_role mmu_role; 365 u8 root_level; 366 u8 shadow_root_level; 367 u8 ept_ad; 368 bool direct_map; 369 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 370 371 /* 372 * Bitmap; bit set = permission fault 373 * Byte index: page fault error code [4:1] 374 * Bit index: pte permissions in ACC_* format 375 */ 376 u8 permissions[16]; 377 378 /* 379 * The pkru_mask indicates if protection key checks are needed. It 380 * consists of 16 domains indexed by page fault error code bits [4:1], 381 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 382 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 383 */ 384 u32 pkru_mask; 385 386 u64 *pae_root; 387 u64 *lm_root; 388 389 /* 390 * check zero bits on shadow page table entries, these 391 * bits include not only hardware reserved bits but also 392 * the bits spte never used. 393 */ 394 struct rsvd_bits_validate shadow_zero_check; 395 396 struct rsvd_bits_validate guest_rsvd_check; 397 398 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 399 u8 last_nonleaf_level; 400 401 bool nx; 402 403 u64 pdptrs[4]; /* pae */ 404}; 405 406struct kvm_tlb_range { 407 u64 start_gfn; 408 u64 pages; 409}; 410 411enum pmc_type { 412 KVM_PMC_GP = 0, 413 KVM_PMC_FIXED, 414}; 415 416struct kvm_pmc { 417 enum pmc_type type; 418 u8 idx; 419 u64 counter; 420 u64 eventsel; 421 struct perf_event *perf_event; 422 struct kvm_vcpu *vcpu; 423 /* 424 * eventsel value for general purpose counters, 425 * ctrl value for fixed counters. 426 */ 427 u64 current_config; 428}; 429 430struct kvm_pmu { 431 unsigned nr_arch_gp_counters; 432 unsigned nr_arch_fixed_counters; 433 unsigned available_event_types; 434 u64 fixed_ctr_ctrl; 435 u64 fixed_ctr_ctrl_mask; 436 u64 global_ctrl; 437 u64 global_status; 438 u64 global_ovf_ctrl; 439 u64 counter_bitmask[2]; 440 u64 global_ctrl_mask; 441 u64 global_ovf_ctrl_mask; 442 u64 reserved_bits; 443 u64 raw_event_mask; 444 u8 version; 445 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 446 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 447 struct irq_work irq_work; 448 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX); 449 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX); 450 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX); 451 452 /* 453 * The gate to release perf_events not marked in 454 * pmc_in_use only once in a vcpu time slice. 455 */ 456 bool need_cleanup; 457 458 /* 459 * The total number of programmed perf_events and it helps to avoid 460 * redundant check before cleanup if guest don't use vPMU at all. 461 */ 462 u8 event_count; 463}; 464 465struct kvm_pmu_ops; 466 467enum { 468 KVM_DEBUGREG_BP_ENABLED = 1, 469 KVM_DEBUGREG_WONT_EXIT = 2, 470 KVM_DEBUGREG_RELOAD = 4, 471}; 472 473struct kvm_mtrr_range { 474 u64 base; 475 u64 mask; 476 struct list_head node; 477}; 478 479struct kvm_mtrr { 480 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 481 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 482 u64 deftype; 483 484 struct list_head head; 485}; 486 487/* Hyper-V SynIC timer */ 488struct kvm_vcpu_hv_stimer { 489 struct hrtimer timer; 490 int index; 491 union hv_stimer_config config; 492 u64 count; 493 u64 exp_time; 494 struct hv_message msg; 495 bool msg_pending; 496}; 497 498/* Hyper-V synthetic interrupt controller (SynIC)*/ 499struct kvm_vcpu_hv_synic { 500 u64 version; 501 u64 control; 502 u64 msg_page; 503 u64 evt_page; 504 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 505 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 506 DECLARE_BITMAP(auto_eoi_bitmap, 256); 507 DECLARE_BITMAP(vec_bitmap, 256); 508 bool active; 509 bool dont_zero_synic_pages; 510}; 511 512/* Hyper-V per vcpu emulation context */ 513struct kvm_vcpu_hv { 514 u32 vp_index; 515 u64 hv_vapic; 516 s64 runtime_offset; 517 struct kvm_vcpu_hv_synic synic; 518 struct kvm_hyperv_exit exit; 519 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 520 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 521 cpumask_t tlb_flush; 522}; 523 524struct kvm_vcpu_arch { 525 /* 526 * rip and regs accesses must go through 527 * kvm_{register,rip}_{read,write} functions. 528 */ 529 unsigned long regs[NR_VCPU_REGS]; 530 u32 regs_avail; 531 u32 regs_dirty; 532 533 unsigned long cr0; 534 unsigned long cr0_guest_owned_bits; 535 unsigned long cr2; 536 unsigned long cr3; 537 unsigned long cr4; 538 unsigned long cr4_guest_owned_bits; 539 unsigned long cr4_guest_rsvd_bits; 540 unsigned long cr8; 541 u32 host_pkru; 542 u32 pkru; 543 u32 hflags; 544 u64 efer; 545 u64 apic_base; 546 struct kvm_lapic *apic; /* kernel irqchip context */ 547 bool apicv_active; 548 bool load_eoi_exitmap_pending; 549 DECLARE_BITMAP(ioapic_handled_vectors, 256); 550 unsigned long apic_attention; 551 int32_t apic_arb_prio; 552 int mp_state; 553 u64 ia32_misc_enable_msr; 554 u64 smbase; 555 u64 smi_count; 556 bool at_instruction_boundary; 557 bool tpr_access_reporting; 558 bool xsaves_enabled; 559 u64 ia32_xss; 560 u64 microcode_version; 561 u64 arch_capabilities; 562 u64 perf_capabilities; 563 564 /* 565 * Paging state of the vcpu 566 * 567 * If the vcpu runs in guest mode with two level paging this still saves 568 * the paging mode of the l1 guest. This context is always used to 569 * handle faults. 570 */ 571 struct kvm_mmu *mmu; 572 573 /* Non-nested MMU for L1 */ 574 struct kvm_mmu root_mmu; 575 576 /* L1 MMU when running nested */ 577 struct kvm_mmu guest_mmu; 578 579 /* 580 * Paging state of an L2 guest (used for nested npt) 581 * 582 * This context will save all necessary information to walk page tables 583 * of an L2 guest. This context is only initialized for page table 584 * walking and not for faulting since we never handle l2 page faults on 585 * the host. 586 */ 587 struct kvm_mmu nested_mmu; 588 589 /* 590 * Pointer to the mmu context currently used for 591 * gva_to_gpa translations. 592 */ 593 struct kvm_mmu *walk_mmu; 594 595 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 596 struct kvm_mmu_memory_cache mmu_shadow_page_cache; 597 struct kvm_mmu_memory_cache mmu_gfn_array_cache; 598 struct kvm_mmu_memory_cache mmu_page_header_cache; 599 600 /* 601 * QEMU userspace and the guest each have their own FPU state. 602 * In vcpu_run, we switch between the user and guest FPU contexts. 603 * While running a VCPU, the VCPU thread will have the guest FPU 604 * context. 605 * 606 * Note that while the PKRU state lives inside the fpu registers, 607 * it is switched out separately at VMENTER and VMEXIT time. The 608 * "guest_fpu" state here contains the guest FPU context, with the 609 * host PRKU bits. 610 */ 611 struct fpu *user_fpu; 612 struct fpu *guest_fpu; 613 614 u64 xcr0; 615 u64 guest_supported_xcr0; 616 617 struct kvm_pio_request pio; 618 void *pio_data; 619 620 u8 event_exit_inst_len; 621 622 struct kvm_queued_exception { 623 bool pending; 624 bool injected; 625 bool has_error_code; 626 u8 nr; 627 u32 error_code; 628 unsigned long payload; 629 bool has_payload; 630 u8 nested_apf; 631 } exception; 632 633 struct kvm_queued_interrupt { 634 bool injected; 635 bool soft; 636 u8 nr; 637 } interrupt; 638 639 int halt_request; /* real mode on Intel only */ 640 641 int cpuid_nent; 642 struct kvm_cpuid_entry2 *cpuid_entries; 643 644 unsigned long cr3_lm_rsvd_bits; 645 int maxphyaddr; 646 int max_tdp_level; 647 648 /* emulate context */ 649 650 struct x86_emulate_ctxt *emulate_ctxt; 651 bool emulate_regs_need_sync_to_vcpu; 652 bool emulate_regs_need_sync_from_vcpu; 653 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 654 655 gpa_t time; 656 struct pvclock_vcpu_time_info hv_clock; 657 unsigned int hw_tsc_khz; 658 struct gfn_to_hva_cache pv_time; 659 bool pv_time_enabled; 660 /* set guest stopped flag in pvclock flags field */ 661 bool pvclock_set_guest_stopped_request; 662 663 struct { 664 u8 preempted; 665 u64 msr_val; 666 u64 last_steal; 667 struct gfn_to_hva_cache cache; 668 } st; 669 670 u64 l1_tsc_offset; 671 u64 tsc_offset; 672 u64 last_guest_tsc; 673 u64 last_host_tsc; 674 u64 tsc_offset_adjustment; 675 u64 this_tsc_nsec; 676 u64 this_tsc_write; 677 u64 this_tsc_generation; 678 bool tsc_catchup; 679 bool tsc_always_catchup; 680 s8 virtual_tsc_shift; 681 u32 virtual_tsc_mult; 682 u32 virtual_tsc_khz; 683 s64 ia32_tsc_adjust_msr; 684 u64 msr_ia32_power_ctl; 685 u64 tsc_scaling_ratio; 686 687 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 688 unsigned nmi_pending; /* NMI queued after currently running handler */ 689 bool nmi_injected; /* Trying to inject an NMI this entry */ 690 bool smi_pending; /* SMI queued after currently running handler */ 691 692 struct kvm_mtrr mtrr_state; 693 u64 pat; 694 695 unsigned switch_db_regs; 696 unsigned long db[KVM_NR_DB_REGS]; 697 unsigned long dr6; 698 unsigned long dr7; 699 unsigned long eff_db[KVM_NR_DB_REGS]; 700 unsigned long guest_debug_dr7; 701 u64 msr_platform_info; 702 u64 msr_misc_features_enables; 703 704 u64 mcg_cap; 705 u64 mcg_status; 706 u64 mcg_ctl; 707 u64 mcg_ext_ctl; 708 u64 *mce_banks; 709 710 /* Cache MMIO info */ 711 u64 mmio_gva; 712 unsigned mmio_access; 713 gfn_t mmio_gfn; 714 u64 mmio_gen; 715 716 struct kvm_pmu pmu; 717 718 /* used for guest single stepping over the given code position */ 719 unsigned long singlestep_rip; 720 721 struct kvm_vcpu_hv hyperv; 722 723 cpumask_var_t wbinvd_dirty_mask; 724 725 unsigned long last_retry_eip; 726 unsigned long last_retry_addr; 727 728 struct { 729 bool halted; 730 gfn_t gfns[ASYNC_PF_PER_VCPU]; 731 struct gfn_to_hva_cache data; 732 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */ 733 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */ 734 u16 vec; 735 u32 id; 736 bool send_user_only; 737 u32 host_apf_flags; 738 unsigned long nested_apf_token; 739 bool delivery_as_pf_vmexit; 740 bool pageready_pending; 741 } apf; 742 743 /* OSVW MSRs (AMD only) */ 744 struct { 745 u64 length; 746 u64 status; 747 } osvw; 748 749 struct { 750 u64 msr_val; 751 struct gfn_to_hva_cache data; 752 } pv_eoi; 753 754 u64 msr_kvm_poll_control; 755 756 /* 757 * Indicates the guest is trying to write a gfn that contains one or 758 * more of the PTEs used to translate the write itself, i.e. the access 759 * is changing its own translation in the guest page tables. KVM exits 760 * to userspace if emulation of the faulting instruction fails and this 761 * flag is set, as KVM cannot make forward progress. 762 * 763 * If emulation fails for a write to guest page tables, KVM unprotects 764 * (zaps) the shadow page for the target gfn and resumes the guest to 765 * retry the non-emulatable instruction (on hardware). Unprotecting the 766 * gfn doesn't allow forward progress for a self-changing access because 767 * doing so also zaps the translation for the gfn, i.e. retrying the 768 * instruction will hit a !PRESENT fault, which results in a new shadow 769 * page and sends KVM back to square one. 770 */ 771 bool write_fault_to_shadow_pgtable; 772 773 /* set at EPT violation at this point */ 774 unsigned long exit_qualification; 775 776 /* pv related host specific info */ 777 struct { 778 bool pv_unhalted; 779 } pv; 780 781 int pending_ioapic_eoi; 782 int pending_external_vector; 783 784 /* be preempted when it's in kernel-mode(cpl=0) */ 785 bool preempted_in_kernel; 786 787 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 788 bool l1tf_flush_l1d; 789 790 /* Host CPU on which VM-entry was most recently attempted */ 791 unsigned int last_vmentry_cpu; 792 793 /* AMD MSRC001_0015 Hardware Configuration */ 794 u64 msr_hwcr; 795 796 /* pv related cpuid info */ 797 struct { 798 /* 799 * value of the eax register in the KVM_CPUID_FEATURES CPUID 800 * leaf. 801 */ 802 u32 features; 803 804 /* 805 * indicates whether pv emulation should be disabled if features 806 * are not present in the guest's cpuid 807 */ 808 bool enforce; 809 } pv_cpuid; 810}; 811 812struct kvm_lpage_info { 813 int disallow_lpage; 814}; 815 816struct kvm_arch_memory_slot { 817 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 818 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 819 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 820}; 821 822/* 823 * We use as the mode the number of bits allocated in the LDR for the 824 * logical processor ID. It happens that these are all powers of two. 825 * This makes it is very easy to detect cases where the APICs are 826 * configured for multiple modes; in that case, we cannot use the map and 827 * hence cannot use kvm_irq_delivery_to_apic_fast either. 828 */ 829#define KVM_APIC_MODE_XAPIC_CLUSTER 4 830#define KVM_APIC_MODE_XAPIC_FLAT 8 831#define KVM_APIC_MODE_X2APIC 16 832 833struct kvm_apic_map { 834 struct rcu_head rcu; 835 u8 mode; 836 u32 max_apic_id; 837 union { 838 struct kvm_lapic *xapic_flat_map[8]; 839 struct kvm_lapic *xapic_cluster_map[16][4]; 840 }; 841 struct kvm_lapic *phys_map[]; 842}; 843 844/* Hyper-V synthetic debugger (SynDbg)*/ 845struct kvm_hv_syndbg { 846 struct { 847 u64 control; 848 u64 status; 849 u64 send_page; 850 u64 recv_page; 851 u64 pending_page; 852 } control; 853 u64 options; 854}; 855 856/* Hyper-V emulation context */ 857struct kvm_hv { 858 struct mutex hv_lock; 859 u64 hv_guest_os_id; 860 u64 hv_hypercall; 861 u64 hv_tsc_page; 862 863 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 864 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 865 u64 hv_crash_ctl; 866 867 struct ms_hyperv_tsc_page tsc_ref; 868 869 struct idr conn_to_evt; 870 871 u64 hv_reenlightenment_control; 872 u64 hv_tsc_emulation_control; 873 u64 hv_tsc_emulation_status; 874 875 /* How many vCPUs have VP index != vCPU index */ 876 atomic_t num_mismatched_vp_indexes; 877 878 struct hv_partition_assist_pg *hv_pa_pg; 879 struct kvm_hv_syndbg hv_syndbg; 880}; 881 882struct msr_bitmap_range { 883 u32 flags; 884 u32 nmsrs; 885 u32 base; 886 unsigned long *bitmap; 887}; 888 889enum kvm_irqchip_mode { 890 KVM_IRQCHIP_NONE, 891 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 892 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 893}; 894 895struct kvm_x86_msr_filter { 896 u8 count; 897 bool default_allow:1; 898 struct msr_bitmap_range ranges[16]; 899}; 900 901#define APICV_INHIBIT_REASON_DISABLE 0 902#define APICV_INHIBIT_REASON_HYPERV 1 903#define APICV_INHIBIT_REASON_NESTED 2 904#define APICV_INHIBIT_REASON_IRQWIN 3 905#define APICV_INHIBIT_REASON_PIT_REINJ 4 906#define APICV_INHIBIT_REASON_X2APIC 5 907 908struct kvm_arch { 909 unsigned long n_used_mmu_pages; 910 unsigned long n_requested_mmu_pages; 911 unsigned long n_max_mmu_pages; 912 unsigned int indirect_shadow_pages; 913 u8 mmu_valid_gen; 914 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 915 /* 916 * Hash table of struct kvm_mmu_page. 917 */ 918 struct list_head active_mmu_pages; 919 struct list_head zapped_obsolete_pages; 920 struct list_head lpage_disallowed_mmu_pages; 921 struct kvm_page_track_notifier_node mmu_sp_tracker; 922 struct kvm_page_track_notifier_head track_notifier_head; 923 924 struct list_head assigned_dev_head; 925 struct iommu_domain *iommu_domain; 926 bool iommu_noncoherent; 927#define __KVM_HAVE_ARCH_NONCOHERENT_DMA 928 atomic_t noncoherent_dma_count; 929#define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 930 atomic_t assigned_device_count; 931 struct kvm_pic *vpic; 932 struct kvm_ioapic *vioapic; 933 struct kvm_pit *vpit; 934 atomic_t vapics_in_nmi_mode; 935 struct mutex apic_map_lock; 936 struct kvm_apic_map *apic_map; 937 atomic_t apic_map_dirty; 938 939 bool apic_access_page_done; 940 unsigned long apicv_inhibit_reasons; 941 942 gpa_t wall_clock; 943 944 bool mwait_in_guest; 945 bool hlt_in_guest; 946 bool pause_in_guest; 947 bool cstate_in_guest; 948 949 unsigned long irq_sources_bitmap; 950 s64 kvmclock_offset; 951 raw_spinlock_t tsc_write_lock; 952 u64 last_tsc_nsec; 953 u64 last_tsc_write; 954 u32 last_tsc_khz; 955 u64 cur_tsc_nsec; 956 u64 cur_tsc_write; 957 u64 cur_tsc_offset; 958 u64 cur_tsc_generation; 959 int nr_vcpus_matched_tsc; 960 961 spinlock_t pvclock_gtod_sync_lock; 962 bool use_master_clock; 963 u64 master_kernel_ns; 964 u64 master_cycle_now; 965 struct delayed_work kvmclock_update_work; 966 struct delayed_work kvmclock_sync_work; 967 968 struct kvm_xen_hvm_config xen_hvm_config; 969 970 /* reads protected by irq_srcu, writes by irq_lock */ 971 struct hlist_head mask_notifier_list; 972 973 struct kvm_hv hyperv; 974 975 #ifdef CONFIG_KVM_MMU_AUDIT 976 int audit_point; 977 #endif 978 979 bool backwards_tsc_observed; 980 bool boot_vcpu_runs_old_kvmclock; 981 u32 bsp_vcpu_id; 982 983 u64 disabled_quirks; 984 985 enum kvm_irqchip_mode irqchip_mode; 986 u8 nr_reserved_ioapic_pins; 987 988 bool disabled_lapic_found; 989 990 bool x2apic_format; 991 bool x2apic_broadcast_quirk_disabled; 992 993 bool guest_can_read_msr_platform_info; 994 bool exception_payload_enabled; 995 996 bool bus_lock_detection_enabled; 997 998 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */ 999 u32 user_space_msr_mask; 1000 1001 struct kvm_x86_msr_filter __rcu *msr_filter; 1002 1003 struct kvm_pmu_event_filter *pmu_event_filter; 1004 struct task_struct *nx_lpage_recovery_thread; 1005 1006 /* 1007 * Whether the TDP MMU is enabled for this VM. This contains a 1008 * snapshot of the TDP MMU module parameter from when the VM was 1009 * created and remains unchanged for the life of the VM. If this is 1010 * true, TDP MMU handler functions will run for various MMU 1011 * operations. 1012 */ 1013 bool tdp_mmu_enabled; 1014 1015 /* List of struct tdp_mmu_pages being used as roots */ 1016 struct list_head tdp_mmu_roots; 1017 /* List of struct tdp_mmu_pages not being used as roots */ 1018 struct list_head tdp_mmu_pages; 1019}; 1020 1021struct kvm_vm_stat { 1022 ulong mmu_shadow_zapped; 1023 ulong mmu_pte_write; 1024 ulong mmu_pde_zapped; 1025 ulong mmu_flooded; 1026 ulong mmu_recycled; 1027 ulong mmu_cache_miss; 1028 ulong mmu_unsync; 1029 ulong remote_tlb_flush; 1030 ulong lpages; 1031 ulong nx_lpage_splits; 1032 ulong max_mmu_page_hash_collisions; 1033}; 1034 1035struct kvm_vcpu_stat { 1036 u64 pf_fixed; 1037 u64 pf_guest; 1038 u64 tlb_flush; 1039 u64 invlpg; 1040 1041 u64 exits; 1042 u64 io_exits; 1043 u64 mmio_exits; 1044 u64 signal_exits; 1045 u64 irq_window_exits; 1046 u64 nmi_window_exits; 1047 u64 l1d_flush; 1048 u64 halt_exits; 1049 u64 halt_successful_poll; 1050 u64 halt_attempted_poll; 1051 u64 halt_poll_invalid; 1052 u64 halt_wakeup; 1053 u64 request_irq_exits; 1054 u64 irq_exits; 1055 u64 host_state_reload; 1056 u64 fpu_reload; 1057 u64 insn_emulation; 1058 u64 insn_emulation_fail; 1059 u64 hypercalls; 1060 u64 irq_injections; 1061 u64 nmi_injections; 1062 u64 req_event; 1063 u64 halt_poll_success_ns; 1064 u64 halt_poll_fail_ns; 1065 u64 preemption_reported; 1066 u64 preemption_other; 1067}; 1068 1069struct x86_instruction_info; 1070 1071struct msr_data { 1072 bool host_initiated; 1073 u32 index; 1074 u64 data; 1075}; 1076 1077struct kvm_lapic_irq { 1078 u32 vector; 1079 u16 delivery_mode; 1080 u16 dest_mode; 1081 bool level; 1082 u16 trig_mode; 1083 u32 shorthand; 1084 u32 dest_id; 1085 bool msi_redir_hint; 1086}; 1087 1088static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical) 1089{ 1090 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL; 1091} 1092 1093struct kvm_x86_ops { 1094 int (*hardware_enable)(void); 1095 void (*hardware_disable)(void); 1096 void (*hardware_unsetup)(void); 1097 bool (*cpu_has_accelerated_tpr)(void); 1098 bool (*has_emulated_msr)(u32 index); 1099 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); 1100 1101 unsigned int vm_size; 1102 int (*vm_init)(struct kvm *kvm); 1103 void (*vm_destroy)(struct kvm *kvm); 1104 1105 /* Create, but do not attach this VCPU */ 1106 int (*vcpu_create)(struct kvm_vcpu *vcpu); 1107 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1108 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1109 1110 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 1111 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1112 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1113 1114 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu); 1115 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1116 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1117 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1118 void (*get_segment)(struct kvm_vcpu *vcpu, 1119 struct kvm_segment *var, int seg); 1120 int (*get_cpl)(struct kvm_vcpu *vcpu); 1121 void (*set_segment)(struct kvm_vcpu *vcpu, 1122 struct kvm_segment *var, int seg); 1123 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1124 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1125 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0); 1126 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1127 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1128 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1129 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1130 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1131 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1132 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1133 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1134 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1135 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1136 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1137 1138 void (*tlb_flush_all)(struct kvm_vcpu *vcpu); 1139 void (*tlb_flush_current)(struct kvm_vcpu *vcpu); 1140 int (*tlb_remote_flush)(struct kvm *kvm); 1141 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1142 struct kvm_tlb_range *range); 1143 1144 /* 1145 * Flush any TLB entries associated with the given GVA. 1146 * Does not need to flush GPA->HPA mappings. 1147 * Can potentially get non-canonical addresses through INVLPGs, which 1148 * the implementation may choose to ignore if appropriate. 1149 */ 1150 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1151 1152 /* 1153 * Flush any TLB entries created by the guest. Like tlb_flush_gva(), 1154 * does not need to flush GPA->HPA mappings. 1155 */ 1156 void (*tlb_flush_guest)(struct kvm_vcpu *vcpu); 1157 1158 enum exit_fastpath_completion (*run)(struct kvm_vcpu *vcpu); 1159 int (*handle_exit)(struct kvm_vcpu *vcpu, 1160 enum exit_fastpath_completion exit_fastpath); 1161 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1162 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu); 1163 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1164 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1165 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1166 unsigned char *hypercall_addr); 1167 void (*set_irq)(struct kvm_vcpu *vcpu); 1168 void (*set_nmi)(struct kvm_vcpu *vcpu); 1169 void (*queue_exception)(struct kvm_vcpu *vcpu); 1170 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1171 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1172 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1173 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1174 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1175 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1176 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1177 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1178 bool (*check_apicv_inhibit_reasons)(ulong bit); 1179 void (*pre_update_apicv_exec_ctrl)(struct kvm *kvm, bool activate); 1180 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1181 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1182 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1183 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1184 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1185 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1186 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu); 1187 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1188 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1189 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1190 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1191 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1192 1193 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, unsigned long pgd, 1194 int pgd_level); 1195 1196 bool (*has_wbinvd_exit)(void); 1197 1198 /* Returns actual tsc_offset set in active VMCS */ 1199 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1200 1201 /* 1202 * Retrieve somewhat arbitrary exit information. Intended to be used 1203 * only from within tracepoints to avoid VMREADs when tracing is off. 1204 */ 1205 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2, 1206 u32 *exit_int_info, u32 *exit_int_info_err_code); 1207 1208 int (*check_intercept)(struct kvm_vcpu *vcpu, 1209 struct x86_instruction_info *info, 1210 enum x86_intercept_stage stage, 1211 struct x86_exception *exception); 1212 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu); 1213 1214 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1215 1216 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1217 1218 /* 1219 * Arch-specific dirty logging hooks. These hooks are only supposed to 1220 * be valid if the specific arch has hardware-accelerated dirty logging 1221 * mechanism. Currently only for PML on VMX. 1222 * 1223 * - slot_enable_log_dirty: 1224 * called when enabling log dirty mode for the slot. 1225 * - slot_disable_log_dirty: 1226 * called when disabling log dirty mode for the slot. 1227 * also called when slot is created with log dirty disabled. 1228 * - flush_log_dirty: 1229 * called before reporting dirty_bitmap to userspace. 1230 * - enable_log_dirty_pt_masked: 1231 * called when reenabling log dirty for the GFNs in the mask after 1232 * corresponding bits are cleared in slot->dirty_bitmap. 1233 */ 1234 void (*slot_enable_log_dirty)(struct kvm *kvm, 1235 struct kvm_memory_slot *slot); 1236 void (*slot_disable_log_dirty)(struct kvm *kvm, 1237 struct kvm_memory_slot *slot); 1238 void (*flush_log_dirty)(struct kvm *kvm); 1239 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 1240 struct kvm_memory_slot *slot, 1241 gfn_t offset, unsigned long mask); 1242 1243 /* pmu operations of sub-arch */ 1244 const struct kvm_pmu_ops *pmu_ops; 1245 const struct kvm_x86_nested_ops *nested_ops; 1246 1247 /* 1248 * Architecture specific hooks for vCPU blocking due to 1249 * HLT instruction. 1250 * Returns for .pre_block(): 1251 * - 0 means continue to block the vCPU. 1252 * - 1 means we cannot block the vCPU since some event 1253 * happens during this period, such as, 'ON' bit in 1254 * posted-interrupts descriptor is set. 1255 */ 1256 int (*pre_block)(struct kvm_vcpu *vcpu); 1257 void (*post_block)(struct kvm_vcpu *vcpu); 1258 1259 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1260 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1261 1262 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1263 uint32_t guest_irq, bool set); 1264 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1265 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); 1266 1267 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1268 bool *expired); 1269 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1270 1271 void (*setup_mce)(struct kvm_vcpu *vcpu); 1272 1273 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1274 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1275 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1276 void (*enable_smi_window)(struct kvm_vcpu *vcpu); 1277 1278 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1279 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1280 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1281 void (*guest_memory_reclaimed)(struct kvm *kvm); 1282 1283 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1284 1285 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, void *insn, int insn_len); 1286 1287 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu); 1288 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu); 1289 1290 void (*migrate_timers)(struct kvm_vcpu *vcpu); 1291 void (*msr_filter_changed)(struct kvm_vcpu *vcpu); 1292}; 1293 1294struct kvm_x86_nested_ops { 1295 void (*leave_nested)(struct kvm_vcpu *vcpu); 1296 int (*check_events)(struct kvm_vcpu *vcpu); 1297 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu); 1298 int (*get_state)(struct kvm_vcpu *vcpu, 1299 struct kvm_nested_state __user *user_kvm_nested_state, 1300 unsigned user_data_size); 1301 int (*set_state)(struct kvm_vcpu *vcpu, 1302 struct kvm_nested_state __user *user_kvm_nested_state, 1303 struct kvm_nested_state *kvm_state); 1304 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu); 1305 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa); 1306 1307 int (*enable_evmcs)(struct kvm_vcpu *vcpu, 1308 uint16_t *vmcs_version); 1309 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu); 1310}; 1311 1312struct kvm_x86_init_ops { 1313 int (*cpu_has_kvm_support)(void); 1314 int (*disabled_by_bios)(void); 1315 int (*check_processor_compatibility)(void); 1316 int (*hardware_setup)(void); 1317 bool (*intel_pt_intr_in_guest)(void); 1318 1319 struct kvm_x86_ops *runtime_ops; 1320}; 1321 1322struct kvm_arch_async_pf { 1323 u32 token; 1324 gfn_t gfn; 1325 unsigned long cr3; 1326 bool direct_map; 1327}; 1328 1329extern u64 __read_mostly host_efer; 1330extern bool __read_mostly allow_smaller_maxphyaddr; 1331extern struct kvm_x86_ops kvm_x86_ops; 1332 1333#define __KVM_HAVE_ARCH_VM_ALLOC 1334static inline struct kvm *kvm_arch_alloc_vm(void) 1335{ 1336 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO); 1337} 1338void kvm_arch_free_vm(struct kvm *kvm); 1339 1340#define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1341static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1342{ 1343 if (kvm_x86_ops.tlb_remote_flush && 1344 !kvm_x86_ops.tlb_remote_flush(kvm)) 1345 return 0; 1346 else 1347 return -ENOTSUPP; 1348} 1349 1350void __init kvm_mmu_x86_module_init(void); 1351int kvm_mmu_vendor_module_init(void); 1352void kvm_mmu_vendor_module_exit(void); 1353 1354void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1355int kvm_mmu_create(struct kvm_vcpu *vcpu); 1356void kvm_mmu_init_vm(struct kvm *kvm); 1357void kvm_mmu_uninit_vm(struct kvm *kvm); 1358void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1359 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 1360 u64 acc_track_mask, u64 me_mask); 1361 1362void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1363void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1364 struct kvm_memory_slot *memslot, 1365 int start_level); 1366void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1367 const struct kvm_memory_slot *memslot); 1368void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1369 struct kvm_memory_slot *memslot); 1370void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1371 struct kvm_memory_slot *memslot); 1372void kvm_mmu_slot_set_dirty(struct kvm *kvm, 1373 struct kvm_memory_slot *memslot); 1374void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1375 struct kvm_memory_slot *slot, 1376 gfn_t gfn_offset, unsigned long mask); 1377void kvm_mmu_zap_all(struct kvm *kvm); 1378void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1379unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm); 1380void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1381 1382int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1383bool pdptrs_changed(struct kvm_vcpu *vcpu); 1384 1385int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1386 const void *val, int bytes); 1387 1388struct kvm_irq_mask_notifier { 1389 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1390 int irq; 1391 struct hlist_node link; 1392}; 1393 1394void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1395 struct kvm_irq_mask_notifier *kimn); 1396void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1397 struct kvm_irq_mask_notifier *kimn); 1398void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1399 bool mask); 1400 1401extern bool tdp_enabled; 1402 1403u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1404 1405/* control of guest tsc rate supported? */ 1406extern bool kvm_has_tsc_control; 1407/* maximum supported tsc_khz for guests */ 1408extern u32 kvm_max_guest_tsc_khz; 1409/* number of bits of the fractional part of the TSC scaling ratio */ 1410extern u8 kvm_tsc_scaling_ratio_frac_bits; 1411/* maximum allowed value of TSC scaling ratio */ 1412extern u64 kvm_max_tsc_scaling_ratio; 1413/* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1414extern u64 kvm_default_tsc_scaling_ratio; 1415 1416extern u64 kvm_mce_cap_supported; 1417 1418/* 1419 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing 1420 * userspace I/O) to indicate that the emulation context 1421 * should be resued as is, i.e. skip initialization of 1422 * emulation context, instruction fetch and decode. 1423 * 1424 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware. 1425 * Indicates that only select instructions (tagged with 1426 * EmulateOnUD) should be emulated (to minimize the emulator 1427 * attack surface). See also EMULTYPE_TRAP_UD_FORCED. 1428 * 1429 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to 1430 * decode the instruction length. For use *only* by 1431 * kvm_x86_ops.skip_emulated_instruction() implementations. 1432 * 1433 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to 1434 * retry native execution under certain conditions, 1435 * Can only be set in conjunction with EMULTYPE_PF. 1436 * 1437 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was 1438 * triggered by KVM's magic "force emulation" prefix, 1439 * which is opt in via module param (off by default). 1440 * Bypasses EmulateOnUD restriction despite emulating 1441 * due to an intercepted #UD (see EMULTYPE_TRAP_UD). 1442 * Used to test the full emulator from userspace. 1443 * 1444 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware 1445 * backdoor emulation, which is opt in via module param. 1446 * VMware backoor emulation handles select instructions 1447 * and reinjects the #GP for all other cases. 1448 * 1449 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which 1450 * case the CR2/GPA value pass on the stack is valid. 1451 */ 1452#define EMULTYPE_NO_DECODE (1 << 0) 1453#define EMULTYPE_TRAP_UD (1 << 1) 1454#define EMULTYPE_SKIP (1 << 2) 1455#define EMULTYPE_ALLOW_RETRY_PF (1 << 3) 1456#define EMULTYPE_TRAP_UD_FORCED (1 << 4) 1457#define EMULTYPE_VMWARE_GP (1 << 5) 1458#define EMULTYPE_PF (1 << 6) 1459 1460int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1461int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1462 void *insn, int insn_len); 1463 1464void kvm_enable_efer_bits(u64); 1465bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1466int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated); 1467int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data); 1468int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data); 1469int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu); 1470int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu); 1471 1472int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1473int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1474int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1475int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1476int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1477 1478void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1479int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1480void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1481 1482int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1483 int reason, bool has_error_code, u32 error_code); 1484 1485int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1486int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1487int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1488int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1489int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1490int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1491unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1492void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1493void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1494int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1495 1496int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1497int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1498 1499unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1500void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1501bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1502 1503void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1504void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1505void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload); 1506void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1507void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1508void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1509bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu, 1510 struct x86_exception *fault); 1511int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1512 gfn_t gfn, void *data, int offset, int len, 1513 u32 access); 1514bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1515bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1516 1517static inline int __kvm_irq_line_state(unsigned long *irq_state, 1518 int irq_source_id, int level) 1519{ 1520 /* Logical OR for level trig interrupt */ 1521 if (level) 1522 __set_bit(irq_source_id, irq_state); 1523 else 1524 __clear_bit(irq_source_id, irq_state); 1525 1526 return !!(*irq_state); 1527} 1528 1529#define KVM_MMU_ROOT_CURRENT BIT(0) 1530#define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1531#define KVM_MMU_ROOTS_ALL (~0UL) 1532 1533int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1534void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1535 1536void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1537 1538void kvm_update_dr7(struct kvm_vcpu *vcpu); 1539 1540int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1541int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1542void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1543int kvm_mmu_load(struct kvm_vcpu *vcpu); 1544void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1545void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1546void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1547 ulong roots_to_free); 1548gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1549 struct x86_exception *exception); 1550gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1551 struct x86_exception *exception); 1552gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1553 struct x86_exception *exception); 1554gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1555 struct x86_exception *exception); 1556gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1557 struct x86_exception *exception); 1558 1559bool kvm_apicv_activated(struct kvm *kvm); 1560void kvm_apicv_init(struct kvm *kvm, bool enable); 1561void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); 1562void kvm_request_apicv_update(struct kvm *kvm, bool activate, 1563 unsigned long bit); 1564 1565int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1566 1567int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 1568 void *insn, int insn_len); 1569void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1570void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1571 gva_t gva, hpa_t root_hpa); 1572void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1573void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, bool skip_tlb_flush, 1574 bool skip_mmu_sync); 1575 1576void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level, 1577 int tdp_huge_page_level); 1578 1579static inline u16 kvm_read_ldt(void) 1580{ 1581 u16 ldt; 1582 asm("sldt %0" : "=g"(ldt)); 1583 return ldt; 1584} 1585 1586static inline void kvm_load_ldt(u16 sel) 1587{ 1588 asm("lldt %0" : : "rm"(sel)); 1589} 1590 1591#ifdef CONFIG_X86_64 1592static inline unsigned long read_msr(unsigned long msr) 1593{ 1594 u64 value; 1595 1596 rdmsrl(msr, value); 1597 return value; 1598} 1599#endif 1600 1601static inline u32 get_rdx_init_val(void) 1602{ 1603 return 0x600; /* P6 family */ 1604} 1605 1606static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1607{ 1608 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1609} 1610 1611#define TSS_IOPB_BASE_OFFSET 0x66 1612#define TSS_BASE_SIZE 0x68 1613#define TSS_IOPB_SIZE (65536 / 8) 1614#define TSS_REDIRECTION_SIZE (256 / 8) 1615#define RMODE_TSS_SIZE \ 1616 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1617 1618enum { 1619 TASK_SWITCH_CALL = 0, 1620 TASK_SWITCH_IRET = 1, 1621 TASK_SWITCH_JMP = 2, 1622 TASK_SWITCH_GATE = 3, 1623}; 1624 1625#define HF_GIF_MASK (1 << 0) 1626#define HF_NMI_MASK (1 << 3) 1627#define HF_IRET_MASK (1 << 4) 1628#define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1629#define HF_SMM_MASK (1 << 6) 1630#define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1631 1632#define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1633#define KVM_ADDRESS_SPACE_NUM 2 1634 1635#define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1636#define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1637 1638asmlinkage void kvm_spurious_fault(void); 1639 1640/* 1641 * Hardware virtualization extension instructions may fault if a 1642 * reboot turns off virtualization while processes are running. 1643 * Usually after catching the fault we just panic; during reboot 1644 * instead the instruction is ignored. 1645 */ 1646#define __kvm_handle_fault_on_reboot(insn) \ 1647 "666: \n\t" \ 1648 insn "\n\t" \ 1649 "jmp 668f \n\t" \ 1650 "667: \n\t" \ 1651 "1: \n\t" \ 1652 ".pushsection .discard.instr_begin \n\t" \ 1653 ".long 1b - . \n\t" \ 1654 ".popsection \n\t" \ 1655 "call kvm_spurious_fault \n\t" \ 1656 "1: \n\t" \ 1657 ".pushsection .discard.instr_end \n\t" \ 1658 ".long 1b - . \n\t" \ 1659 ".popsection \n\t" \ 1660 "668: \n\t" \ 1661 _ASM_EXTABLE(666b, 667b) 1662 1663#define KVM_ARCH_WANT_MMU_NOTIFIER 1664int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, 1665 unsigned flags); 1666int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1667int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1668int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1669int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1670int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1671int kvm_cpu_has_extint(struct kvm_vcpu *v); 1672int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1673int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1674void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1675void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1676 1677int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1678 unsigned long ipi_bitmap_high, u32 min, 1679 unsigned long icr, int op_64_bit); 1680 1681void kvm_define_user_return_msr(unsigned index, u32 msr); 1682int kvm_probe_user_return_msr(u32 msr); 1683int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask); 1684 1685u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1686u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1687 1688unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1689bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1690 1691void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1692void kvm_make_scan_ioapic_request(struct kvm *kvm); 1693void kvm_make_scan_ioapic_request_mask(struct kvm *kvm, 1694 unsigned long *vcpu_bitmap); 1695 1696bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1697 struct kvm_async_pf *work); 1698void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1699 struct kvm_async_pf *work); 1700void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1701 struct kvm_async_pf *work); 1702void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu); 1703bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu); 1704extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1705 1706int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1707int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1708void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1709 1710int kvm_is_in_guest(void); 1711 1712int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1713bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1714bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1715 1716bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1717 struct kvm_vcpu **dest_vcpu); 1718 1719void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1720 struct kvm_lapic_irq *irq); 1721 1722static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) 1723{ 1724 /* We can only post Fixed and LowPrio IRQs */ 1725 return (irq->delivery_mode == APIC_DM_FIXED || 1726 irq->delivery_mode == APIC_DM_LOWEST); 1727} 1728 1729static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1730{ 1731 if (kvm_x86_ops.vcpu_blocking) 1732 kvm_x86_ops.vcpu_blocking(vcpu); 1733} 1734 1735static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1736{ 1737 if (kvm_x86_ops.vcpu_unblocking) 1738 kvm_x86_ops.vcpu_unblocking(vcpu); 1739} 1740 1741static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1742 1743static inline int kvm_cpu_get_apicid(int mps_cpu) 1744{ 1745#ifdef CONFIG_X86_LOCAL_APIC 1746 return default_cpu_present_to_apicid(mps_cpu); 1747#else 1748 WARN_ON_ONCE(1); 1749 return BAD_APICID; 1750#endif 1751} 1752 1753#define put_smstate(type, buf, offset, val) \ 1754 *(type *)((buf) + (offset) - 0x7e00) = val 1755 1756#define GET_SMSTATE(type, buf, offset) \ 1757 (*(type *)((buf) + (offset) - 0x7e00)) 1758 1759#endif /* _ASM_X86_KVM_HOST_H */ 1760