1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * X86 specific Hyper-V initialization code.
4 *
5 * Copyright (C) 2016, Microsoft, Inc.
6 *
7 * Author : K. Y. Srinivasan <kys@microsoft.com>
8 */
9
10#include <linux/acpi.h>
11#include <linux/efi.h>
12#include <linux/types.h>
13#include <asm/apic.h>
14#include <asm/desc.h>
15#include <asm/hypervisor.h>
16#include <asm/hyperv-tlfs.h>
17#include <asm/mshyperv.h>
18#include <asm/idtentry.h>
19#include <linux/kexec.h>
20#include <linux/version.h>
21#include <linux/vmalloc.h>
22#include <linux/mm.h>
23#include <linux/hyperv.h>
24#include <linux/slab.h>
25#include <linux/kernel.h>
26#include <linux/cpuhotplug.h>
27#include <linux/syscore_ops.h>
28#include <clocksource/hyperv_timer.h>
29
30int hyperv_init_cpuhp;
31
32void *hv_hypercall_pg;
33EXPORT_SYMBOL_GPL(hv_hypercall_pg);
34
35/* Storage to save the hypercall page temporarily for hibernation */
36static void *hv_hypercall_pg_saved;
37
38u32 *hv_vp_index;
39EXPORT_SYMBOL_GPL(hv_vp_index);
40
41struct hv_vp_assist_page **hv_vp_assist_page;
42EXPORT_SYMBOL_GPL(hv_vp_assist_page);
43
44void  __percpu **hyperv_pcpu_input_arg;
45EXPORT_SYMBOL_GPL(hyperv_pcpu_input_arg);
46
47u32 hv_max_vp_index;
48EXPORT_SYMBOL_GPL(hv_max_vp_index);
49
50void *hv_alloc_hyperv_page(void)
51{
52	BUILD_BUG_ON(PAGE_SIZE != HV_HYP_PAGE_SIZE);
53
54	return (void *)__get_free_page(GFP_KERNEL);
55}
56EXPORT_SYMBOL_GPL(hv_alloc_hyperv_page);
57
58void *hv_alloc_hyperv_zeroed_page(void)
59{
60        BUILD_BUG_ON(PAGE_SIZE != HV_HYP_PAGE_SIZE);
61
62        return (void *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
63}
64EXPORT_SYMBOL_GPL(hv_alloc_hyperv_zeroed_page);
65
66void hv_free_hyperv_page(unsigned long addr)
67{
68	free_page(addr);
69}
70EXPORT_SYMBOL_GPL(hv_free_hyperv_page);
71
72static int hv_cpu_init(unsigned int cpu)
73{
74	u64 msr_vp_index;
75	struct hv_vp_assist_page **hvp = &hv_vp_assist_page[smp_processor_id()];
76	void **input_arg;
77	struct page *pg;
78
79	input_arg = (void **)this_cpu_ptr(hyperv_pcpu_input_arg);
80	/* hv_cpu_init() can be called with IRQs disabled from hv_resume() */
81	pg = alloc_page(irqs_disabled() ? GFP_ATOMIC : GFP_KERNEL);
82	if (unlikely(!pg))
83		return -ENOMEM;
84	*input_arg = page_address(pg);
85
86	hv_get_vp_index(msr_vp_index);
87
88	hv_vp_index[smp_processor_id()] = msr_vp_index;
89
90	if (msr_vp_index > hv_max_vp_index)
91		hv_max_vp_index = msr_vp_index;
92
93	if (!hv_vp_assist_page)
94		return 0;
95
96	/*
97	 * The VP ASSIST PAGE is an "overlay" page (see Hyper-V TLFS's Section
98	 * 5.2.1 "GPA Overlay Pages"). Here it must be zeroed out to make sure
99	 * we always write the EOI MSR in hv_apic_eoi_write() *after* the
100	 * EOI optimization is disabled in hv_cpu_die(), otherwise a CPU may
101	 * not be stopped in the case of CPU offlining and the VM will hang.
102	 */
103	if (!*hvp) {
104		*hvp = __vmalloc(PAGE_SIZE, GFP_KERNEL | __GFP_ZERO);
105	}
106
107	if (*hvp) {
108		u64 val;
109
110		val = vmalloc_to_pfn(*hvp);
111		val = (val << HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT) |
112			HV_X64_MSR_VP_ASSIST_PAGE_ENABLE;
113
114		wrmsrl(HV_X64_MSR_VP_ASSIST_PAGE, val);
115	}
116
117	return 0;
118}
119
120static void (*hv_reenlightenment_cb)(void);
121
122static void hv_reenlightenment_notify(struct work_struct *dummy)
123{
124	struct hv_tsc_emulation_status emu_status;
125
126	rdmsrl(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status);
127
128	/* Don't issue the callback if TSC accesses are not emulated */
129	if (hv_reenlightenment_cb && emu_status.inprogress)
130		hv_reenlightenment_cb();
131}
132static DECLARE_DELAYED_WORK(hv_reenlightenment_work, hv_reenlightenment_notify);
133
134void hyperv_stop_tsc_emulation(void)
135{
136	u64 freq;
137	struct hv_tsc_emulation_status emu_status;
138
139	rdmsrl(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status);
140	emu_status.inprogress = 0;
141	wrmsrl(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status);
142
143	rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq);
144	tsc_khz = div64_u64(freq, 1000);
145}
146EXPORT_SYMBOL_GPL(hyperv_stop_tsc_emulation);
147
148static inline bool hv_reenlightenment_available(void)
149{
150	/*
151	 * Check for required features and priviliges to make TSC frequency
152	 * change notifications work.
153	 */
154	return ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&
155		ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE &&
156		ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT;
157}
158
159DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_reenlightenment)
160{
161	ack_APIC_irq();
162	inc_irq_stat(irq_hv_reenlightenment_count);
163	schedule_delayed_work(&hv_reenlightenment_work, HZ/10);
164}
165
166void set_hv_tscchange_cb(void (*cb)(void))
167{
168	struct hv_reenlightenment_control re_ctrl = {
169		.vector = HYPERV_REENLIGHTENMENT_VECTOR,
170		.enabled = 1,
171	};
172	struct hv_tsc_emulation_control emu_ctrl = {.enabled = 1};
173
174	if (!hv_reenlightenment_available()) {
175		pr_warn("Hyper-V: reenlightenment support is unavailable\n");
176		return;
177	}
178
179	if (!hv_vp_index)
180		return;
181
182	hv_reenlightenment_cb = cb;
183
184	/* Make sure callback is registered before we write to MSRs */
185	wmb();
186
187	re_ctrl.target_vp = hv_vp_index[get_cpu()];
188
189	wrmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&re_ctrl));
190	wrmsrl(HV_X64_MSR_TSC_EMULATION_CONTROL, *((u64 *)&emu_ctrl));
191
192	put_cpu();
193}
194EXPORT_SYMBOL_GPL(set_hv_tscchange_cb);
195
196void clear_hv_tscchange_cb(void)
197{
198	struct hv_reenlightenment_control re_ctrl;
199
200	if (!hv_reenlightenment_available())
201		return;
202
203	rdmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *(u64 *)&re_ctrl);
204	re_ctrl.enabled = 0;
205	wrmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *(u64 *)&re_ctrl);
206
207	hv_reenlightenment_cb = NULL;
208}
209EXPORT_SYMBOL_GPL(clear_hv_tscchange_cb);
210
211static int hv_cpu_die(unsigned int cpu)
212{
213	struct hv_reenlightenment_control re_ctrl;
214	unsigned int new_cpu;
215	unsigned long flags;
216	void **input_arg;
217	void *input_pg = NULL;
218
219	local_irq_save(flags);
220	input_arg = (void **)this_cpu_ptr(hyperv_pcpu_input_arg);
221	input_pg = *input_arg;
222	*input_arg = NULL;
223	local_irq_restore(flags);
224	free_page((unsigned long)input_pg);
225
226	if (hv_vp_assist_page && hv_vp_assist_page[cpu])
227		wrmsrl(HV_X64_MSR_VP_ASSIST_PAGE, 0);
228
229	if (hv_reenlightenment_cb == NULL)
230		return 0;
231
232	rdmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&re_ctrl));
233	if (re_ctrl.target_vp == hv_vp_index[cpu]) {
234		/*
235		 * Reassign reenlightenment notifications to some other online
236		 * CPU or just disable the feature if there are no online CPUs
237		 * left (happens on hibernation).
238		 */
239		new_cpu = cpumask_any_but(cpu_online_mask, cpu);
240
241		if (new_cpu < nr_cpu_ids)
242			re_ctrl.target_vp = hv_vp_index[new_cpu];
243		else
244			re_ctrl.enabled = 0;
245
246		wrmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&re_ctrl));
247	}
248
249	return 0;
250}
251
252static int __init hv_pci_init(void)
253{
254	int gen2vm = efi_enabled(EFI_BOOT);
255
256	/*
257	 * For Generation-2 VM, we exit from pci_arch_init() by returning 0.
258	 * The purpose is to suppress the harmless warning:
259	 * "PCI: Fatal: No config space access function found"
260	 */
261	if (gen2vm)
262		return 0;
263
264	/* For Generation-1 VM, we'll proceed in pci_arch_init().  */
265	return 1;
266}
267
268static int hv_suspend(void)
269{
270	union hv_x64_msr_hypercall_contents hypercall_msr;
271	int ret;
272
273	/*
274	 * Reset the hypercall page as it is going to be invalidated
275	 * accross hibernation. Setting hv_hypercall_pg to NULL ensures
276	 * that any subsequent hypercall operation fails safely instead of
277	 * crashing due to an access of an invalid page. The hypercall page
278	 * pointer is restored on resume.
279	 */
280	hv_hypercall_pg_saved = hv_hypercall_pg;
281	hv_hypercall_pg = NULL;
282
283	/* Disable the hypercall page in the hypervisor */
284	rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
285	hypercall_msr.enable = 0;
286	wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
287
288	ret = hv_cpu_die(0);
289	return ret;
290}
291
292static void hv_resume(void)
293{
294	union hv_x64_msr_hypercall_contents hypercall_msr;
295	int ret;
296
297	ret = hv_cpu_init(0);
298	WARN_ON(ret);
299
300	/* Re-enable the hypercall page */
301	rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
302	hypercall_msr.enable = 1;
303	hypercall_msr.guest_physical_address =
304		vmalloc_to_pfn(hv_hypercall_pg_saved);
305	wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
306
307	hv_hypercall_pg = hv_hypercall_pg_saved;
308	hv_hypercall_pg_saved = NULL;
309
310	/*
311	 * Reenlightenment notifications are disabled by hv_cpu_die(0),
312	 * reenable them here if hv_reenlightenment_cb was previously set.
313	 */
314	if (hv_reenlightenment_cb)
315		set_hv_tscchange_cb(hv_reenlightenment_cb);
316}
317
318/* Note: when the ops are called, only CPU0 is online and IRQs are disabled. */
319static struct syscore_ops hv_syscore_ops = {
320	.suspend	= hv_suspend,
321	.resume		= hv_resume,
322};
323
324static void (* __initdata old_setup_percpu_clockev)(void);
325
326static void __init hv_stimer_setup_percpu_clockev(void)
327{
328	/*
329	 * Ignore any errors in setting up stimer clockevents
330	 * as we can run with the LAPIC timer as a fallback.
331	 */
332	(void)hv_stimer_alloc();
333
334	/*
335	 * Still register the LAPIC timer, because the direct-mode STIMER is
336	 * not supported by old versions of Hyper-V. This also allows users
337	 * to switch to LAPIC timer via /sys, if they want to.
338	 */
339	if (old_setup_percpu_clockev)
340		old_setup_percpu_clockev();
341}
342
343/*
344 * This function is to be invoked early in the boot sequence after the
345 * hypervisor has been detected.
346 *
347 * 1. Setup the hypercall page.
348 * 2. Register Hyper-V specific clocksource.
349 * 3. Setup Hyper-V specific APIC entry points.
350 */
351void __init hyperv_init(void)
352{
353	u64 guest_id, required_msrs;
354	union hv_x64_msr_hypercall_contents hypercall_msr;
355	int cpuhp, i;
356
357	if (x86_hyper_type != X86_HYPER_MS_HYPERV)
358		return;
359
360	/* Absolutely required MSRs */
361	required_msrs = HV_MSR_HYPERCALL_AVAILABLE |
362		HV_MSR_VP_INDEX_AVAILABLE;
363
364	if ((ms_hyperv.features & required_msrs) != required_msrs)
365		return;
366
367	/*
368	 * Allocate the per-CPU state for the hypercall input arg.
369	 * If this allocation fails, we will not be able to setup
370	 * (per-CPU) hypercall input page and thus this failure is
371	 * fatal on Hyper-V.
372	 */
373	hyperv_pcpu_input_arg = alloc_percpu(void  *);
374
375	BUG_ON(hyperv_pcpu_input_arg == NULL);
376
377	/* Allocate percpu VP index */
378	hv_vp_index = kmalloc_array(num_possible_cpus(), sizeof(*hv_vp_index),
379				    GFP_KERNEL);
380	if (!hv_vp_index)
381		return;
382
383	for (i = 0; i < num_possible_cpus(); i++)
384		hv_vp_index[i] = VP_INVAL;
385
386	hv_vp_assist_page = kcalloc(num_possible_cpus(),
387				    sizeof(*hv_vp_assist_page), GFP_KERNEL);
388	if (!hv_vp_assist_page) {
389		ms_hyperv.hints &= ~HV_X64_ENLIGHTENED_VMCS_RECOMMENDED;
390		goto free_vp_index;
391	}
392
393	cpuhp = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/hyperv_init:online",
394				  hv_cpu_init, hv_cpu_die);
395	if (cpuhp < 0)
396		goto free_vp_assist_page;
397
398	/*
399	 * Setup the hypercall page and enable hypercalls.
400	 * 1. Register the guest ID
401	 * 2. Enable the hypercall and register the hypercall page
402	 */
403	guest_id = generate_guest_id(0, LINUX_VERSION_CODE, 0);
404	wrmsrl(HV_X64_MSR_GUEST_OS_ID, guest_id);
405
406	hv_hypercall_pg = __vmalloc_node_range(PAGE_SIZE, 1, VMALLOC_START,
407			VMALLOC_END, GFP_KERNEL, PAGE_KERNEL_ROX,
408			VM_FLUSH_RESET_PERMS, NUMA_NO_NODE,
409			__builtin_return_address(0));
410	if (hv_hypercall_pg == NULL) {
411		wrmsrl(HV_X64_MSR_GUEST_OS_ID, 0);
412		goto remove_cpuhp_state;
413	}
414
415	rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
416	hypercall_msr.enable = 1;
417	hypercall_msr.guest_physical_address = vmalloc_to_pfn(hv_hypercall_pg);
418	wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
419
420	/*
421	 * hyperv_init() is called before LAPIC is initialized: see
422	 * apic_intr_mode_init() -> x86_platform.apic_post_init() and
423	 * apic_bsp_setup() -> setup_local_APIC(). The direct-mode STIMER
424	 * depends on LAPIC, so hv_stimer_alloc() should be called from
425	 * x86_init.timers.setup_percpu_clockev.
426	 */
427	old_setup_percpu_clockev = x86_init.timers.setup_percpu_clockev;
428	x86_init.timers.setup_percpu_clockev = hv_stimer_setup_percpu_clockev;
429
430	hv_apic_init();
431
432	x86_init.pci.arch_init = hv_pci_init;
433
434	register_syscore_ops(&hv_syscore_ops);
435
436	hyperv_init_cpuhp = cpuhp;
437	return;
438
439remove_cpuhp_state:
440	cpuhp_remove_state(cpuhp);
441free_vp_assist_page:
442	kfree(hv_vp_assist_page);
443	hv_vp_assist_page = NULL;
444free_vp_index:
445	kfree(hv_vp_index);
446	hv_vp_index = NULL;
447}
448
449/*
450 * This routine is called before kexec/kdump, it does the required cleanup.
451 */
452void hyperv_cleanup(void)
453{
454	union hv_x64_msr_hypercall_contents hypercall_msr;
455
456	/* Reset our OS id */
457	wrmsrl(HV_X64_MSR_GUEST_OS_ID, 0);
458
459	/*
460	 * Reset hypercall page reference before reset the page,
461	 * let hypercall operations fail safely rather than
462	 * panic the kernel for using invalid hypercall page
463	 */
464	hv_hypercall_pg = NULL;
465
466	/* Reset the hypercall page */
467	hypercall_msr.as_uint64 = 0;
468	wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
469
470	/* Reset the TSC page */
471	hypercall_msr.as_uint64 = 0;
472	wrmsrl(HV_X64_MSR_REFERENCE_TSC, hypercall_msr.as_uint64);
473}
474EXPORT_SYMBOL_GPL(hyperv_cleanup);
475
476void hyperv_report_panic(struct pt_regs *regs, long err, bool in_die)
477{
478	static bool panic_reported;
479	u64 guest_id;
480
481	if (in_die && !panic_on_oops)
482		return;
483
484	/*
485	 * We prefer to report panic on 'die' chain as we have proper
486	 * registers to report, but if we miss it (e.g. on BUG()) we need
487	 * to report it on 'panic'.
488	 */
489	if (panic_reported)
490		return;
491	panic_reported = true;
492
493	rdmsrl(HV_X64_MSR_GUEST_OS_ID, guest_id);
494
495	wrmsrl(HV_X64_MSR_CRASH_P0, err);
496	wrmsrl(HV_X64_MSR_CRASH_P1, guest_id);
497	wrmsrl(HV_X64_MSR_CRASH_P2, regs->ip);
498	wrmsrl(HV_X64_MSR_CRASH_P3, regs->ax);
499	wrmsrl(HV_X64_MSR_CRASH_P4, regs->sp);
500
501	/*
502	 * Let Hyper-V know there is crash data available
503	 */
504	wrmsrl(HV_X64_MSR_CRASH_CTL, HV_CRASH_CTL_CRASH_NOTIFY);
505}
506EXPORT_SYMBOL_GPL(hyperv_report_panic);
507
508/**
509 * hyperv_report_panic_msg - report panic message to Hyper-V
510 * @pa: physical address of the panic page containing the message
511 * @size: size of the message in the page
512 */
513void hyperv_report_panic_msg(phys_addr_t pa, size_t size)
514{
515	/*
516	 * P3 to contain the physical address of the panic page & P4 to
517	 * contain the size of the panic data in that page. Rest of the
518	 * registers are no-op when the NOTIFY_MSG flag is set.
519	 */
520	wrmsrl(HV_X64_MSR_CRASH_P0, 0);
521	wrmsrl(HV_X64_MSR_CRASH_P1, 0);
522	wrmsrl(HV_X64_MSR_CRASH_P2, 0);
523	wrmsrl(HV_X64_MSR_CRASH_P3, pa);
524	wrmsrl(HV_X64_MSR_CRASH_P4, size);
525
526	/*
527	 * Let Hyper-V know there is crash data available along with
528	 * the panic message.
529	 */
530	wrmsrl(HV_X64_MSR_CRASH_CTL,
531	       (HV_CRASH_CTL_CRASH_NOTIFY | HV_CRASH_CTL_CRASH_NOTIFY_MSG));
532}
533EXPORT_SYMBOL_GPL(hyperv_report_panic_msg);
534
535bool hv_is_hyperv_initialized(void)
536{
537	union hv_x64_msr_hypercall_contents hypercall_msr;
538
539	/*
540	 * Ensure that we're really on Hyper-V, and not a KVM or Xen
541	 * emulation of Hyper-V
542	 */
543	if (x86_hyper_type != X86_HYPER_MS_HYPERV)
544		return false;
545
546	/*
547	 * Verify that earlier initialization succeeded by checking
548	 * that the hypercall page is setup
549	 */
550	hypercall_msr.as_uint64 = 0;
551	rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
552
553	return hypercall_msr.enable;
554}
555EXPORT_SYMBOL_GPL(hv_is_hyperv_initialized);
556
557bool hv_is_hibernation_supported(void)
558{
559	return acpi_sleep_state_supported(ACPI_STATE_S4);
560}
561EXPORT_SYMBOL_GPL(hv_is_hibernation_supported);
562