18c2ecf20Sopenharmony_ci/*
28c2ecf20Sopenharmony_ci * Copyright (c) 2017 Oracle and/or its affiliates. All rights reserved.
38c2ecf20Sopenharmony_ci */
48c2ecf20Sopenharmony_ci
58c2ecf20Sopenharmony_ci#ifndef _ASM_SPARC_CLOCKSOURCE_H
68c2ecf20Sopenharmony_ci#define _ASM_SPARC_CLOCKSOURCE_H
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci/* VDSO clocksources */
98c2ecf20Sopenharmony_ci#define VCLOCK_NONE   0  /* Nothing userspace can do. */
108c2ecf20Sopenharmony_ci#define VCLOCK_TICK   1  /* Use %tick.  */
118c2ecf20Sopenharmony_ci#define VCLOCK_STICK  2  /* Use %stick. */
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_cistruct arch_clocksource_data {
148c2ecf20Sopenharmony_ci	int vclock_mode;
158c2ecf20Sopenharmony_ci};
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ci#endif /* _ASM_SPARC_CLOCKSOURCE_H */
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