18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci#ifndef _SPARC64_CHMCTRL_H 38c2ecf20Sopenharmony_ci#define _SPARC64_CHMCTRL_H 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci/* Cheetah memory controller programmable registers. */ 68c2ecf20Sopenharmony_ci#define CHMCTRL_TCTRL1 0x00 /* Memory Timing Control I */ 78c2ecf20Sopenharmony_ci#define CHMCTRL_TCTRL2 0x08 /* Memory Timing Control II */ 88c2ecf20Sopenharmony_ci#define CHMCTRL_TCTRL3 0x38 /* Memory Timing Control III */ 98c2ecf20Sopenharmony_ci#define CHMCTRL_TCTRL4 0x40 /* Memory Timing Control IV */ 108c2ecf20Sopenharmony_ci#define CHMCTRL_DECODE1 0x10 /* Memory Address Decode I */ 118c2ecf20Sopenharmony_ci#define CHMCTRL_DECODE2 0x18 /* Memory Address Decode II */ 128c2ecf20Sopenharmony_ci#define CHMCTRL_DECODE3 0x20 /* Memory Address Decode III */ 138c2ecf20Sopenharmony_ci#define CHMCTRL_DECODE4 0x28 /* Memory Address Decode IV */ 148c2ecf20Sopenharmony_ci#define CHMCTRL_MACTRL 0x30 /* Memory Address Control */ 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci/* Memory Timing Control I */ 178c2ecf20Sopenharmony_ci#define TCTRL1_SDRAMCTL_DLY 0xf000000000000000UL 188c2ecf20Sopenharmony_ci#define TCTRL1_SDRAMCTL_DLY_SHIFT 60 198c2ecf20Sopenharmony_ci#define TCTRL1_SDRAMCLK_DLY 0x0e00000000000000UL 208c2ecf20Sopenharmony_ci#define TCTRL1_SDRAMCLK_DLY_SHIFT 57 218c2ecf20Sopenharmony_ci#define TCTRL1_R 0x0100000000000000UL 228c2ecf20Sopenharmony_ci#define TCTRL1_R_SHIFT 56 238c2ecf20Sopenharmony_ci#define TCTRL1_AUTORFR_CYCLE 0x00fe000000000000UL 248c2ecf20Sopenharmony_ci#define TCTRL1_AUTORFR_CYCLE_SHIFT 49 258c2ecf20Sopenharmony_ci#define TCTRL1_RD_WAIT 0x0001f00000000000UL 268c2ecf20Sopenharmony_ci#define TCTRL1_RD_WAIT_SHIFT 44 278c2ecf20Sopenharmony_ci#define TCTRL1_PC_CYCLE 0x00000fc000000000UL 288c2ecf20Sopenharmony_ci#define TCTRL1_PC_CYCLE_SHIFT 38 298c2ecf20Sopenharmony_ci#define TCTRL1_WR_MORE_RAS_PW 0x0000003f00000000UL 308c2ecf20Sopenharmony_ci#define TCTRL1_WR_MORE_RAS_PW_SHIFT 32 318c2ecf20Sopenharmony_ci#define TCTRL1_RD_MORE_RAW_PW 0x00000000fc000000UL 328c2ecf20Sopenharmony_ci#define TCTRL1_RD_MORE_RAS_PW_SHIFT 26 338c2ecf20Sopenharmony_ci#define TCTRL1_ACT_WR_DLY 0x0000000003f00000UL 348c2ecf20Sopenharmony_ci#define TCTRL1_ACT_WR_DLY_SHIFT 20 358c2ecf20Sopenharmony_ci#define TCTRL1_ACT_RD_DLY 0x00000000000fc000UL 368c2ecf20Sopenharmony_ci#define TCTRL1_ACT_RD_DLY_SHIFT 14 378c2ecf20Sopenharmony_ci#define TCTRL1_BANK_PRESENT 0x0000000000003000UL 388c2ecf20Sopenharmony_ci#define TCTRL1_BANK_PRESENT_SHIFT 12 398c2ecf20Sopenharmony_ci#define TCTRL1_RFR_INT 0x0000000000000ff8UL 408c2ecf20Sopenharmony_ci#define TCTRL1_RFR_INT_SHIFT 3 418c2ecf20Sopenharmony_ci#define TCTRL1_SET_MODE_REG 0x0000000000000004UL 428c2ecf20Sopenharmony_ci#define TCTRL1_SET_MODE_REG_SHIFT 2 438c2ecf20Sopenharmony_ci#define TCTRL1_RFR_ENABLE 0x0000000000000002UL 448c2ecf20Sopenharmony_ci#define TCTRL1_RFR_ENABLE_SHIFT 1 458c2ecf20Sopenharmony_ci#define TCTRL1_PRECHG_ALL 0x0000000000000001UL 468c2ecf20Sopenharmony_ci#define TCTRL1_PRECHG_ALL_SHIFT 0 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci/* Memory Timing Control II */ 498c2ecf20Sopenharmony_ci#define TCTRL2_WR_MSEL_DLY 0xfc00000000000000UL 508c2ecf20Sopenharmony_ci#define TCTRL2_WR_MSEL_DLY_SHIFT 58 518c2ecf20Sopenharmony_ci#define TCTRL2_RD_MSEL_DLY 0x03f0000000000000UL 528c2ecf20Sopenharmony_ci#define TCTRL2_RD_MSEL_DLY_SHIFT 52 538c2ecf20Sopenharmony_ci#define TCTRL2_WRDATA_THLD 0x000c000000000000UL 548c2ecf20Sopenharmony_ci#define TCTRL2_WRDATA_THLD_SHIFT 50 558c2ecf20Sopenharmony_ci#define TCTRL2_RDWR_RD_TI_DLY 0x0003f00000000000UL 568c2ecf20Sopenharmony_ci#define TCTRL2_RDWR_RD_TI_DLY_SHIFT 44 578c2ecf20Sopenharmony_ci#define TCTRL2_AUTOPRECHG_ENBL 0x0000080000000000UL 588c2ecf20Sopenharmony_ci#define TCTRL2_AUTOPRECHG_ENBL_SHIFT 43 598c2ecf20Sopenharmony_ci#define TCTRL2_RDWR_PI_MORE_DLY 0x000007c000000000UL 608c2ecf20Sopenharmony_ci#define TCTRL2_RDWR_PI_MORE_DLY_SHIFT 38 618c2ecf20Sopenharmony_ci#define TCTRL2_RDWR_1_DLY 0x0000003f00000000UL 628c2ecf20Sopenharmony_ci#define TCTRL2_RDWR_1_DLY_SHIFT 32 638c2ecf20Sopenharmony_ci#define TCTRL2_WRWR_PI_MORE_DLY 0x00000000f8000000UL 648c2ecf20Sopenharmony_ci#define TCTRL2_WRWR_PI_MORE_DLY_SHIFT 27 658c2ecf20Sopenharmony_ci#define TCTRL2_WRWR_1_DLY 0x0000000007e00000UL 668c2ecf20Sopenharmony_ci#define TCTRL2_WRWR_1_DLY_SHIFT 21 678c2ecf20Sopenharmony_ci#define TCTRL2_RDWR_RD_PI_MORE_DLY 0x00000000001f0000UL 688c2ecf20Sopenharmony_ci#define TCTRL2_RDWR_RD_PI_MORE_DLY_SHIFT 16 698c2ecf20Sopenharmony_ci#define TCTRL2_R 0x0000000000008000UL 708c2ecf20Sopenharmony_ci#define TCTRL2_R_SHIFT 15 718c2ecf20Sopenharmony_ci#define TCTRL2_SDRAM_MODE_REG_DATA 0x0000000000007fffUL 728c2ecf20Sopenharmony_ci#define TCTRL2_SDRAM_MODE_REG_DATA_SHIFT 0 738c2ecf20Sopenharmony_ci 748c2ecf20Sopenharmony_ci/* Memory Timing Control III */ 758c2ecf20Sopenharmony_ci#define TCTRL3_SDRAM_CTL_DLY 0xf000000000000000UL 768c2ecf20Sopenharmony_ci#define TCTRL3_SDRAM_CTL_DLY_SHIFT 60 778c2ecf20Sopenharmony_ci#define TCTRL3_SDRAM_CLK_DLY 0x0e00000000000000UL 788c2ecf20Sopenharmony_ci#define TCTRL3_SDRAM_CLK_DLY_SHIFT 57 798c2ecf20Sopenharmony_ci#define TCTRL3_R 0x0100000000000000UL 808c2ecf20Sopenharmony_ci#define TCTRL3_R_SHIFT 56 818c2ecf20Sopenharmony_ci#define TCTRL3_AUTO_RFR_CYCLE 0x00fe000000000000UL 828c2ecf20Sopenharmony_ci#define TCTRL3_AUTO_RFR_CYCLE_SHIFT 49 838c2ecf20Sopenharmony_ci#define TCTRL3_RD_WAIT 0x0001f00000000000UL 848c2ecf20Sopenharmony_ci#define TCTRL3_RD_WAIT_SHIFT 44 858c2ecf20Sopenharmony_ci#define TCTRL3_PC_CYCLE 0x00000fc000000000UL 868c2ecf20Sopenharmony_ci#define TCTRL3_PC_CYCLE_SHIFT 38 878c2ecf20Sopenharmony_ci#define TCTRL3_WR_MORE_RAW_PW 0x0000003f00000000UL 888c2ecf20Sopenharmony_ci#define TCTRL3_WR_MORE_RAW_PW_SHIFT 32 898c2ecf20Sopenharmony_ci#define TCTRL3_RD_MORE_RAW_PW 0x00000000fc000000UL 908c2ecf20Sopenharmony_ci#define TCTRL3_RD_MORE_RAW_PW_SHIFT 26 918c2ecf20Sopenharmony_ci#define TCTRL3_ACT_WR_DLY 0x0000000003f00000UL 928c2ecf20Sopenharmony_ci#define TCTRL3_ACT_WR_DLY_SHIFT 20 938c2ecf20Sopenharmony_ci#define TCTRL3_ACT_RD_DLY 0x00000000000fc000UL 948c2ecf20Sopenharmony_ci#define TCTRL3_ACT_RD_DLY_SHIFT 14 958c2ecf20Sopenharmony_ci#define TCTRL3_BANK_PRESENT 0x0000000000003000UL 968c2ecf20Sopenharmony_ci#define TCTRL3_BANK_PRESENT_SHIFT 12 978c2ecf20Sopenharmony_ci#define TCTRL3_RFR_INT 0x0000000000000ff8UL 988c2ecf20Sopenharmony_ci#define TCTRL3_RFR_INT_SHIFT 3 998c2ecf20Sopenharmony_ci#define TCTRL3_SET_MODE_REG 0x0000000000000004UL 1008c2ecf20Sopenharmony_ci#define TCTRL3_SET_MODE_REG_SHIFT 2 1018c2ecf20Sopenharmony_ci#define TCTRL3_RFR_ENABLE 0x0000000000000002UL 1028c2ecf20Sopenharmony_ci#define TCTRL3_RFR_ENABLE_SHIFT 1 1038c2ecf20Sopenharmony_ci#define TCTRL3_PRECHG_ALL 0x0000000000000001UL 1048c2ecf20Sopenharmony_ci#define TCTRL3_PRECHG_ALL_SHIFT 0 1058c2ecf20Sopenharmony_ci 1068c2ecf20Sopenharmony_ci/* Memory Timing Control IV */ 1078c2ecf20Sopenharmony_ci#define TCTRL4_WR_MSEL_DLY 0xfc00000000000000UL 1088c2ecf20Sopenharmony_ci#define TCTRL4_WR_MSEL_DLY_SHIFT 58 1098c2ecf20Sopenharmony_ci#define TCTRL4_RD_MSEL_DLY 0x03f0000000000000UL 1108c2ecf20Sopenharmony_ci#define TCTRL4_RD_MSEL_DLY_SHIFT 52 1118c2ecf20Sopenharmony_ci#define TCTRL4_WRDATA_THLD 0x000c000000000000UL 1128c2ecf20Sopenharmony_ci#define TCTRL4_WRDATA_THLD_SHIFT 50 1138c2ecf20Sopenharmony_ci#define TCTRL4_RDWR_RD_RI_DLY 0x0003f00000000000UL 1148c2ecf20Sopenharmony_ci#define TCTRL4_RDWR_RD_RI_DLY_SHIFT 44 1158c2ecf20Sopenharmony_ci#define TCTRL4_AUTO_PRECHG_ENBL 0x0000080000000000UL 1168c2ecf20Sopenharmony_ci#define TCTRL4_AUTO_PRECHG_ENBL_SHIFT 43 1178c2ecf20Sopenharmony_ci#define TCTRL4_RD_WR_PI_MORE_DLY 0x000007c000000000UL 1188c2ecf20Sopenharmony_ci#define TCTRL4_RD_WR_PI_MORE_DLY_SHIFT 38 1198c2ecf20Sopenharmony_ci#define TCTRL4_RD_WR_TI_DLY 0x0000003f00000000UL 1208c2ecf20Sopenharmony_ci#define TCTRL4_RD_WR_TI_DLY_SHIFT 32 1218c2ecf20Sopenharmony_ci#define TCTRL4_WR_WR_PI_MORE_DLY 0x00000000f8000000UL 1228c2ecf20Sopenharmony_ci#define TCTRL4_WR_WR_PI_MORE_DLY_SHIFT 27 1238c2ecf20Sopenharmony_ci#define TCTRL4_WR_WR_TI_DLY 0x0000000007e00000UL 1248c2ecf20Sopenharmony_ci#define TCTRL4_WR_WR_TI_DLY_SHIFT 21 1258c2ecf20Sopenharmony_ci#define TCTRL4_RDWR_RD_PI_MORE_DLY 0x00000000001f000UL0 1268c2ecf20Sopenharmony_ci#define TCTRL4_RDWR_RD_PI_MORE_DLY_SHIFT 16 1278c2ecf20Sopenharmony_ci#define TCTRL4_R 0x0000000000008000UL 1288c2ecf20Sopenharmony_ci#define TCTRL4_R_SHIFT 15 1298c2ecf20Sopenharmony_ci#define TCTRL4_SDRAM_MODE_REG_DATA 0x0000000000007fffUL 1308c2ecf20Sopenharmony_ci#define TCTRL4_SDRAM_MODE_REG_DATA_SHIFT 0 1318c2ecf20Sopenharmony_ci 1328c2ecf20Sopenharmony_ci/* All 4 memory address decoding registers have the 1338c2ecf20Sopenharmony_ci * same layout. 1348c2ecf20Sopenharmony_ci */ 1358c2ecf20Sopenharmony_ci#define MEM_DECODE_VALID 0x8000000000000000UL /* Valid */ 1368c2ecf20Sopenharmony_ci#define MEM_DECODE_VALID_SHIFT 63 1378c2ecf20Sopenharmony_ci#define MEM_DECODE_UK 0x001ffe0000000000UL /* Upper mask */ 1388c2ecf20Sopenharmony_ci#define MEM_DECODE_UK_SHIFT 41 1398c2ecf20Sopenharmony_ci#define MEM_DECODE_UM 0x0000001ffff00000UL /* Upper match */ 1408c2ecf20Sopenharmony_ci#define MEM_DECODE_UM_SHIFT 20 1418c2ecf20Sopenharmony_ci#define MEM_DECODE_LK 0x000000000003c000UL /* Lower mask */ 1428c2ecf20Sopenharmony_ci#define MEM_DECODE_LK_SHIFT 14 1438c2ecf20Sopenharmony_ci#define MEM_DECODE_LM 0x0000000000000f00UL /* Lower match */ 1448c2ecf20Sopenharmony_ci#define MEM_DECODE_LM_SHIFT 8 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_ci#define PA_UPPER_BITS 0x000007fffc000000UL 1478c2ecf20Sopenharmony_ci#define PA_UPPER_BITS_SHIFT 26 1488c2ecf20Sopenharmony_ci#define PA_LOWER_BITS 0x00000000000003c0UL 1498c2ecf20Sopenharmony_ci#define PA_LOWER_BITS_SHIFT 6 1508c2ecf20Sopenharmony_ci 1518c2ecf20Sopenharmony_ci#define MACTRL_R0 0x8000000000000000UL 1528c2ecf20Sopenharmony_ci#define MACTRL_R0_SHIFT 63 1538c2ecf20Sopenharmony_ci#define MACTRL_ADDR_LE_PW 0x7000000000000000UL 1548c2ecf20Sopenharmony_ci#define MACTRL_ADDR_LE_PW_SHIFT 60 1558c2ecf20Sopenharmony_ci#define MACTRL_CMD_PW 0x0f00000000000000UL 1568c2ecf20Sopenharmony_ci#define MACTRL_CMD_PW_SHIFT 56 1578c2ecf20Sopenharmony_ci#define MACTRL_HALF_MODE_WR_MSEL_DLY 0x00fc000000000000UL 1588c2ecf20Sopenharmony_ci#define MACTRL_HALF_MODE_WR_MSEL_DLY_SHIFT 50 1598c2ecf20Sopenharmony_ci#define MACTRL_HALF_MODE_RD_MSEL_DLY 0x0003f00000000000UL 1608c2ecf20Sopenharmony_ci#define MACTRL_HALF_MODE_RD_MSEL_DLY_SHIFT 44 1618c2ecf20Sopenharmony_ci#define MACTRL_HALF_MODE_SDRAM_CTL_DLY 0x00000f0000000000UL 1628c2ecf20Sopenharmony_ci#define MACTRL_HALF_MODE_SDRAM_CTL_DLY_SHIFT 40 1638c2ecf20Sopenharmony_ci#define MACTRL_HALF_MODE_SDRAM_CLK_DLY 0x000000e000000000UL 1648c2ecf20Sopenharmony_ci#define MACTRL_HALF_MODE_SDRAM_CLK_DLY_SHIFT 37 1658c2ecf20Sopenharmony_ci#define MACTRL_R1 0x0000001000000000UL 1668c2ecf20Sopenharmony_ci#define MACTRL_R1_SHIFT 36 1678c2ecf20Sopenharmony_ci#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B3 0x0000000f00000000UL 1688c2ecf20Sopenharmony_ci#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B3_SHIFT 32 1698c2ecf20Sopenharmony_ci#define MACTRL_ENC_INTLV_B3 0x00000000f8000000UL 1708c2ecf20Sopenharmony_ci#define MACTRL_ENC_INTLV_B3_SHIFT 27 1718c2ecf20Sopenharmony_ci#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B2 0x0000000007800000UL 1728c2ecf20Sopenharmony_ci#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B2_SHIFT 23 1738c2ecf20Sopenharmony_ci#define MACTRL_ENC_INTLV_B2 0x00000000007c0000UL 1748c2ecf20Sopenharmony_ci#define MACTRL_ENC_INTLV_B2_SHIFT 18 1758c2ecf20Sopenharmony_ci#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B1 0x000000000003c000UL 1768c2ecf20Sopenharmony_ci#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B1_SHIFT 14 1778c2ecf20Sopenharmony_ci#define MACTRL_ENC_INTLV_B1 0x0000000000003e00UL 1788c2ecf20Sopenharmony_ci#define MACTRL_ENC_INTLV_B1_SHIFT 9 1798c2ecf20Sopenharmony_ci#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B0 0x00000000000001e0UL 1808c2ecf20Sopenharmony_ci#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B0_SHIFT 5 1818c2ecf20Sopenharmony_ci#define MACTRL_ENC_INTLV_B0 0x000000000000001fUL 1828c2ecf20Sopenharmony_ci#define MACTRL_ENC_INTLV_B0_SHIFT 0 1838c2ecf20Sopenharmony_ci 1848c2ecf20Sopenharmony_ci#endif /* _SPARC64_CHMCTRL_H */ 185