18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci#include <linux/clk.h>
38c2ecf20Sopenharmony_ci#include <linux/compiler.h>
48c2ecf20Sopenharmony_ci#include <linux/slab.h>
58c2ecf20Sopenharmony_ci#include <linux/io.h>
68c2ecf20Sopenharmony_ci#include <linux/clkdev.h>
78c2ecf20Sopenharmony_ci#include <asm/clock.h>
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cistatic struct clk master_clk = {
108c2ecf20Sopenharmony_ci	.flags		= CLK_ENABLE_ON_INIT,
118c2ecf20Sopenharmony_ci	.rate		= CONFIG_SH_PCLK_FREQ,
128c2ecf20Sopenharmony_ci};
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_cistatic struct clk peripheral_clk = {
158c2ecf20Sopenharmony_ci	.parent		= &master_clk,
168c2ecf20Sopenharmony_ci	.flags		= CLK_ENABLE_ON_INIT,
178c2ecf20Sopenharmony_ci};
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_cistatic struct clk bus_clk = {
208c2ecf20Sopenharmony_ci	.parent		= &master_clk,
218c2ecf20Sopenharmony_ci	.flags		= CLK_ENABLE_ON_INIT,
228c2ecf20Sopenharmony_ci};
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_cistatic struct clk cpu_clk = {
258c2ecf20Sopenharmony_ci	.parent		= &master_clk,
268c2ecf20Sopenharmony_ci	.flags		= CLK_ENABLE_ON_INIT,
278c2ecf20Sopenharmony_ci};
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ci/*
308c2ecf20Sopenharmony_ci * The ordering of these clocks matters, do not change it.
318c2ecf20Sopenharmony_ci */
328c2ecf20Sopenharmony_cistatic struct clk *onchip_clocks[] = {
338c2ecf20Sopenharmony_ci	&master_clk,
348c2ecf20Sopenharmony_ci	&peripheral_clk,
358c2ecf20Sopenharmony_ci	&bus_clk,
368c2ecf20Sopenharmony_ci	&cpu_clk,
378c2ecf20Sopenharmony_ci};
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_cistatic struct clk_lookup lookups[] = {
408c2ecf20Sopenharmony_ci	/* main clocks */
418c2ecf20Sopenharmony_ci	CLKDEV_CON_ID("master_clk", &master_clk),
428c2ecf20Sopenharmony_ci	CLKDEV_CON_ID("peripheral_clk", &peripheral_clk),
438c2ecf20Sopenharmony_ci	CLKDEV_CON_ID("bus_clk", &bus_clk),
448c2ecf20Sopenharmony_ci	CLKDEV_CON_ID("cpu_clk", &cpu_clk),
458c2ecf20Sopenharmony_ci};
468c2ecf20Sopenharmony_ci
478c2ecf20Sopenharmony_ciint __init __deprecated cpg_clk_init(void)
488c2ecf20Sopenharmony_ci{
498c2ecf20Sopenharmony_ci	int i, ret = 0;
508c2ecf20Sopenharmony_ci
518c2ecf20Sopenharmony_ci	for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) {
528c2ecf20Sopenharmony_ci		struct clk *clk = onchip_clocks[i];
538c2ecf20Sopenharmony_ci		arch_init_clk_ops(&clk->ops, i);
548c2ecf20Sopenharmony_ci		if (clk->ops)
558c2ecf20Sopenharmony_ci			ret |= clk_register(clk);
568c2ecf20Sopenharmony_ci	}
578c2ecf20Sopenharmony_ci
588c2ecf20Sopenharmony_ci	clkdev_add_table(lookups, ARRAY_SIZE(lookups));
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_ci	clk_add_alias("fck", "sh-tmu-sh3.0", "peripheral_clk", NULL);
618c2ecf20Sopenharmony_ci	clk_add_alias("fck", "sh-tmu.0", "peripheral_clk", NULL);
628c2ecf20Sopenharmony_ci	clk_add_alias("fck", "sh-tmu.1", "peripheral_clk", NULL);
638c2ecf20Sopenharmony_ci	clk_add_alias("fck", "sh-tmu.2", "peripheral_clk", NULL);
648c2ecf20Sopenharmony_ci	clk_add_alias("fck", "sh-mtu2", "peripheral_clk", NULL);
658c2ecf20Sopenharmony_ci	clk_add_alias("fck", "sh-cmt-16.0", "peripheral_clk", NULL);
668c2ecf20Sopenharmony_ci	clk_add_alias("fck", "sh-cmt-32.0", "peripheral_clk", NULL);
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ci	return ret;
698c2ecf20Sopenharmony_ci}
708c2ecf20Sopenharmony_ci
718c2ecf20Sopenharmony_ci/*
728c2ecf20Sopenharmony_ci * Placeholder for compatibility, until the lazy CPUs do this
738c2ecf20Sopenharmony_ci * on their own.
748c2ecf20Sopenharmony_ci */
758c2ecf20Sopenharmony_ciint __init __weak arch_clk_init(void)
768c2ecf20Sopenharmony_ci{
778c2ecf20Sopenharmony_ci	return cpg_clk_init();
788c2ecf20Sopenharmony_ci}
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