18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci *
38c2ecf20Sopenharmony_ci * include/asm-sh/dreamcast/sysasic.h
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Definitions for the Dreamcast System ASIC and related peripherals.
68c2ecf20Sopenharmony_ci *
78c2ecf20Sopenharmony_ci * Copyright (c) 2001 M. R. Brown <mrbrown@linuxdc.org>
88c2ecf20Sopenharmony_ci * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org>
98c2ecf20Sopenharmony_ci *
108c2ecf20Sopenharmony_ci * This file is part of the LinuxDC project (www.linuxdc.org)
118c2ecf20Sopenharmony_ci */
128c2ecf20Sopenharmony_ci#ifndef __ASM_SH_DREAMCAST_SYSASIC_H
138c2ecf20Sopenharmony_ci#define __ASM_SH_DREAMCAST_SYSASIC_H
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ci#include <asm/irq.h>
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ci/* Hardware events -
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci   Each of these events correspond to a bit within the Event Mask Registers/
208c2ecf20Sopenharmony_ci   Event Status Registers.  Because of the virtual IRQ numbering scheme, a
218c2ecf20Sopenharmony_ci   base offset must be used when calculating the virtual IRQ that each event
228c2ecf20Sopenharmony_ci   takes.
238c2ecf20Sopenharmony_ci*/
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_ci#define HW_EVENT_IRQ_BASE  48
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci/* IRQ 13 */
288c2ecf20Sopenharmony_ci#define HW_EVENT_VSYNC     (HW_EVENT_IRQ_BASE +  5) /* VSync */
298c2ecf20Sopenharmony_ci#define HW_EVENT_MAPLE_DMA (HW_EVENT_IRQ_BASE + 12) /* Maple DMA complete */
308c2ecf20Sopenharmony_ci#define HW_EVENT_GDROM_DMA (HW_EVENT_IRQ_BASE + 14) /* GD-ROM DMA complete */
318c2ecf20Sopenharmony_ci#define HW_EVENT_G2_DMA    (HW_EVENT_IRQ_BASE + 15) /* G2 DMA complete */
328c2ecf20Sopenharmony_ci#define HW_EVENT_PVR2_DMA  (HW_EVENT_IRQ_BASE + 19) /* PVR2 DMA complete */
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_ci/* IRQ 11 */
358c2ecf20Sopenharmony_ci#define HW_EVENT_GDROM_CMD (HW_EVENT_IRQ_BASE + 32) /* GD-ROM cmd. complete */
368c2ecf20Sopenharmony_ci#define HW_EVENT_AICA_SYS  (HW_EVENT_IRQ_BASE + 33) /* AICA-related */
378c2ecf20Sopenharmony_ci#define HW_EVENT_EXTERNAL  (HW_EVENT_IRQ_BASE + 35) /* Ext. (expansion) */
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_ci#define HW_EVENT_IRQ_MAX (HW_EVENT_IRQ_BASE + 95)
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_ci/* arch/sh/boards/mach-dreamcast/irq.c */
428c2ecf20Sopenharmony_ciextern int systemasic_irq_demux(int);
438c2ecf20Sopenharmony_ciextern void systemasic_irq_init(void);
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci#endif /* __ASM_SH_DREAMCAST_SYSASIC_H */
468c2ecf20Sopenharmony_ci
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