18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ci * 38c2ecf20Sopenharmony_ci * include/asm-sh/dma.h 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (C) 2003, 2004 Paul Mundt 68c2ecf20Sopenharmony_ci */ 78c2ecf20Sopenharmony_ci#ifndef __ASM_SH_DMA_H 88c2ecf20Sopenharmony_ci#define __ASM_SH_DMA_H 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#include <linux/spinlock.h> 118c2ecf20Sopenharmony_ci#include <linux/wait.h> 128c2ecf20Sopenharmony_ci#include <linux/sched.h> 138c2ecf20Sopenharmony_ci#include <linux/device.h> 148c2ecf20Sopenharmony_ci#include <asm-generic/dma.h> 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci/* 178c2ecf20Sopenharmony_ci * Read and write modes can mean drastically different things depending on the 188c2ecf20Sopenharmony_ci * channel configuration. Consult your DMAC documentation and module 198c2ecf20Sopenharmony_ci * implementation for further clues. 208c2ecf20Sopenharmony_ci */ 218c2ecf20Sopenharmony_ci#define DMA_MODE_READ 0x00 228c2ecf20Sopenharmony_ci#define DMA_MODE_WRITE 0x01 238c2ecf20Sopenharmony_ci#define DMA_MODE_MASK 0x01 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci#define DMA_AUTOINIT 0x10 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci/* 288c2ecf20Sopenharmony_ci * DMAC (dma_info) flags 298c2ecf20Sopenharmony_ci */ 308c2ecf20Sopenharmony_cienum { 318c2ecf20Sopenharmony_ci DMAC_CHANNELS_CONFIGURED = 0x01, 328c2ecf20Sopenharmony_ci DMAC_CHANNELS_TEI_CAPABLE = 0x02, /* Transfer end interrupt */ 338c2ecf20Sopenharmony_ci}; 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci/* 368c2ecf20Sopenharmony_ci * DMA channel capabilities / flags 378c2ecf20Sopenharmony_ci */ 388c2ecf20Sopenharmony_cienum { 398c2ecf20Sopenharmony_ci DMA_CONFIGURED = 0x01, 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci /* 428c2ecf20Sopenharmony_ci * Transfer end interrupt, inherited from DMAC. 438c2ecf20Sopenharmony_ci * wait_queue used in dma_wait_for_completion. 448c2ecf20Sopenharmony_ci */ 458c2ecf20Sopenharmony_ci DMA_TEI_CAPABLE = 0x02, 468c2ecf20Sopenharmony_ci}; 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ciextern spinlock_t dma_spin_lock; 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_cistruct dma_channel; 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_cistruct dma_ops { 538c2ecf20Sopenharmony_ci int (*request)(struct dma_channel *chan); 548c2ecf20Sopenharmony_ci void (*free)(struct dma_channel *chan); 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_ci int (*get_residue)(struct dma_channel *chan); 578c2ecf20Sopenharmony_ci int (*xfer)(struct dma_channel *chan); 588c2ecf20Sopenharmony_ci int (*configure)(struct dma_channel *chan, unsigned long flags); 598c2ecf20Sopenharmony_ci int (*extend)(struct dma_channel *chan, unsigned long op, void *param); 608c2ecf20Sopenharmony_ci}; 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_cistruct dma_channel { 638c2ecf20Sopenharmony_ci char dev_id[16]; /* unique name per DMAC of channel */ 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_ci unsigned int chan; /* DMAC channel number */ 668c2ecf20Sopenharmony_ci unsigned int vchan; /* Virtual channel number */ 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_ci unsigned int mode; 698c2ecf20Sopenharmony_ci unsigned int count; 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ci unsigned long sar; 728c2ecf20Sopenharmony_ci unsigned long dar; 738c2ecf20Sopenharmony_ci 748c2ecf20Sopenharmony_ci const char **caps; 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_ci unsigned long flags; 778c2ecf20Sopenharmony_ci atomic_t busy; 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_ci wait_queue_head_t wait_queue; 808c2ecf20Sopenharmony_ci 818c2ecf20Sopenharmony_ci struct device dev; 828c2ecf20Sopenharmony_ci void *priv_data; 838c2ecf20Sopenharmony_ci}; 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_cistruct dma_info { 868c2ecf20Sopenharmony_ci struct platform_device *pdev; 878c2ecf20Sopenharmony_ci 888c2ecf20Sopenharmony_ci const char *name; 898c2ecf20Sopenharmony_ci unsigned int nr_channels; 908c2ecf20Sopenharmony_ci unsigned long flags; 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_ci struct dma_ops *ops; 938c2ecf20Sopenharmony_ci struct dma_channel *channels; 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_ci struct list_head list; 968c2ecf20Sopenharmony_ci int first_channel_nr; 978c2ecf20Sopenharmony_ci int first_vchannel_nr; 988c2ecf20Sopenharmony_ci}; 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_cistruct dma_chan_caps { 1018c2ecf20Sopenharmony_ci int ch_num; 1028c2ecf20Sopenharmony_ci const char **caplist; 1038c2ecf20Sopenharmony_ci}; 1048c2ecf20Sopenharmony_ci 1058c2ecf20Sopenharmony_ci#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev) 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_ci/* arch/sh/drivers/dma/dma-api.c */ 1088c2ecf20Sopenharmony_ciextern int dma_xfer(unsigned int chan, unsigned long from, 1098c2ecf20Sopenharmony_ci unsigned long to, size_t size, unsigned int mode); 1108c2ecf20Sopenharmony_ci 1118c2ecf20Sopenharmony_ci#define dma_write(chan, from, to, size) \ 1128c2ecf20Sopenharmony_ci dma_xfer(chan, from, to, size, DMA_MODE_WRITE) 1138c2ecf20Sopenharmony_ci#define dma_write_page(chan, from, to) \ 1148c2ecf20Sopenharmony_ci dma_write(chan, from, to, PAGE_SIZE) 1158c2ecf20Sopenharmony_ci 1168c2ecf20Sopenharmony_ci#define dma_read(chan, from, to, size) \ 1178c2ecf20Sopenharmony_ci dma_xfer(chan, from, to, size, DMA_MODE_READ) 1188c2ecf20Sopenharmony_ci#define dma_read_page(chan, from, to) \ 1198c2ecf20Sopenharmony_ci dma_read(chan, from, to, PAGE_SIZE) 1208c2ecf20Sopenharmony_ci 1218c2ecf20Sopenharmony_ciextern int request_dma_bycap(const char **dmac, const char **caps, 1228c2ecf20Sopenharmony_ci const char *dev_id); 1238c2ecf20Sopenharmony_ciextern int get_dma_residue(unsigned int chan); 1248c2ecf20Sopenharmony_ciextern struct dma_info *get_dma_info(unsigned int chan); 1258c2ecf20Sopenharmony_ciextern struct dma_channel *get_dma_channel(unsigned int chan); 1268c2ecf20Sopenharmony_ciextern void dma_wait_for_completion(unsigned int chan); 1278c2ecf20Sopenharmony_ciextern void dma_configure_channel(unsigned int chan, unsigned long flags); 1288c2ecf20Sopenharmony_ci 1298c2ecf20Sopenharmony_ciextern int register_dmac(struct dma_info *info); 1308c2ecf20Sopenharmony_ciextern void unregister_dmac(struct dma_info *info); 1318c2ecf20Sopenharmony_ciextern struct dma_info *get_dma_info_by_name(const char *dmac_name); 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ciextern int dma_extend(unsigned int chan, unsigned long op, void *param); 1348c2ecf20Sopenharmony_ciextern int register_chan_caps(const char *dmac, struct dma_chan_caps *capslist); 1358c2ecf20Sopenharmony_ci 1368c2ecf20Sopenharmony_ci/* arch/sh/drivers/dma/dma-sysfs.c */ 1378c2ecf20Sopenharmony_ciextern int dma_create_sysfs_files(struct dma_channel *, struct dma_info *); 1388c2ecf20Sopenharmony_ciextern void dma_remove_sysfs_files(struct dma_channel *, struct dma_info *); 1398c2ecf20Sopenharmony_ci 1408c2ecf20Sopenharmony_ci#ifdef CONFIG_PCI 1418c2ecf20Sopenharmony_ciextern int isa_dma_bridge_buggy; 1428c2ecf20Sopenharmony_ci#else 1438c2ecf20Sopenharmony_ci#define isa_dma_bridge_buggy (0) 1448c2ecf20Sopenharmony_ci#endif 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_ci#endif /* __ASM_SH_DMA_H */ 147