18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * arch/sh/drivers/superhyway/ops-sh4-202.c 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * SuperHyway bus support for SH4-202 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * Copyright (C) 2005 Paul Mundt 88c2ecf20Sopenharmony_ci */ 98c2ecf20Sopenharmony_ci#include <linux/kernel.h> 108c2ecf20Sopenharmony_ci#include <linux/init.h> 118c2ecf20Sopenharmony_ci#include <linux/superhyway.h> 128c2ecf20Sopenharmony_ci#include <linux/string.h> 138c2ecf20Sopenharmony_ci#include <asm/addrspace.h> 148c2ecf20Sopenharmony_ci#include <asm/io.h> 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci#define PHYS_EMI_CBLOCK P4SEGADDR(0x1ec00000) 178c2ecf20Sopenharmony_ci#define PHYS_EMI_DBLOCK P4SEGADDR(0x08000000) 188c2ecf20Sopenharmony_ci#define PHYS_FEMI_CBLOCK P4SEGADDR(0x1f800000) 198c2ecf20Sopenharmony_ci#define PHYS_FEMI_DBLOCK P4SEGADDR(0x00000000) 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci#define PHYS_EPBR_BLOCK P4SEGADDR(0x1de00000) 228c2ecf20Sopenharmony_ci#define PHYS_DMAC_BLOCK P4SEGADDR(0x1fa00000) 238c2ecf20Sopenharmony_ci#define PHYS_PBR_BLOCK P4SEGADDR(0x1fc00000) 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_cistatic struct resource emi_resources[] = { 268c2ecf20Sopenharmony_ci [0] = { 278c2ecf20Sopenharmony_ci .start = PHYS_EMI_CBLOCK, 288c2ecf20Sopenharmony_ci .end = PHYS_EMI_CBLOCK + 0x00300000 - 1, 298c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 308c2ecf20Sopenharmony_ci }, 318c2ecf20Sopenharmony_ci [1] = { 328c2ecf20Sopenharmony_ci .start = PHYS_EMI_DBLOCK, 338c2ecf20Sopenharmony_ci .end = PHYS_EMI_DBLOCK + 0x08000000 - 1, 348c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 358c2ecf20Sopenharmony_ci }, 368c2ecf20Sopenharmony_ci}; 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_cistatic struct superhyway_device emi_device = { 398c2ecf20Sopenharmony_ci .name = "emi", 408c2ecf20Sopenharmony_ci .num_resources = ARRAY_SIZE(emi_resources), 418c2ecf20Sopenharmony_ci .resource = emi_resources, 428c2ecf20Sopenharmony_ci}; 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_cistatic struct resource femi_resources[] = { 458c2ecf20Sopenharmony_ci [0] = { 468c2ecf20Sopenharmony_ci .start = PHYS_FEMI_CBLOCK, 478c2ecf20Sopenharmony_ci .end = PHYS_FEMI_CBLOCK + 0x00100000 - 1, 488c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 498c2ecf20Sopenharmony_ci }, 508c2ecf20Sopenharmony_ci [1] = { 518c2ecf20Sopenharmony_ci .start = PHYS_FEMI_DBLOCK, 528c2ecf20Sopenharmony_ci .end = PHYS_FEMI_DBLOCK + 0x08000000 - 1, 538c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 548c2ecf20Sopenharmony_ci }, 558c2ecf20Sopenharmony_ci}; 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_cistatic struct superhyway_device femi_device = { 588c2ecf20Sopenharmony_ci .name = "femi", 598c2ecf20Sopenharmony_ci .num_resources = ARRAY_SIZE(femi_resources), 608c2ecf20Sopenharmony_ci .resource = femi_resources, 618c2ecf20Sopenharmony_ci}; 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_cistatic struct resource epbr_resources[] = { 648c2ecf20Sopenharmony_ci [0] = { 658c2ecf20Sopenharmony_ci .start = P4SEGADDR(0x1e7ffff8), 668c2ecf20Sopenharmony_ci .end = P4SEGADDR(0x1e7ffff8 + (sizeof(u32) * 2) - 1), 678c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 688c2ecf20Sopenharmony_ci }, 698c2ecf20Sopenharmony_ci [1] = { 708c2ecf20Sopenharmony_ci .start = PHYS_EPBR_BLOCK, 718c2ecf20Sopenharmony_ci .end = PHYS_EPBR_BLOCK + 0x00a00000 - 1, 728c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 738c2ecf20Sopenharmony_ci }, 748c2ecf20Sopenharmony_ci}; 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_cistatic struct superhyway_device epbr_device = { 778c2ecf20Sopenharmony_ci .name = "epbr", 788c2ecf20Sopenharmony_ci .num_resources = ARRAY_SIZE(epbr_resources), 798c2ecf20Sopenharmony_ci .resource = epbr_resources, 808c2ecf20Sopenharmony_ci}; 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_cistatic struct resource dmac_resource = { 838c2ecf20Sopenharmony_ci .start = PHYS_DMAC_BLOCK, 848c2ecf20Sopenharmony_ci .end = PHYS_DMAC_BLOCK + 0x00100000 - 1, 858c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 868c2ecf20Sopenharmony_ci}; 878c2ecf20Sopenharmony_ci 888c2ecf20Sopenharmony_cistatic struct superhyway_device dmac_device = { 898c2ecf20Sopenharmony_ci .name = "dmac", 908c2ecf20Sopenharmony_ci .num_resources = 1, 918c2ecf20Sopenharmony_ci .resource = &dmac_resource, 928c2ecf20Sopenharmony_ci}; 938c2ecf20Sopenharmony_ci 948c2ecf20Sopenharmony_cistatic struct resource pbr_resources[] = { 958c2ecf20Sopenharmony_ci [0] = { 968c2ecf20Sopenharmony_ci .start = P4SEGADDR(0x1ffffff8), 978c2ecf20Sopenharmony_ci .end = P4SEGADDR(0x1ffffff8 + (sizeof(u32) * 2) - 1), 988c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 998c2ecf20Sopenharmony_ci }, 1008c2ecf20Sopenharmony_ci [1] = { 1018c2ecf20Sopenharmony_ci .start = PHYS_PBR_BLOCK, 1028c2ecf20Sopenharmony_ci .end = PHYS_PBR_BLOCK + 0x00400000 - (sizeof(u32) * 2) - 1, 1038c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 1048c2ecf20Sopenharmony_ci }, 1058c2ecf20Sopenharmony_ci}; 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_cistatic struct superhyway_device pbr_device = { 1088c2ecf20Sopenharmony_ci .name = "pbr", 1098c2ecf20Sopenharmony_ci .num_resources = ARRAY_SIZE(pbr_resources), 1108c2ecf20Sopenharmony_ci .resource = pbr_resources, 1118c2ecf20Sopenharmony_ci}; 1128c2ecf20Sopenharmony_ci 1138c2ecf20Sopenharmony_cistatic struct superhyway_device *sh4202_devices[] __initdata = { 1148c2ecf20Sopenharmony_ci &emi_device, &femi_device, &epbr_device, &dmac_device, &pbr_device, 1158c2ecf20Sopenharmony_ci}; 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_cistatic int sh4202_read_vcr(unsigned long base, struct superhyway_vcr_info *vcr) 1188c2ecf20Sopenharmony_ci{ 1198c2ecf20Sopenharmony_ci u32 vcrh, vcrl; 1208c2ecf20Sopenharmony_ci u64 tmp; 1218c2ecf20Sopenharmony_ci 1228c2ecf20Sopenharmony_ci /* 1238c2ecf20Sopenharmony_ci * XXX: Even though the SH4-202 Evaluation Device documentation 1248c2ecf20Sopenharmony_ci * indicates that VCRL is mapped first with VCRH at a + 0x04 1258c2ecf20Sopenharmony_ci * offset, the opposite seems to be true. 1268c2ecf20Sopenharmony_ci * 1278c2ecf20Sopenharmony_ci * Some modules (PBR and ePBR for instance) also appear to have 1288c2ecf20Sopenharmony_ci * VCRL/VCRH flipped in the documentation, but on the SH4-202 1298c2ecf20Sopenharmony_ci * itself it appears that these are all consistently mapped with 1308c2ecf20Sopenharmony_ci * VCRH preceding VCRL. 1318c2ecf20Sopenharmony_ci * 1328c2ecf20Sopenharmony_ci * Do not trust the documentation, for it is evil. 1338c2ecf20Sopenharmony_ci */ 1348c2ecf20Sopenharmony_ci vcrh = __raw_readl(base); 1358c2ecf20Sopenharmony_ci vcrl = __raw_readl(base + sizeof(u32)); 1368c2ecf20Sopenharmony_ci 1378c2ecf20Sopenharmony_ci tmp = ((u64)vcrh << 32) | vcrl; 1388c2ecf20Sopenharmony_ci memcpy(vcr, &tmp, sizeof(u64)); 1398c2ecf20Sopenharmony_ci 1408c2ecf20Sopenharmony_ci return 0; 1418c2ecf20Sopenharmony_ci} 1428c2ecf20Sopenharmony_ci 1438c2ecf20Sopenharmony_cistatic int sh4202_write_vcr(unsigned long base, struct superhyway_vcr_info vcr) 1448c2ecf20Sopenharmony_ci{ 1458c2ecf20Sopenharmony_ci u64 tmp = *(u64 *)&vcr; 1468c2ecf20Sopenharmony_ci 1478c2ecf20Sopenharmony_ci __raw_writel((tmp >> 32) & 0xffffffff, base); 1488c2ecf20Sopenharmony_ci __raw_writel(tmp & 0xffffffff, base + sizeof(u32)); 1498c2ecf20Sopenharmony_ci 1508c2ecf20Sopenharmony_ci return 0; 1518c2ecf20Sopenharmony_ci} 1528c2ecf20Sopenharmony_ci 1538c2ecf20Sopenharmony_cistatic struct superhyway_ops sh4202_superhyway_ops = { 1548c2ecf20Sopenharmony_ci .read_vcr = sh4202_read_vcr, 1558c2ecf20Sopenharmony_ci .write_vcr = sh4202_write_vcr, 1568c2ecf20Sopenharmony_ci}; 1578c2ecf20Sopenharmony_ci 1588c2ecf20Sopenharmony_cistruct superhyway_bus superhyway_channels[] = { 1598c2ecf20Sopenharmony_ci { &sh4202_superhyway_ops, }, 1608c2ecf20Sopenharmony_ci { 0, }, 1618c2ecf20Sopenharmony_ci}; 1628c2ecf20Sopenharmony_ci 1638c2ecf20Sopenharmony_ciint __init superhyway_scan_bus(struct superhyway_bus *bus) 1648c2ecf20Sopenharmony_ci{ 1658c2ecf20Sopenharmony_ci return superhyway_add_devices(bus, sh4202_devices, 1668c2ecf20Sopenharmony_ci ARRAY_SIZE(sh4202_devices)); 1678c2ecf20Sopenharmony_ci} 1688c2ecf20Sopenharmony_ci 169