18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci *	Copyright (C) 2000 YAEGASHI Takeshi
48c2ecf20Sopenharmony_ci *	Hitachi HD64461 companion chip support
58c2ecf20Sopenharmony_ci */
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_ci#include <linux/sched.h>
88c2ecf20Sopenharmony_ci#include <linux/module.h>
98c2ecf20Sopenharmony_ci#include <linux/kernel.h>
108c2ecf20Sopenharmony_ci#include <linux/param.h>
118c2ecf20Sopenharmony_ci#include <linux/interrupt.h>
128c2ecf20Sopenharmony_ci#include <linux/init.h>
138c2ecf20Sopenharmony_ci#include <linux/irq.h>
148c2ecf20Sopenharmony_ci#include <linux/io.h>
158c2ecf20Sopenharmony_ci#include <asm/irq.h>
168c2ecf20Sopenharmony_ci#include <asm/hd64461.h>
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci/* This belongs in cpu specific */
198c2ecf20Sopenharmony_ci#define INTC_ICR1 0xA4140010UL
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_cistatic void hd64461_mask_irq(struct irq_data *data)
228c2ecf20Sopenharmony_ci{
238c2ecf20Sopenharmony_ci	unsigned int irq = data->irq;
248c2ecf20Sopenharmony_ci	unsigned short nimr;
258c2ecf20Sopenharmony_ci	unsigned short mask = 1 << (irq - HD64461_IRQBASE);
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci	nimr = __raw_readw(HD64461_NIMR);
288c2ecf20Sopenharmony_ci	nimr |= mask;
298c2ecf20Sopenharmony_ci	__raw_writew(nimr, HD64461_NIMR);
308c2ecf20Sopenharmony_ci}
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_cistatic void hd64461_unmask_irq(struct irq_data *data)
338c2ecf20Sopenharmony_ci{
348c2ecf20Sopenharmony_ci	unsigned int irq = data->irq;
358c2ecf20Sopenharmony_ci	unsigned short nimr;
368c2ecf20Sopenharmony_ci	unsigned short mask = 1 << (irq - HD64461_IRQBASE);
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_ci	nimr = __raw_readw(HD64461_NIMR);
398c2ecf20Sopenharmony_ci	nimr &= ~mask;
408c2ecf20Sopenharmony_ci	__raw_writew(nimr, HD64461_NIMR);
418c2ecf20Sopenharmony_ci}
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_cistatic void hd64461_mask_and_ack_irq(struct irq_data *data)
448c2ecf20Sopenharmony_ci{
458c2ecf20Sopenharmony_ci	hd64461_mask_irq(data);
468c2ecf20Sopenharmony_ci
478c2ecf20Sopenharmony_ci#ifdef CONFIG_HD64461_ENABLER
488c2ecf20Sopenharmony_ci	if (data->irq == HD64461_IRQBASE + 13)
498c2ecf20Sopenharmony_ci		__raw_writeb(0x00, HD64461_PCC1CSCR);
508c2ecf20Sopenharmony_ci#endif
518c2ecf20Sopenharmony_ci}
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_cistatic struct irq_chip hd64461_irq_chip = {
548c2ecf20Sopenharmony_ci	.name		= "HD64461-IRQ",
558c2ecf20Sopenharmony_ci	.irq_mask	= hd64461_mask_irq,
568c2ecf20Sopenharmony_ci	.irq_mask_ack	= hd64461_mask_and_ack_irq,
578c2ecf20Sopenharmony_ci	.irq_unmask	= hd64461_unmask_irq,
588c2ecf20Sopenharmony_ci};
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_cistatic void hd64461_irq_demux(struct irq_desc *desc)
618c2ecf20Sopenharmony_ci{
628c2ecf20Sopenharmony_ci	unsigned short intv = __raw_readw(HD64461_NIRR);
638c2ecf20Sopenharmony_ci	unsigned int ext_irq = HD64461_IRQBASE;
648c2ecf20Sopenharmony_ci
658c2ecf20Sopenharmony_ci	intv &= (1 << HD64461_IRQ_NUM) - 1;
668c2ecf20Sopenharmony_ci
678c2ecf20Sopenharmony_ci	for (; intv; intv >>= 1, ext_irq++) {
688c2ecf20Sopenharmony_ci		if (!(intv & 1))
698c2ecf20Sopenharmony_ci			continue;
708c2ecf20Sopenharmony_ci
718c2ecf20Sopenharmony_ci		generic_handle_irq(ext_irq);
728c2ecf20Sopenharmony_ci	}
738c2ecf20Sopenharmony_ci}
748c2ecf20Sopenharmony_ci
758c2ecf20Sopenharmony_ciint __init setup_hd64461(void)
768c2ecf20Sopenharmony_ci{
778c2ecf20Sopenharmony_ci	int irq_base, i;
788c2ecf20Sopenharmony_ci
798c2ecf20Sopenharmony_ci	printk(KERN_INFO
808c2ecf20Sopenharmony_ci	       "HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n",
818c2ecf20Sopenharmony_ci	       HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE,
828c2ecf20Sopenharmony_ci	       HD64461_IRQBASE + 15);
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci/* Should be at processor specific part.. */
858c2ecf20Sopenharmony_ci#if defined(CONFIG_CPU_SUBTYPE_SH7709)
868c2ecf20Sopenharmony_ci	__raw_writew(0x2240, INTC_ICR1);
878c2ecf20Sopenharmony_ci#endif
888c2ecf20Sopenharmony_ci	__raw_writew(0xffff, HD64461_NIMR);
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_ci	irq_base = irq_alloc_descs(HD64461_IRQBASE, HD64461_IRQBASE, 16, -1);
918c2ecf20Sopenharmony_ci	if (IS_ERR_VALUE(irq_base)) {
928c2ecf20Sopenharmony_ci		pr_err("%s: failed hooking irqs for HD64461\n", __func__);
938c2ecf20Sopenharmony_ci		return irq_base;
948c2ecf20Sopenharmony_ci	}
958c2ecf20Sopenharmony_ci
968c2ecf20Sopenharmony_ci	for (i = 0; i < 16; i++)
978c2ecf20Sopenharmony_ci		irq_set_chip_and_handler(irq_base + i, &hd64461_irq_chip,
988c2ecf20Sopenharmony_ci					 handle_level_irq);
998c2ecf20Sopenharmony_ci
1008c2ecf20Sopenharmony_ci	irq_set_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux);
1018c2ecf20Sopenharmony_ci	irq_set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW);
1028c2ecf20Sopenharmony_ci
1038c2ecf20Sopenharmony_ci#ifdef CONFIG_HD64461_ENABLER
1048c2ecf20Sopenharmony_ci	printk(KERN_INFO "HD64461: enabling PCMCIA devices\n");
1058c2ecf20Sopenharmony_ci	__raw_writeb(0x4c, HD64461_PCC1CSCIER);
1068c2ecf20Sopenharmony_ci	__raw_writeb(0x00, HD64461_PCC1CSCR);
1078c2ecf20Sopenharmony_ci#endif
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_ci	return 0;
1108c2ecf20Sopenharmony_ci}
1118c2ecf20Sopenharmony_ci
1128c2ecf20Sopenharmony_cimodule_init(setup_hd64461);
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