18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * ALPHAPROJECT AP-SH4A-3A Support.
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright (C) 2010 ALPHAPROJECT Co.,Ltd.
68c2ecf20Sopenharmony_ci * Copyright (C) 2008  Yoshihiro Shimoda
78c2ecf20Sopenharmony_ci * Copyright (C) 2009  Paul Mundt
88c2ecf20Sopenharmony_ci */
98c2ecf20Sopenharmony_ci#include <linux/init.h>
108c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
118c2ecf20Sopenharmony_ci#include <linux/io.h>
128c2ecf20Sopenharmony_ci#include <linux/mtd/physmap.h>
138c2ecf20Sopenharmony_ci#include <linux/regulator/fixed.h>
148c2ecf20Sopenharmony_ci#include <linux/regulator/machine.h>
158c2ecf20Sopenharmony_ci#include <linux/smsc911x.h>
168c2ecf20Sopenharmony_ci#include <linux/irq.h>
178c2ecf20Sopenharmony_ci#include <linux/clk.h>
188c2ecf20Sopenharmony_ci#include <asm/machvec.h>
198c2ecf20Sopenharmony_ci#include <linux/sizes.h>
208c2ecf20Sopenharmony_ci#include <asm/clock.h>
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_cistatic struct mtd_partition nor_flash_partitions[] = {
238c2ecf20Sopenharmony_ci	{
248c2ecf20Sopenharmony_ci		.name		= "loader",
258c2ecf20Sopenharmony_ci		.offset		= 0x00000000,
268c2ecf20Sopenharmony_ci		.size		= 512 * 1024,
278c2ecf20Sopenharmony_ci	},
288c2ecf20Sopenharmony_ci	{
298c2ecf20Sopenharmony_ci		.name		= "bootenv",
308c2ecf20Sopenharmony_ci		.offset		= MTDPART_OFS_APPEND,
318c2ecf20Sopenharmony_ci		.size		= 512 * 1024,
328c2ecf20Sopenharmony_ci	},
338c2ecf20Sopenharmony_ci	{
348c2ecf20Sopenharmony_ci		.name		= "kernel",
358c2ecf20Sopenharmony_ci		.offset		= MTDPART_OFS_APPEND,
368c2ecf20Sopenharmony_ci		.size		= 4 * 1024 * 1024,
378c2ecf20Sopenharmony_ci	},
388c2ecf20Sopenharmony_ci	{
398c2ecf20Sopenharmony_ci		.name		= "data",
408c2ecf20Sopenharmony_ci		.offset		= MTDPART_OFS_APPEND,
418c2ecf20Sopenharmony_ci		.size		= MTDPART_SIZ_FULL,
428c2ecf20Sopenharmony_ci	},
438c2ecf20Sopenharmony_ci};
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_cistatic struct physmap_flash_data nor_flash_data = {
468c2ecf20Sopenharmony_ci	.width		= 4,
478c2ecf20Sopenharmony_ci	.parts		= nor_flash_partitions,
488c2ecf20Sopenharmony_ci	.nr_parts	= ARRAY_SIZE(nor_flash_partitions),
498c2ecf20Sopenharmony_ci};
508c2ecf20Sopenharmony_ci
518c2ecf20Sopenharmony_cistatic struct resource nor_flash_resources[] = {
528c2ecf20Sopenharmony_ci	[0]	= {
538c2ecf20Sopenharmony_ci		.start	= 0x00000000,
548c2ecf20Sopenharmony_ci		.end	= 0x01000000 - 1,
558c2ecf20Sopenharmony_ci		.flags	= IORESOURCE_MEM,
568c2ecf20Sopenharmony_ci	}
578c2ecf20Sopenharmony_ci};
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_cistatic struct platform_device nor_flash_device = {
608c2ecf20Sopenharmony_ci	.name		= "physmap-flash",
618c2ecf20Sopenharmony_ci	.dev		= {
628c2ecf20Sopenharmony_ci		.platform_data	= &nor_flash_data,
638c2ecf20Sopenharmony_ci	},
648c2ecf20Sopenharmony_ci	.num_resources	= ARRAY_SIZE(nor_flash_resources),
658c2ecf20Sopenharmony_ci	.resource	= nor_flash_resources,
668c2ecf20Sopenharmony_ci};
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ci/* Dummy supplies, where voltage doesn't matter */
698c2ecf20Sopenharmony_cistatic struct regulator_consumer_supply dummy_supplies[] = {
708c2ecf20Sopenharmony_ci	REGULATOR_SUPPLY("vddvario", "smsc911x"),
718c2ecf20Sopenharmony_ci	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
728c2ecf20Sopenharmony_ci};
738c2ecf20Sopenharmony_ci
748c2ecf20Sopenharmony_cistatic struct resource smsc911x_resources[] = {
758c2ecf20Sopenharmony_ci	[0] = {
768c2ecf20Sopenharmony_ci		.name		= "smsc911x-memory",
778c2ecf20Sopenharmony_ci		.start		= 0xA4000000,
788c2ecf20Sopenharmony_ci		.end		= 0xA4000000 + SZ_256 - 1,
798c2ecf20Sopenharmony_ci		.flags		= IORESOURCE_MEM,
808c2ecf20Sopenharmony_ci	},
818c2ecf20Sopenharmony_ci	[1] = {
828c2ecf20Sopenharmony_ci		.name		= "smsc911x-irq",
838c2ecf20Sopenharmony_ci		.start		= evt2irq(0x200),
848c2ecf20Sopenharmony_ci		.end		= evt2irq(0x200),
858c2ecf20Sopenharmony_ci		.flags		= IORESOURCE_IRQ,
868c2ecf20Sopenharmony_ci	},
878c2ecf20Sopenharmony_ci};
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_cistatic struct smsc911x_platform_config smsc911x_config = {
908c2ecf20Sopenharmony_ci	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
918c2ecf20Sopenharmony_ci	.irq_type	= SMSC911X_IRQ_TYPE_OPEN_DRAIN,
928c2ecf20Sopenharmony_ci	.flags		= SMSC911X_USE_16BIT,
938c2ecf20Sopenharmony_ci	.phy_interface	= PHY_INTERFACE_MODE_MII,
948c2ecf20Sopenharmony_ci};
958c2ecf20Sopenharmony_ci
968c2ecf20Sopenharmony_cistatic struct platform_device smsc911x_device = {
978c2ecf20Sopenharmony_ci	.name		= "smsc911x",
988c2ecf20Sopenharmony_ci	.id		= -1,
998c2ecf20Sopenharmony_ci	.num_resources	= ARRAY_SIZE(smsc911x_resources),
1008c2ecf20Sopenharmony_ci	.resource	= smsc911x_resources,
1018c2ecf20Sopenharmony_ci	.dev = {
1028c2ecf20Sopenharmony_ci		.platform_data = &smsc911x_config,
1038c2ecf20Sopenharmony_ci	},
1048c2ecf20Sopenharmony_ci};
1058c2ecf20Sopenharmony_ci
1068c2ecf20Sopenharmony_cistatic struct platform_device *apsh4a3a_devices[] __initdata = {
1078c2ecf20Sopenharmony_ci	&nor_flash_device,
1088c2ecf20Sopenharmony_ci	&smsc911x_device,
1098c2ecf20Sopenharmony_ci};
1108c2ecf20Sopenharmony_ci
1118c2ecf20Sopenharmony_cistatic int __init apsh4a3a_devices_setup(void)
1128c2ecf20Sopenharmony_ci{
1138c2ecf20Sopenharmony_ci	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
1148c2ecf20Sopenharmony_ci
1158c2ecf20Sopenharmony_ci	return platform_add_devices(apsh4a3a_devices,
1168c2ecf20Sopenharmony_ci				    ARRAY_SIZE(apsh4a3a_devices));
1178c2ecf20Sopenharmony_ci}
1188c2ecf20Sopenharmony_cidevice_initcall(apsh4a3a_devices_setup);
1198c2ecf20Sopenharmony_ci
1208c2ecf20Sopenharmony_cistatic int apsh4a3a_clk_init(void)
1218c2ecf20Sopenharmony_ci{
1228c2ecf20Sopenharmony_ci	struct clk *clk;
1238c2ecf20Sopenharmony_ci	int ret;
1248c2ecf20Sopenharmony_ci
1258c2ecf20Sopenharmony_ci	clk = clk_get(NULL, "extal");
1268c2ecf20Sopenharmony_ci	if (IS_ERR(clk))
1278c2ecf20Sopenharmony_ci		return PTR_ERR(clk);
1288c2ecf20Sopenharmony_ci	ret = clk_set_rate(clk, 33333000);
1298c2ecf20Sopenharmony_ci	clk_put(clk);
1308c2ecf20Sopenharmony_ci
1318c2ecf20Sopenharmony_ci	return ret;
1328c2ecf20Sopenharmony_ci}
1338c2ecf20Sopenharmony_ci
1348c2ecf20Sopenharmony_ci/* Initialize the board */
1358c2ecf20Sopenharmony_cistatic void __init apsh4a3a_setup(char **cmdline_p)
1368c2ecf20Sopenharmony_ci{
1378c2ecf20Sopenharmony_ci	printk(KERN_INFO "Alpha Project AP-SH4A-3A support:\n");
1388c2ecf20Sopenharmony_ci}
1398c2ecf20Sopenharmony_ci
1408c2ecf20Sopenharmony_cistatic void __init apsh4a3a_init_irq(void)
1418c2ecf20Sopenharmony_ci{
1428c2ecf20Sopenharmony_ci	plat_irq_setup_pins(IRQ_MODE_IRQ7654);
1438c2ecf20Sopenharmony_ci}
1448c2ecf20Sopenharmony_ci
1458c2ecf20Sopenharmony_ci/* Return the board specific boot mode pin configuration */
1468c2ecf20Sopenharmony_cistatic int apsh4a3a_mode_pins(void)
1478c2ecf20Sopenharmony_ci{
1488c2ecf20Sopenharmony_ci	int value = 0;
1498c2ecf20Sopenharmony_ci
1508c2ecf20Sopenharmony_ci	/* These are the factory default settings of SW1 and SW2.
1518c2ecf20Sopenharmony_ci	 * If you change these dip switches then you will need to
1528c2ecf20Sopenharmony_ci	 * adjust the values below as well.
1538c2ecf20Sopenharmony_ci	 */
1548c2ecf20Sopenharmony_ci	value &= ~MODE_PIN0;  /* Clock Mode 16 */
1558c2ecf20Sopenharmony_ci	value &= ~MODE_PIN1;
1568c2ecf20Sopenharmony_ci	value &= ~MODE_PIN2;
1578c2ecf20Sopenharmony_ci	value &= ~MODE_PIN3;
1588c2ecf20Sopenharmony_ci	value |=  MODE_PIN4;
1598c2ecf20Sopenharmony_ci	value &= ~MODE_PIN5;  /* 16-bit Area0 bus width */
1608c2ecf20Sopenharmony_ci	value |=  MODE_PIN6;  /* Area 0 SRAM interface */
1618c2ecf20Sopenharmony_ci	value |=  MODE_PIN7;
1628c2ecf20Sopenharmony_ci	value |=  MODE_PIN8;  /* Little Endian */
1638c2ecf20Sopenharmony_ci	value |=  MODE_PIN9;  /* Master Mode */
1648c2ecf20Sopenharmony_ci	value |=  MODE_PIN10; /* Crystal resonator */
1658c2ecf20Sopenharmony_ci	value |=  MODE_PIN11; /* Display Unit */
1668c2ecf20Sopenharmony_ci	value |=  MODE_PIN12;
1678c2ecf20Sopenharmony_ci	value &= ~MODE_PIN13; /* 29-bit address mode */
1688c2ecf20Sopenharmony_ci	value |=  MODE_PIN14; /* No PLL step-up */
1698c2ecf20Sopenharmony_ci
1708c2ecf20Sopenharmony_ci	return value;
1718c2ecf20Sopenharmony_ci}
1728c2ecf20Sopenharmony_ci
1738c2ecf20Sopenharmony_ci/*
1748c2ecf20Sopenharmony_ci * The Machine Vector
1758c2ecf20Sopenharmony_ci */
1768c2ecf20Sopenharmony_cistatic struct sh_machine_vector mv_apsh4a3a __initmv = {
1778c2ecf20Sopenharmony_ci	.mv_name		= "AP-SH4A-3A",
1788c2ecf20Sopenharmony_ci	.mv_setup		= apsh4a3a_setup,
1798c2ecf20Sopenharmony_ci	.mv_clk_init		= apsh4a3a_clk_init,
1808c2ecf20Sopenharmony_ci	.mv_init_irq		= apsh4a3a_init_irq,
1818c2ecf20Sopenharmony_ci	.mv_mode_pins		= apsh4a3a_mode_pins,
1828c2ecf20Sopenharmony_ci};
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