1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2/*
3 *  S390 version
4 *    Copyright IBM Corp. 1999, 2000
5 *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 */
7
8#ifndef _UAPI_S390_PTRACE_H
9#define _UAPI_S390_PTRACE_H
10
11/*
12 * Offsets in the user_regs_struct. They are used for the ptrace
13 * system call and in entry.S
14 */
15#ifndef __s390x__
16
17#define PT_PSWMASK  0x00
18#define PT_PSWADDR  0x04
19#define PT_GPR0     0x08
20#define PT_GPR1     0x0C
21#define PT_GPR2     0x10
22#define PT_GPR3     0x14
23#define PT_GPR4     0x18
24#define PT_GPR5     0x1C
25#define PT_GPR6     0x20
26#define PT_GPR7     0x24
27#define PT_GPR8     0x28
28#define PT_GPR9     0x2C
29#define PT_GPR10    0x30
30#define PT_GPR11    0x34
31#define PT_GPR12    0x38
32#define PT_GPR13    0x3C
33#define PT_GPR14    0x40
34#define PT_GPR15    0x44
35#define PT_ACR0     0x48
36#define PT_ACR1     0x4C
37#define PT_ACR2     0x50
38#define PT_ACR3     0x54
39#define PT_ACR4	    0x58
40#define PT_ACR5	    0x5C
41#define PT_ACR6	    0x60
42#define PT_ACR7	    0x64
43#define PT_ACR8	    0x68
44#define PT_ACR9	    0x6C
45#define PT_ACR10    0x70
46#define PT_ACR11    0x74
47#define PT_ACR12    0x78
48#define PT_ACR13    0x7C
49#define PT_ACR14    0x80
50#define PT_ACR15    0x84
51#define PT_ORIGGPR2 0x88
52#define PT_FPC	    0x90
53/*
54 * A nasty fact of life that the ptrace api
55 * only supports passing of longs.
56 */
57#define PT_FPR0_HI  0x98
58#define PT_FPR0_LO  0x9C
59#define PT_FPR1_HI  0xA0
60#define PT_FPR1_LO  0xA4
61#define PT_FPR2_HI  0xA8
62#define PT_FPR2_LO  0xAC
63#define PT_FPR3_HI  0xB0
64#define PT_FPR3_LO  0xB4
65#define PT_FPR4_HI  0xB8
66#define PT_FPR4_LO  0xBC
67#define PT_FPR5_HI  0xC0
68#define PT_FPR5_LO  0xC4
69#define PT_FPR6_HI  0xC8
70#define PT_FPR6_LO  0xCC
71#define PT_FPR7_HI  0xD0
72#define PT_FPR7_LO  0xD4
73#define PT_FPR8_HI  0xD8
74#define PT_FPR8_LO  0XDC
75#define PT_FPR9_HI  0xE0
76#define PT_FPR9_LO  0xE4
77#define PT_FPR10_HI 0xE8
78#define PT_FPR10_LO 0xEC
79#define PT_FPR11_HI 0xF0
80#define PT_FPR11_LO 0xF4
81#define PT_FPR12_HI 0xF8
82#define PT_FPR12_LO 0xFC
83#define PT_FPR13_HI 0x100
84#define PT_FPR13_LO 0x104
85#define PT_FPR14_HI 0x108
86#define PT_FPR14_LO 0x10C
87#define PT_FPR15_HI 0x110
88#define PT_FPR15_LO 0x114
89#define PT_CR_9	    0x118
90#define PT_CR_10    0x11C
91#define PT_CR_11    0x120
92#define PT_IEEE_IP  0x13C
93#define PT_LASTOFF  PT_IEEE_IP
94#define PT_ENDREGS  0x140-1
95
96#define GPR_SIZE	4
97#define CR_SIZE		4
98
99#define STACK_FRAME_OVERHEAD	96	/* size of minimum stack frame */
100
101#else /* __s390x__ */
102
103#define PT_PSWMASK  0x00
104#define PT_PSWADDR  0x08
105#define PT_GPR0     0x10
106#define PT_GPR1     0x18
107#define PT_GPR2     0x20
108#define PT_GPR3     0x28
109#define PT_GPR4     0x30
110#define PT_GPR5     0x38
111#define PT_GPR6     0x40
112#define PT_GPR7     0x48
113#define PT_GPR8     0x50
114#define PT_GPR9     0x58
115#define PT_GPR10    0x60
116#define PT_GPR11    0x68
117#define PT_GPR12    0x70
118#define PT_GPR13    0x78
119#define PT_GPR14    0x80
120#define PT_GPR15    0x88
121#define PT_ACR0     0x90
122#define PT_ACR1     0x94
123#define PT_ACR2     0x98
124#define PT_ACR3     0x9C
125#define PT_ACR4	    0xA0
126#define PT_ACR5	    0xA4
127#define PT_ACR6	    0xA8
128#define PT_ACR7	    0xAC
129#define PT_ACR8	    0xB0
130#define PT_ACR9	    0xB4
131#define PT_ACR10    0xB8
132#define PT_ACR11    0xBC
133#define PT_ACR12    0xC0
134#define PT_ACR13    0xC4
135#define PT_ACR14    0xC8
136#define PT_ACR15    0xCC
137#define PT_ORIGGPR2 0xD0
138#define PT_FPC	    0xD8
139#define PT_FPR0     0xE0
140#define PT_FPR1     0xE8
141#define PT_FPR2     0xF0
142#define PT_FPR3     0xF8
143#define PT_FPR4     0x100
144#define PT_FPR5     0x108
145#define PT_FPR6     0x110
146#define PT_FPR7     0x118
147#define PT_FPR8     0x120
148#define PT_FPR9     0x128
149#define PT_FPR10    0x130
150#define PT_FPR11    0x138
151#define PT_FPR12    0x140
152#define PT_FPR13    0x148
153#define PT_FPR14    0x150
154#define PT_FPR15    0x158
155#define PT_CR_9     0x160
156#define PT_CR_10    0x168
157#define PT_CR_11    0x170
158#define PT_IEEE_IP  0x1A8
159#define PT_LASTOFF  PT_IEEE_IP
160#define PT_ENDREGS  0x1B0-1
161
162#define GPR_SIZE	8
163#define CR_SIZE		8
164
165#define STACK_FRAME_OVERHEAD	160	 /* size of minimum stack frame */
166
167#endif /* __s390x__ */
168
169#define NUM_GPRS	16
170#define NUM_FPRS	16
171#define NUM_CRS		16
172#define NUM_ACRS	16
173
174#define NUM_CR_WORDS	3
175
176#define FPR_SIZE	8
177#define FPC_SIZE	4
178#define FPC_PAD_SIZE	4 /* gcc insists on aligning the fpregs */
179#define ACR_SIZE	4
180
181
182#define PTRACE_OLDSETOPTIONS	     21
183
184#ifndef __ASSEMBLY__
185#include <linux/stddef.h>
186#include <linux/types.h>
187
188typedef union {
189	float	f;
190	double	d;
191	__u64	ui;
192	struct
193	{
194		__u32 hi;
195		__u32 lo;
196	} fp;
197} freg_t;
198
199typedef struct {
200	__u32	fpc;
201	__u32	pad;
202	freg_t	fprs[NUM_FPRS];
203} s390_fp_regs;
204
205#define FPC_EXCEPTION_MASK	0xF8000000
206#define FPC_FLAGS_MASK		0x00F80000
207#define FPC_DXC_MASK		0x0000FF00
208#define FPC_RM_MASK		0x00000003
209
210/* this typedef defines how a Program Status Word looks like */
211typedef struct {
212	unsigned long mask;
213	unsigned long addr;
214} __attribute__ ((aligned(8))) psw_t;
215
216#ifndef __s390x__
217
218#define PSW_MASK_PER		0x40000000UL
219#define PSW_MASK_DAT		0x04000000UL
220#define PSW_MASK_IO		0x02000000UL
221#define PSW_MASK_EXT		0x01000000UL
222#define PSW_MASK_KEY		0x00F00000UL
223#define PSW_MASK_BASE		0x00080000UL	/* always one */
224#define PSW_MASK_MCHECK		0x00040000UL
225#define PSW_MASK_WAIT		0x00020000UL
226#define PSW_MASK_PSTATE		0x00010000UL
227#define PSW_MASK_ASC		0x0000C000UL
228#define PSW_MASK_CC		0x00003000UL
229#define PSW_MASK_PM		0x00000F00UL
230#define PSW_MASK_RI		0x00000000UL
231#define PSW_MASK_EA		0x00000000UL
232#define PSW_MASK_BA		0x00000000UL
233
234#define PSW_MASK_USER		0x0000FF00UL
235
236#define PSW_ADDR_AMODE		0x80000000UL
237#define PSW_ADDR_INSN		0x7FFFFFFFUL
238
239#define PSW_DEFAULT_KEY		(((unsigned long) PAGE_DEFAULT_ACC) << 20)
240
241#define PSW_ASC_PRIMARY		0x00000000UL
242#define PSW_ASC_ACCREG		0x00004000UL
243#define PSW_ASC_SECONDARY	0x00008000UL
244#define PSW_ASC_HOME		0x0000C000UL
245
246#else /* __s390x__ */
247
248#define PSW_MASK_PER		0x4000000000000000UL
249#define PSW_MASK_DAT		0x0400000000000000UL
250#define PSW_MASK_IO		0x0200000000000000UL
251#define PSW_MASK_EXT		0x0100000000000000UL
252#define PSW_MASK_BASE		0x0000000000000000UL
253#define PSW_MASK_KEY		0x00F0000000000000UL
254#define PSW_MASK_MCHECK		0x0004000000000000UL
255#define PSW_MASK_WAIT		0x0002000000000000UL
256#define PSW_MASK_PSTATE		0x0001000000000000UL
257#define PSW_MASK_ASC		0x0000C00000000000UL
258#define PSW_MASK_CC		0x0000300000000000UL
259#define PSW_MASK_PM		0x00000F0000000000UL
260#define PSW_MASK_RI		0x0000008000000000UL
261#define PSW_MASK_EA		0x0000000100000000UL
262#define PSW_MASK_BA		0x0000000080000000UL
263
264#define PSW_MASK_USER		0x0000FF0180000000UL
265
266#define PSW_ADDR_AMODE		0x0000000000000000UL
267#define PSW_ADDR_INSN		0xFFFFFFFFFFFFFFFFUL
268
269#define PSW_DEFAULT_KEY		(((unsigned long) PAGE_DEFAULT_ACC) << 52)
270
271#define PSW_ASC_PRIMARY		0x0000000000000000UL
272#define PSW_ASC_ACCREG		0x0000400000000000UL
273#define PSW_ASC_SECONDARY	0x0000800000000000UL
274#define PSW_ASC_HOME		0x0000C00000000000UL
275
276#endif /* __s390x__ */
277
278
279/*
280 * The s390_regs structure is used to define the elf_gregset_t.
281 */
282typedef struct {
283	psw_t psw;
284	unsigned long gprs[NUM_GPRS];
285	unsigned int  acrs[NUM_ACRS];
286	unsigned long orig_gpr2;
287} s390_regs;
288
289/*
290 * The user_pt_regs structure exports the beginning of
291 * the in-kernel pt_regs structure to user space.
292 */
293typedef struct {
294	unsigned long args[1];
295	psw_t psw;
296	unsigned long gprs[NUM_GPRS];
297} user_pt_regs;
298
299/*
300 * Now for the user space program event recording (trace) definitions.
301 * The following structures are used only for the ptrace interface, don't
302 * touch or even look at it if you don't want to modify the user-space
303 * ptrace interface. In particular stay away from it for in-kernel PER.
304 */
305typedef struct {
306	unsigned long cr[NUM_CR_WORDS];
307} per_cr_words;
308
309#define PER_EM_MASK 0xE8000000UL
310
311typedef struct {
312#ifdef __s390x__
313	unsigned		       : 32;
314#endif /* __s390x__ */
315	unsigned em_branching	       : 1;
316	unsigned em_instruction_fetch  : 1;
317	/*
318	 * Switching on storage alteration automatically fixes
319	 * the storage alteration event bit in the users std.
320	 */
321	unsigned em_storage_alteration : 1;
322	unsigned em_gpr_alt_unused     : 1;
323	unsigned em_store_real_address : 1;
324	unsigned		       : 3;
325	unsigned branch_addr_ctl       : 1;
326	unsigned		       : 1;
327	unsigned storage_alt_space_ctl : 1;
328	unsigned		       : 21;
329	unsigned long starting_addr;
330	unsigned long ending_addr;
331} per_cr_bits;
332
333typedef struct {
334	unsigned short perc_atmid;
335	unsigned long address;
336	unsigned char access_id;
337} per_lowcore_words;
338
339typedef struct {
340	unsigned perc_branching		 : 1;
341	unsigned perc_instruction_fetch  : 1;
342	unsigned perc_storage_alteration : 1;
343	unsigned perc_gpr_alt_unused	 : 1;
344	unsigned perc_store_real_address : 1;
345	unsigned			 : 3;
346	unsigned atmid_psw_bit_31	 : 1;
347	unsigned atmid_validity_bit	 : 1;
348	unsigned atmid_psw_bit_32	 : 1;
349	unsigned atmid_psw_bit_5	 : 1;
350	unsigned atmid_psw_bit_16	 : 1;
351	unsigned atmid_psw_bit_17	 : 1;
352	unsigned si			 : 2;
353	unsigned long address;
354	unsigned			 : 4;
355	unsigned access_id		 : 4;
356} per_lowcore_bits;
357
358typedef struct {
359	union {
360		per_cr_words   words;
361		per_cr_bits    bits;
362	} control_regs;
363	/*
364	 * The single_step and instruction_fetch bits are obsolete,
365	 * the kernel always sets them to zero. To enable single
366	 * stepping use ptrace(PTRACE_SINGLESTEP) instead.
367	 */
368	unsigned  single_step	    : 1;
369	unsigned  instruction_fetch : 1;
370	unsigned		    : 30;
371	/*
372	 * These addresses are copied into cr10 & cr11 if single
373	 * stepping is switched off
374	 */
375	unsigned long starting_addr;
376	unsigned long ending_addr;
377	union {
378		per_lowcore_words words;
379		per_lowcore_bits  bits;
380	} lowcore;
381} per_struct;
382
383typedef struct {
384	unsigned int  len;
385	unsigned long kernel_addr;
386	unsigned long process_addr;
387} ptrace_area;
388
389/*
390 * S/390 specific non posix ptrace requests. I chose unusual values so
391 * they are unlikely to clash with future ptrace definitions.
392 */
393#define PTRACE_PEEKUSR_AREA	      0x5000
394#define PTRACE_POKEUSR_AREA	      0x5001
395#define PTRACE_PEEKTEXT_AREA	      0x5002
396#define PTRACE_PEEKDATA_AREA	      0x5003
397#define PTRACE_POKETEXT_AREA	      0x5004
398#define PTRACE_POKEDATA_AREA	      0x5005
399#define PTRACE_GET_LAST_BREAK	      0x5006
400#define PTRACE_PEEK_SYSTEM_CALL       0x5007
401#define PTRACE_POKE_SYSTEM_CALL	      0x5008
402#define PTRACE_ENABLE_TE	      0x5009
403#define PTRACE_DISABLE_TE	      0x5010
404#define PTRACE_TE_ABORT_RAND	      0x5011
405
406/*
407 * The numbers chosen here are somewhat arbitrary but absolutely MUST
408 * not overlap with any of the number assigned in <linux/ptrace.h>.
409 */
410#define PTRACE_SINGLEBLOCK	12	/* resume execution until next branch */
411
412/*
413 * PT_PROT definition is loosely based on hppa bsd definition in
414 * gdb/hppab-nat.c
415 */
416#define PTRACE_PROT			  21
417
418typedef enum {
419	ptprot_set_access_watchpoint,
420	ptprot_set_write_watchpoint,
421	ptprot_disable_watchpoint
422} ptprot_flags;
423
424typedef struct {
425	unsigned long lowaddr;
426	unsigned long hiaddr;
427	ptprot_flags prot;
428} ptprot_area;
429
430/* Sequence of bytes for breakpoint illegal instruction.  */
431#define S390_BREAKPOINT     {0x0,0x1}
432#define S390_BREAKPOINT_U16 ((__u16)0x0001)
433#define S390_SYSCALL_OPCODE ((__u16)0x0a00)
434#define S390_SYSCALL_SIZE   2
435
436/*
437 * The user_regs_struct defines the way the user registers are
438 * store on the stack for signal handling.
439 */
440struct user_regs_struct {
441	psw_t psw;
442	unsigned long gprs[NUM_GPRS];
443	unsigned int  acrs[NUM_ACRS];
444	unsigned long orig_gpr2;
445	s390_fp_regs fp_regs;
446	/*
447	 * These per registers are in here so that gdb can modify them
448	 * itself as there is no "official" ptrace interface for hardware
449	 * watchpoints. This is the way intel does it.
450	 */
451	per_struct per_info;
452	unsigned long ieee_instruction_pointer;	/* obsolete, always 0 */
453};
454
455#endif /* __ASSEMBLY__ */
456
457#endif /* _UAPI_S390_PTRACE_H */
458