18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci#ifndef _S390_TLB_H 38c2ecf20Sopenharmony_ci#define _S390_TLB_H 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci/* 68c2ecf20Sopenharmony_ci * TLB flushing on s390 is complicated. The following requirement 78c2ecf20Sopenharmony_ci * from the principles of operation is the most arduous: 88c2ecf20Sopenharmony_ci * 98c2ecf20Sopenharmony_ci * "A valid table entry must not be changed while it is attached 108c2ecf20Sopenharmony_ci * to any CPU and may be used for translation by that CPU except to 118c2ecf20Sopenharmony_ci * (1) invalidate the entry by using INVALIDATE PAGE TABLE ENTRY, 128c2ecf20Sopenharmony_ci * or INVALIDATE DAT TABLE ENTRY, (2) alter bits 56-63 of a page 138c2ecf20Sopenharmony_ci * table entry, or (3) make a change by means of a COMPARE AND SWAP 148c2ecf20Sopenharmony_ci * AND PURGE instruction that purges the TLB." 158c2ecf20Sopenharmony_ci * 168c2ecf20Sopenharmony_ci * The modification of a pte of an active mm struct therefore is 178c2ecf20Sopenharmony_ci * a two step process: i) invalidate the pte, ii) store the new pte. 188c2ecf20Sopenharmony_ci * This is true for the page protection bit as well. 198c2ecf20Sopenharmony_ci * The only possible optimization is to flush at the beginning of 208c2ecf20Sopenharmony_ci * a tlb_gather_mmu cycle if the mm_struct is currently not in use. 218c2ecf20Sopenharmony_ci * 228c2ecf20Sopenharmony_ci * Pages used for the page tables is a different story. FIXME: more 238c2ecf20Sopenharmony_ci */ 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_civoid __tlb_remove_table(void *_table); 268c2ecf20Sopenharmony_cistatic inline void tlb_flush(struct mmu_gather *tlb); 278c2ecf20Sopenharmony_cistatic inline bool __tlb_remove_page_size(struct mmu_gather *tlb, 288c2ecf20Sopenharmony_ci struct page *page, int page_size); 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci#define tlb_start_vma(tlb, vma) do { } while (0) 318c2ecf20Sopenharmony_ci#define tlb_end_vma(tlb, vma) do { } while (0) 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci#define tlb_flush tlb_flush 348c2ecf20Sopenharmony_ci#define pte_free_tlb pte_free_tlb 358c2ecf20Sopenharmony_ci#define pmd_free_tlb pmd_free_tlb 368c2ecf20Sopenharmony_ci#define p4d_free_tlb p4d_free_tlb 378c2ecf20Sopenharmony_ci#define pud_free_tlb pud_free_tlb 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci#include <asm/tlbflush.h> 408c2ecf20Sopenharmony_ci#include <asm-generic/tlb.h> 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ci/* 438c2ecf20Sopenharmony_ci * Release the page cache reference for a pte removed by 448c2ecf20Sopenharmony_ci * tlb_ptep_clear_flush. In both flush modes the tlb for a page cache page 458c2ecf20Sopenharmony_ci * has already been freed, so just do free_page_and_swap_cache. 468c2ecf20Sopenharmony_ci */ 478c2ecf20Sopenharmony_cistatic inline bool __tlb_remove_page_size(struct mmu_gather *tlb, 488c2ecf20Sopenharmony_ci struct page *page, int page_size) 498c2ecf20Sopenharmony_ci{ 508c2ecf20Sopenharmony_ci free_page_and_swap_cache(page); 518c2ecf20Sopenharmony_ci return false; 528c2ecf20Sopenharmony_ci} 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_cistatic inline void tlb_flush(struct mmu_gather *tlb) 558c2ecf20Sopenharmony_ci{ 568c2ecf20Sopenharmony_ci __tlb_flush_mm_lazy(tlb->mm); 578c2ecf20Sopenharmony_ci} 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ci/* 608c2ecf20Sopenharmony_ci * pte_free_tlb frees a pte table and clears the CRSTE for the 618c2ecf20Sopenharmony_ci * page table from the tlb. 628c2ecf20Sopenharmony_ci */ 638c2ecf20Sopenharmony_cistatic inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, 648c2ecf20Sopenharmony_ci unsigned long address) 658c2ecf20Sopenharmony_ci{ 668c2ecf20Sopenharmony_ci __tlb_adjust_range(tlb, address, PAGE_SIZE); 678c2ecf20Sopenharmony_ci tlb->mm->context.flush_mm = 1; 688c2ecf20Sopenharmony_ci tlb->freed_tables = 1; 698c2ecf20Sopenharmony_ci tlb->cleared_ptes = 1; 708c2ecf20Sopenharmony_ci /* 718c2ecf20Sopenharmony_ci * page_table_free_rcu takes care of the allocation bit masks 728c2ecf20Sopenharmony_ci * of the 2K table fragments in the 4K page table page, 738c2ecf20Sopenharmony_ci * then calls tlb_remove_table. 748c2ecf20Sopenharmony_ci */ 758c2ecf20Sopenharmony_ci page_table_free_rcu(tlb, (unsigned long *) pte, address); 768c2ecf20Sopenharmony_ci} 778c2ecf20Sopenharmony_ci 788c2ecf20Sopenharmony_ci/* 798c2ecf20Sopenharmony_ci * pmd_free_tlb frees a pmd table and clears the CRSTE for the 808c2ecf20Sopenharmony_ci * segment table entry from the tlb. 818c2ecf20Sopenharmony_ci * If the mm uses a two level page table the single pmd is freed 828c2ecf20Sopenharmony_ci * as the pgd. pmd_free_tlb checks the asce_limit against 2GB 838c2ecf20Sopenharmony_ci * to avoid the double free of the pmd in this case. 848c2ecf20Sopenharmony_ci */ 858c2ecf20Sopenharmony_cistatic inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd, 868c2ecf20Sopenharmony_ci unsigned long address) 878c2ecf20Sopenharmony_ci{ 888c2ecf20Sopenharmony_ci if (mm_pmd_folded(tlb->mm)) 898c2ecf20Sopenharmony_ci return; 908c2ecf20Sopenharmony_ci pgtable_pmd_page_dtor(virt_to_page(pmd)); 918c2ecf20Sopenharmony_ci __tlb_adjust_range(tlb, address, PAGE_SIZE); 928c2ecf20Sopenharmony_ci tlb->mm->context.flush_mm = 1; 938c2ecf20Sopenharmony_ci tlb->freed_tables = 1; 948c2ecf20Sopenharmony_ci tlb->cleared_puds = 1; 958c2ecf20Sopenharmony_ci tlb_remove_table(tlb, pmd); 968c2ecf20Sopenharmony_ci} 978c2ecf20Sopenharmony_ci 988c2ecf20Sopenharmony_ci/* 998c2ecf20Sopenharmony_ci * p4d_free_tlb frees a pud table and clears the CRSTE for the 1008c2ecf20Sopenharmony_ci * region second table entry from the tlb. 1018c2ecf20Sopenharmony_ci * If the mm uses a four level page table the single p4d is freed 1028c2ecf20Sopenharmony_ci * as the pgd. p4d_free_tlb checks the asce_limit against 8PB 1038c2ecf20Sopenharmony_ci * to avoid the double free of the p4d in this case. 1048c2ecf20Sopenharmony_ci */ 1058c2ecf20Sopenharmony_cistatic inline void p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d, 1068c2ecf20Sopenharmony_ci unsigned long address) 1078c2ecf20Sopenharmony_ci{ 1088c2ecf20Sopenharmony_ci if (mm_p4d_folded(tlb->mm)) 1098c2ecf20Sopenharmony_ci return; 1108c2ecf20Sopenharmony_ci __tlb_adjust_range(tlb, address, PAGE_SIZE); 1118c2ecf20Sopenharmony_ci tlb->mm->context.flush_mm = 1; 1128c2ecf20Sopenharmony_ci tlb->freed_tables = 1; 1138c2ecf20Sopenharmony_ci tlb->cleared_p4ds = 1; 1148c2ecf20Sopenharmony_ci tlb_remove_table(tlb, p4d); 1158c2ecf20Sopenharmony_ci} 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_ci/* 1188c2ecf20Sopenharmony_ci * pud_free_tlb frees a pud table and clears the CRSTE for the 1198c2ecf20Sopenharmony_ci * region third table entry from the tlb. 1208c2ecf20Sopenharmony_ci * If the mm uses a three level page table the single pud is freed 1218c2ecf20Sopenharmony_ci * as the pgd. pud_free_tlb checks the asce_limit against 4TB 1228c2ecf20Sopenharmony_ci * to avoid the double free of the pud in this case. 1238c2ecf20Sopenharmony_ci */ 1248c2ecf20Sopenharmony_cistatic inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud, 1258c2ecf20Sopenharmony_ci unsigned long address) 1268c2ecf20Sopenharmony_ci{ 1278c2ecf20Sopenharmony_ci if (mm_pud_folded(tlb->mm)) 1288c2ecf20Sopenharmony_ci return; 1298c2ecf20Sopenharmony_ci tlb->mm->context.flush_mm = 1; 1308c2ecf20Sopenharmony_ci tlb->freed_tables = 1; 1318c2ecf20Sopenharmony_ci tlb->cleared_puds = 1; 1328c2ecf20Sopenharmony_ci tlb_remove_table(tlb, pud); 1338c2ecf20Sopenharmony_ci} 1348c2ecf20Sopenharmony_ci 1358c2ecf20Sopenharmony_ci 1368c2ecf20Sopenharmony_ci#endif /* _S390_TLB_H */ 137