18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright (C) 2020 Google, Inc 48c2ecf20Sopenharmony_ci */ 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ci#ifndef _ASM_RISCV_CLINT_H 78c2ecf20Sopenharmony_ci#define _ASM_RISCV_CLINT_H 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci#include <linux/types.h> 108c2ecf20Sopenharmony_ci#include <asm/mmio.h> 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci#ifdef CONFIG_RISCV_M_MODE 138c2ecf20Sopenharmony_ci/* 148c2ecf20Sopenharmony_ci * This lives in the CLINT driver, but is accessed directly by timex.h to avoid 158c2ecf20Sopenharmony_ci * any overhead when accessing the MMIO timer. 168c2ecf20Sopenharmony_ci * 178c2ecf20Sopenharmony_ci * The ISA defines mtime as a 64-bit memory-mapped register that increments at 188c2ecf20Sopenharmony_ci * a constant frequency, but it doesn't define some other constraints we depend 198c2ecf20Sopenharmony_ci * on (most notably ordering constraints, but also some simpler stuff like the 208c2ecf20Sopenharmony_ci * memory layout). Thus, this is called "clint_time_val" instead of something 218c2ecf20Sopenharmony_ci * like "riscv_mtime", to signify that these non-ISA assumptions must hold. 228c2ecf20Sopenharmony_ci */ 238c2ecf20Sopenharmony_ciextern u64 __iomem *clint_time_val; 248c2ecf20Sopenharmony_ci#endif 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci#endif 27