1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * 64-bit pSeries and RS/6000 setup code. 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Adapted from 'alpha' version by Gary Thomas 7 * Modified by Cort Dougan (cort@cs.nmt.edu) 8 * Modified by PPC64 Team, IBM Corp 9 */ 10 11/* 12 * bootup setup stuff.. 13 */ 14 15#include <linux/cpu.h> 16#include <linux/errno.h> 17#include <linux/sched.h> 18#include <linux/kernel.h> 19#include <linux/mm.h> 20#include <linux/stddef.h> 21#include <linux/unistd.h> 22#include <linux/user.h> 23#include <linux/tty.h> 24#include <linux/major.h> 25#include <linux/interrupt.h> 26#include <linux/reboot.h> 27#include <linux/init.h> 28#include <linux/ioport.h> 29#include <linux/console.h> 30#include <linux/pci.h> 31#include <linux/utsname.h> 32#include <linux/adb.h> 33#include <linux/export.h> 34#include <linux/delay.h> 35#include <linux/irq.h> 36#include <linux/seq_file.h> 37#include <linux/root_dev.h> 38#include <linux/of.h> 39#include <linux/of_pci.h> 40#include <linux/memblock.h> 41#include <linux/swiotlb.h> 42 43#include <asm/mmu.h> 44#include <asm/processor.h> 45#include <asm/io.h> 46#include <asm/prom.h> 47#include <asm/rtas.h> 48#include <asm/pci-bridge.h> 49#include <asm/iommu.h> 50#include <asm/dma.h> 51#include <asm/machdep.h> 52#include <asm/irq.h> 53#include <asm/time.h> 54#include <asm/nvram.h> 55#include <asm/pmc.h> 56#include <asm/xics.h> 57#include <asm/xive.h> 58#include <asm/ppc-pci.h> 59#include <asm/i8259.h> 60#include <asm/udbg.h> 61#include <asm/smp.h> 62#include <asm/firmware.h> 63#include <asm/eeh.h> 64#include <asm/reg.h> 65#include <asm/plpar_wrappers.h> 66#include <asm/kexec.h> 67#include <asm/isa-bridge.h> 68#include <asm/security_features.h> 69#include <asm/asm-const.h> 70#include <asm/idle.h> 71#include <asm/swiotlb.h> 72#include <asm/svm.h> 73#include <asm/dtl.h> 74 75#include "pseries.h" 76#include "../../../../drivers/pci/pci.h" 77 78DEFINE_STATIC_KEY_FALSE(shared_processor); 79EXPORT_SYMBOL(shared_processor); 80 81int CMO_PrPSP = -1; 82int CMO_SecPSP = -1; 83unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K); 84EXPORT_SYMBOL(CMO_PageSize); 85 86int fwnmi_active; /* TRUE if an FWNMI handler is present */ 87int ibm_nmi_interlock_token; 88 89static void pSeries_show_cpuinfo(struct seq_file *m) 90{ 91 struct device_node *root; 92 const char *model = ""; 93 94 root = of_find_node_by_path("/"); 95 if (root) 96 model = of_get_property(root, "model", NULL); 97 seq_printf(m, "machine\t\t: CHRP %s\n", model); 98 of_node_put(root); 99 if (radix_enabled()) 100 seq_printf(m, "MMU\t\t: Radix\n"); 101 else 102 seq_printf(m, "MMU\t\t: Hash\n"); 103} 104 105/* Initialize firmware assisted non-maskable interrupts if 106 * the firmware supports this feature. 107 */ 108static void __init fwnmi_init(void) 109{ 110 unsigned long system_reset_addr, machine_check_addr; 111 u8 *mce_data_buf; 112 unsigned int i; 113 int nr_cpus = num_possible_cpus(); 114#ifdef CONFIG_PPC_BOOK3S_64 115 struct slb_entry *slb_ptr; 116 size_t size; 117#endif 118 int ibm_nmi_register_token; 119 120 ibm_nmi_register_token = rtas_token("ibm,nmi-register"); 121 if (ibm_nmi_register_token == RTAS_UNKNOWN_SERVICE) 122 return; 123 124 ibm_nmi_interlock_token = rtas_token("ibm,nmi-interlock"); 125 if (WARN_ON(ibm_nmi_interlock_token == RTAS_UNKNOWN_SERVICE)) 126 return; 127 128 /* If the kernel's not linked at zero we point the firmware at low 129 * addresses anyway, and use a trampoline to get to the real code. */ 130 system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START; 131 machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START; 132 133 if (0 == rtas_call(ibm_nmi_register_token, 2, 1, NULL, 134 system_reset_addr, machine_check_addr)) 135 fwnmi_active = 1; 136 137 /* 138 * Allocate a chunk for per cpu buffer to hold rtas errorlog. 139 * It will be used in real mode mce handler, hence it needs to be 140 * below RMA. 141 */ 142 mce_data_buf = memblock_alloc_try_nid_raw(RTAS_ERROR_LOG_MAX * nr_cpus, 143 RTAS_ERROR_LOG_MAX, MEMBLOCK_LOW_LIMIT, 144 ppc64_rma_size, NUMA_NO_NODE); 145 if (!mce_data_buf) 146 panic("Failed to allocate %d bytes below %pa for MCE buffer\n", 147 RTAS_ERROR_LOG_MAX * nr_cpus, &ppc64_rma_size); 148 149 for_each_possible_cpu(i) { 150 paca_ptrs[i]->mce_data_buf = mce_data_buf + 151 (RTAS_ERROR_LOG_MAX * i); 152 } 153 154#ifdef CONFIG_PPC_BOOK3S_64 155 if (!radix_enabled()) { 156 /* Allocate per cpu area to save old slb contents during MCE */ 157 size = sizeof(struct slb_entry) * mmu_slb_size * nr_cpus; 158 slb_ptr = memblock_alloc_try_nid_raw(size, 159 sizeof(struct slb_entry), MEMBLOCK_LOW_LIMIT, 160 ppc64_rma_size, NUMA_NO_NODE); 161 if (!slb_ptr) 162 panic("Failed to allocate %zu bytes below %pa for slb area\n", 163 size, &ppc64_rma_size); 164 165 for_each_possible_cpu(i) 166 paca_ptrs[i]->mce_faulty_slbs = slb_ptr + (mmu_slb_size * i); 167 } 168#endif 169} 170 171static void pseries_8259_cascade(struct irq_desc *desc) 172{ 173 struct irq_chip *chip = irq_desc_get_chip(desc); 174 unsigned int cascade_irq = i8259_irq(); 175 176 if (cascade_irq) 177 generic_handle_irq(cascade_irq); 178 179 chip->irq_eoi(&desc->irq_data); 180} 181 182static void __init pseries_setup_i8259_cascade(void) 183{ 184 struct device_node *np, *old, *found = NULL; 185 unsigned int cascade; 186 const u32 *addrp; 187 unsigned long intack = 0; 188 int naddr; 189 190 for_each_node_by_type(np, "interrupt-controller") { 191 if (of_device_is_compatible(np, "chrp,iic")) { 192 found = np; 193 break; 194 } 195 } 196 197 if (found == NULL) { 198 printk(KERN_DEBUG "pic: no ISA interrupt controller\n"); 199 return; 200 } 201 202 cascade = irq_of_parse_and_map(found, 0); 203 if (!cascade) { 204 printk(KERN_ERR "pic: failed to map cascade interrupt"); 205 return; 206 } 207 pr_debug("pic: cascade mapped to irq %d\n", cascade); 208 209 for (old = of_node_get(found); old != NULL ; old = np) { 210 np = of_get_parent(old); 211 of_node_put(old); 212 if (np == NULL) 213 break; 214 if (!of_node_name_eq(np, "pci")) 215 continue; 216 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL); 217 if (addrp == NULL) 218 continue; 219 naddr = of_n_addr_cells(np); 220 intack = addrp[naddr-1]; 221 if (naddr > 1) 222 intack |= ((unsigned long)addrp[naddr-2]) << 32; 223 } 224 if (intack) 225 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack); 226 i8259_init(found, intack); 227 of_node_put(found); 228 irq_set_chained_handler(cascade, pseries_8259_cascade); 229} 230 231static void __init pseries_init_irq(void) 232{ 233 /* Try using a XIVE if available, otherwise use a XICS */ 234 if (!xive_spapr_init()) { 235 xics_init(); 236 pseries_setup_i8259_cascade(); 237 } 238} 239 240static void pseries_lpar_enable_pmcs(void) 241{ 242 unsigned long set, reset; 243 244 set = 1UL << 63; 245 reset = 0; 246 plpar_hcall_norets(H_PERFMON, set, reset); 247} 248 249static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data) 250{ 251 struct of_reconfig_data *rd = data; 252 struct device_node *parent, *np = rd->dn; 253 struct pci_dn *pdn; 254 int err = NOTIFY_OK; 255 256 switch (action) { 257 case OF_RECONFIG_ATTACH_NODE: 258 parent = of_get_parent(np); 259 pdn = parent ? PCI_DN(parent) : NULL; 260 if (pdn) 261 pci_add_device_node_info(pdn->phb, np); 262 263 of_node_put(parent); 264 break; 265 case OF_RECONFIG_DETACH_NODE: 266 pdn = PCI_DN(np); 267 if (pdn) 268 list_del(&pdn->list); 269 break; 270 default: 271 err = NOTIFY_DONE; 272 break; 273 } 274 return err; 275} 276 277static struct notifier_block pci_dn_reconfig_nb = { 278 .notifier_call = pci_dn_reconfig_notifier, 279}; 280 281struct kmem_cache *dtl_cache; 282 283#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 284/* 285 * Allocate space for the dispatch trace log for all possible cpus 286 * and register the buffers with the hypervisor. This is used for 287 * computing time stolen by the hypervisor. 288 */ 289static int alloc_dispatch_logs(void) 290{ 291 if (!firmware_has_feature(FW_FEATURE_SPLPAR)) 292 return 0; 293 294 if (!dtl_cache) 295 return 0; 296 297 alloc_dtl_buffers(0); 298 299 /* Register the DTL for the current (boot) cpu */ 300 register_dtl_buffer(smp_processor_id()); 301 302 return 0; 303} 304#else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 305static inline int alloc_dispatch_logs(void) 306{ 307 return 0; 308} 309#endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 310 311static int alloc_dispatch_log_kmem_cache(void) 312{ 313 void (*ctor)(void *) = get_dtl_cache_ctor(); 314 315 dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES, 316 DISPATCH_LOG_BYTES, 0, ctor); 317 if (!dtl_cache) { 318 pr_warn("Failed to create dispatch trace log buffer cache\n"); 319 pr_warn("Stolen time statistics will be unreliable\n"); 320 return 0; 321 } 322 323 return alloc_dispatch_logs(); 324} 325machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache); 326 327DEFINE_PER_CPU(u64, idle_spurr_cycles); 328DEFINE_PER_CPU(u64, idle_entry_purr_snap); 329DEFINE_PER_CPU(u64, idle_entry_spurr_snap); 330static void pseries_lpar_idle(void) 331{ 332 /* 333 * Default handler to go into low thread priority and possibly 334 * low power mode by ceding processor to hypervisor 335 */ 336 337 if (!prep_irq_for_idle()) 338 return; 339 340 /* Indicate to hypervisor that we are idle. */ 341 pseries_idle_prolog(); 342 343 /* 344 * Yield the processor to the hypervisor. We return if 345 * an external interrupt occurs (which are driven prior 346 * to returning here) or if a prod occurs from another 347 * processor. When returning here, external interrupts 348 * are enabled. 349 */ 350 cede_processor(); 351 352 pseries_idle_epilog(); 353} 354 355/* 356 * Enable relocation on during exceptions. This has partition wide scope and 357 * may take a while to complete, if it takes longer than one second we will 358 * just give up rather than wasting any more time on this - if that turns out 359 * to ever be a problem in practice we can move this into a kernel thread to 360 * finish off the process later in boot. 361 */ 362bool pseries_enable_reloc_on_exc(void) 363{ 364 long rc; 365 unsigned int delay, total_delay = 0; 366 367 while (1) { 368 rc = enable_reloc_on_exceptions(); 369 if (!H_IS_LONG_BUSY(rc)) { 370 if (rc == H_P2) { 371 pr_info("Relocation on exceptions not" 372 " supported\n"); 373 return false; 374 } else if (rc != H_SUCCESS) { 375 pr_warn("Unable to enable relocation" 376 " on exceptions: %ld\n", rc); 377 return false; 378 } 379 return true; 380 } 381 382 delay = get_longbusy_msecs(rc); 383 total_delay += delay; 384 if (total_delay > 1000) { 385 pr_warn("Warning: Giving up waiting to enable " 386 "relocation on exceptions (%u msec)!\n", 387 total_delay); 388 return false; 389 } 390 391 mdelay(delay); 392 } 393} 394EXPORT_SYMBOL(pseries_enable_reloc_on_exc); 395 396void pseries_disable_reloc_on_exc(void) 397{ 398 long rc; 399 400 while (1) { 401 rc = disable_reloc_on_exceptions(); 402 if (!H_IS_LONG_BUSY(rc)) 403 break; 404 mdelay(get_longbusy_msecs(rc)); 405 } 406 if (rc != H_SUCCESS) 407 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n", 408 rc); 409} 410EXPORT_SYMBOL(pseries_disable_reloc_on_exc); 411 412#ifdef CONFIG_KEXEC_CORE 413static void pSeries_machine_kexec(struct kimage *image) 414{ 415 if (firmware_has_feature(FW_FEATURE_SET_MODE)) 416 pseries_disable_reloc_on_exc(); 417 418 default_machine_kexec(image); 419} 420#endif 421 422#ifdef __LITTLE_ENDIAN__ 423void pseries_big_endian_exceptions(void) 424{ 425 long rc; 426 427 while (1) { 428 rc = enable_big_endian_exceptions(); 429 if (!H_IS_LONG_BUSY(rc)) 430 break; 431 mdelay(get_longbusy_msecs(rc)); 432 } 433 434 /* 435 * At this point it is unlikely panic() will get anything 436 * out to the user, since this is called very late in kexec 437 * but at least this will stop us from continuing on further 438 * and creating an even more difficult to debug situation. 439 * 440 * There is a known problem when kdump'ing, if cpus are offline 441 * the above call will fail. Rather than panicking again, keep 442 * going and hope the kdump kernel is also little endian, which 443 * it usually is. 444 */ 445 if (rc && !kdump_in_progress()) 446 panic("Could not enable big endian exceptions"); 447} 448 449void pseries_little_endian_exceptions(void) 450{ 451 long rc; 452 453 while (1) { 454 rc = enable_little_endian_exceptions(); 455 if (!H_IS_LONG_BUSY(rc)) 456 break; 457 mdelay(get_longbusy_msecs(rc)); 458 } 459 if (rc) { 460 ppc_md.progress("H_SET_MODE LE exception fail", 0); 461 panic("Could not enable little endian exceptions"); 462 } 463} 464#endif 465 466static void __init find_and_init_phbs(void) 467{ 468 struct device_node *node; 469 struct pci_controller *phb; 470 struct device_node *root = of_find_node_by_path("/"); 471 472 for_each_child_of_node(root, node) { 473 if (!of_node_is_type(node, "pci") && 474 !of_node_is_type(node, "pciex")) 475 continue; 476 477 phb = pcibios_alloc_controller(node); 478 if (!phb) 479 continue; 480 rtas_setup_phb(phb); 481 pci_process_bridge_OF_ranges(phb, node, 0); 482 isa_bridge_find_early(phb); 483 phb->controller_ops = pseries_pci_controller_ops; 484 } 485 486 of_node_put(root); 487 488 /* 489 * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties 490 * in chosen. 491 */ 492 of_pci_check_probe_only(); 493} 494 495static void init_cpu_char_feature_flags(struct h_cpu_char_result *result) 496{ 497 /* 498 * The features below are disabled by default, so we instead look to see 499 * if firmware has *enabled* them, and set them if so. 500 */ 501 if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31) 502 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31); 503 504 if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED) 505 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED); 506 507 if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30) 508 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30); 509 510 if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2) 511 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2); 512 513 if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV) 514 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV); 515 516 if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED) 517 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED); 518 519 if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST) 520 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST); 521 522 if (result->character & H_CPU_CHAR_BCCTR_LINK_FLUSH_ASSIST) 523 security_ftr_set(SEC_FTR_BCCTR_LINK_FLUSH_ASSIST); 524 525 if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE) 526 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE); 527 528 if (result->behaviour & H_CPU_BEHAV_FLUSH_LINK_STACK) 529 security_ftr_set(SEC_FTR_FLUSH_LINK_STACK); 530 531 /* 532 * The features below are enabled by default, so we instead look to see 533 * if firmware has *disabled* them, and clear them if so. 534 */ 535 if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY)) 536 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY); 537 538 if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR)) 539 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR); 540 541 if (result->behaviour & H_CPU_BEHAV_NO_L1D_FLUSH_ENTRY) 542 security_ftr_clear(SEC_FTR_L1D_FLUSH_ENTRY); 543 544 if (result->behaviour & H_CPU_BEHAV_NO_L1D_FLUSH_UACCESS) 545 security_ftr_clear(SEC_FTR_L1D_FLUSH_UACCESS); 546 547 if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR)) 548 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR); 549} 550 551void pseries_setup_security_mitigations(void) 552{ 553 struct h_cpu_char_result result; 554 enum l1d_flush_type types; 555 bool enable; 556 long rc; 557 558 /* 559 * Set features to the defaults assumed by init_cpu_char_feature_flags() 560 * so it can set/clear again any features that might have changed after 561 * migration, and in case the hypercall fails and it is not even called. 562 */ 563 powerpc_security_features = SEC_FTR_DEFAULT; 564 565 rc = plpar_get_cpu_characteristics(&result); 566 if (rc == H_SUCCESS) 567 init_cpu_char_feature_flags(&result); 568 569 /* 570 * We're the guest so this doesn't apply to us, clear it to simplify 571 * handling of it elsewhere. 572 */ 573 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV); 574 575 types = L1D_FLUSH_FALLBACK; 576 577 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2)) 578 types |= L1D_FLUSH_MTTRIG; 579 580 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30)) 581 types |= L1D_FLUSH_ORI; 582 583 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \ 584 security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR); 585 586 setup_rfi_flush(types, enable); 587 setup_count_cache_flush(); 588 589 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && 590 security_ftr_enabled(SEC_FTR_L1D_FLUSH_ENTRY); 591 setup_entry_flush(enable); 592 593 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && 594 security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS); 595 setup_uaccess_flush(enable); 596 597 setup_stf_barrier(); 598} 599 600#ifdef CONFIG_PCI_IOV 601enum rtas_iov_fw_value_map { 602 NUM_RES_PROPERTY = 0, /* Number of Resources */ 603 LOW_INT = 1, /* Lowest 32 bits of Address */ 604 START_OF_ENTRIES = 2, /* Always start of entry */ 605 APERTURE_PROPERTY = 2, /* Start of entry+ to Aperture Size */ 606 WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */ 607 NEXT_ENTRY = 7 /* Go to next entry on array */ 608}; 609 610enum get_iov_fw_value_index { 611 BAR_ADDRS = 1, /* Get Bar Address */ 612 APERTURE_SIZE = 2, /* Get Aperture Size */ 613 WDW_SIZE = 3 /* Get Window Size */ 614}; 615 616resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno, 617 enum get_iov_fw_value_index value) 618{ 619 const int *indexes; 620 struct device_node *dn = pci_device_to_OF_node(dev); 621 int i, num_res, ret = 0; 622 623 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 624 if (!indexes) 625 return 0; 626 627 /* 628 * First element in the array is the number of Bars 629 * returned. Search through the list to find the matching 630 * bar 631 */ 632 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 633 if (resno >= num_res) 634 return 0; /* or an errror */ 635 636 i = START_OF_ENTRIES + NEXT_ENTRY * resno; 637 switch (value) { 638 case BAR_ADDRS: 639 ret = of_read_number(&indexes[i], 2); 640 break; 641 case APERTURE_SIZE: 642 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); 643 break; 644 case WDW_SIZE: 645 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); 646 break; 647 } 648 649 return ret; 650} 651 652void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes) 653{ 654 struct resource *res; 655 resource_size_t base, size; 656 int i, r, num_res; 657 658 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 659 num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS); 660 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; 661 i += NEXT_ENTRY, r++) { 662 res = &dev->resource[r + PCI_IOV_RESOURCES]; 663 base = of_read_number(&indexes[i], 2); 664 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); 665 res->flags = pci_parse_of_flags(of_read_number 666 (&indexes[i + LOW_INT], 1), 0); 667 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED); 668 res->name = pci_name(dev); 669 res->start = base; 670 res->end = base + size - 1; 671 } 672} 673 674void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes) 675{ 676 struct resource *res, *root, *conflict; 677 resource_size_t base, size; 678 int i, r, num_res; 679 680 /* 681 * First element in the array is the number of Bars 682 * returned. Search through the list to find the matching 683 * bars assign them from firmware into resources structure. 684 */ 685 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 686 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; 687 i += NEXT_ENTRY, r++) { 688 res = &dev->resource[r + PCI_IOV_RESOURCES]; 689 base = of_read_number(&indexes[i], 2); 690 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); 691 res->name = pci_name(dev); 692 res->start = base; 693 res->end = base + size - 1; 694 root = &iomem_resource; 695 dev_dbg(&dev->dev, 696 "pSeries IOV BAR %d: trying firmware assignment %pR\n", 697 r + PCI_IOV_RESOURCES, res); 698 conflict = request_resource_conflict(root, res); 699 if (conflict) { 700 dev_info(&dev->dev, 701 "BAR %d: %pR conflicts with %s %pR\n", 702 r + PCI_IOV_RESOURCES, res, 703 conflict->name, conflict); 704 res->flags |= IORESOURCE_UNSET; 705 } 706 } 707} 708 709static void pseries_disable_sriov_resources(struct pci_dev *pdev) 710{ 711 int i; 712 713 pci_warn(pdev, "No hypervisor support for SR-IOV on this device, IOV BARs disabled.\n"); 714 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) 715 pdev->resource[i + PCI_IOV_RESOURCES].flags = 0; 716} 717 718static void pseries_pci_fixup_resources(struct pci_dev *pdev) 719{ 720 const int *indexes; 721 struct device_node *dn = pci_device_to_OF_node(pdev); 722 723 /*Firmware must support open sriov otherwise dont configure*/ 724 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 725 if (indexes) 726 of_pci_set_vf_bar_size(pdev, indexes); 727 else 728 pseries_disable_sriov_resources(pdev); 729} 730 731static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev) 732{ 733 const int *indexes; 734 struct device_node *dn = pci_device_to_OF_node(pdev); 735 736 if (!pdev->is_physfn || pci_dev_is_added(pdev)) 737 return; 738 /*Firmware must support open sriov otherwise dont configure*/ 739 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 740 if (indexes) 741 of_pci_parse_iov_addrs(pdev, indexes); 742 else 743 pseries_disable_sriov_resources(pdev); 744} 745 746static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev, 747 int resno) 748{ 749 const __be32 *reg; 750 struct device_node *dn = pci_device_to_OF_node(pdev); 751 752 /*Firmware must support open sriov otherwise report regular alignment*/ 753 reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL); 754 if (!reg) 755 return pci_iov_resource_size(pdev, resno); 756 757 if (!pdev->is_physfn) 758 return 0; 759 return pseries_get_iov_fw_value(pdev, 760 resno - PCI_IOV_RESOURCES, 761 APERTURE_SIZE); 762} 763#endif 764 765static void __init pSeries_setup_arch(void) 766{ 767 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); 768 769 /* Discover PIC type and setup ppc_md accordingly */ 770 smp_init_pseries(); 771 772 773 if (radix_enabled() && !mmu_has_feature(MMU_FTR_GTSE)) 774 if (!firmware_has_feature(FW_FEATURE_RPT_INVALIDATE)) 775 panic("BUG: Radix support requires either GTSE or RPT_INVALIDATE\n"); 776 777 778 /* openpic global configuration register (64-bit format). */ 779 /* openpic Interrupt Source Unit pointer (64-bit format). */ 780 /* python0 facility area (mmio) (64-bit format) REAL address. */ 781 782 /* init to some ~sane value until calibrate_delay() runs */ 783 loops_per_jiffy = 50000000; 784 785 fwnmi_init(); 786 787 pseries_setup_security_mitigations(); 788 pseries_lpar_read_hblkrm_characteristics(); 789 790 /* By default, only probe PCI (can be overridden by rtas_pci) */ 791 pci_add_flags(PCI_PROBE_ONLY); 792 793 /* Find and initialize PCI host bridges */ 794 init_pci_config_tokens(); 795 find_and_init_phbs(); 796 of_reconfig_notifier_register(&pci_dn_reconfig_nb); 797 798 pSeries_nvram_init(); 799 800 if (firmware_has_feature(FW_FEATURE_LPAR)) { 801 vpa_init(boot_cpuid); 802 803 if (lppaca_shared_proc()) { 804 static_branch_enable(&shared_processor); 805 pv_spinlocks_init(); 806 } 807 808 ppc_md.power_save = pseries_lpar_idle; 809 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; 810#ifdef CONFIG_PCI_IOV 811 ppc_md.pcibios_fixup_resources = 812 pseries_pci_fixup_resources; 813 ppc_md.pcibios_fixup_sriov = 814 pseries_pci_fixup_iov_resources; 815 ppc_md.pcibios_iov_resource_alignment = 816 pseries_pci_iov_resource_alignment; 817#endif 818 } else { 819 /* No special idle routine */ 820 ppc_md.enable_pmcs = power4_enable_pmcs; 821 } 822 823 ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; 824 825 if (swiotlb_force == SWIOTLB_FORCE) 826 ppc_swiotlb_enable = 1; 827 828 pseries_rng_init(); 829} 830 831static void pseries_panic(char *str) 832{ 833 panic_flush_kmsg_end(); 834 rtas_os_term(str); 835} 836 837static int __init pSeries_init_panel(void) 838{ 839 /* Manually leave the kernel version on the panel. */ 840#ifdef __BIG_ENDIAN__ 841 ppc_md.progress("Linux ppc64\n", 0); 842#else 843 ppc_md.progress("Linux ppc64le\n", 0); 844#endif 845 ppc_md.progress(init_utsname()->version, 0); 846 847 return 0; 848} 849machine_arch_initcall(pseries, pSeries_init_panel); 850 851static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx) 852{ 853 return plpar_hcall_norets(H_SET_DABR, dabr); 854} 855 856static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx) 857{ 858 /* Have to set at least one bit in the DABRX according to PAPR */ 859 if (dabrx == 0 && dabr == 0) 860 dabrx = DABRX_USER; 861 /* PAPR says we can only set kernel and user bits */ 862 dabrx &= DABRX_KERNEL | DABRX_USER; 863 864 return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx); 865} 866 867static int pseries_set_dawr(int nr, unsigned long dawr, unsigned long dawrx) 868{ 869 /* PAPR says we can't set HYP */ 870 dawrx &= ~DAWRX_HYP; 871 872 if (nr == 0) 873 return plpar_set_watchpoint0(dawr, dawrx); 874 else 875 return plpar_set_watchpoint1(dawr, dawrx); 876} 877 878#define CMO_CHARACTERISTICS_TOKEN 44 879#define CMO_MAXLENGTH 1026 880 881void pSeries_coalesce_init(void) 882{ 883 struct hvcall_mpp_x_data mpp_x_data; 884 885 if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data)) 886 powerpc_firmware_features |= FW_FEATURE_XCMO; 887 else 888 powerpc_firmware_features &= ~FW_FEATURE_XCMO; 889} 890 891/** 892 * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions, 893 * handle that here. (Stolen from parse_system_parameter_string) 894 */ 895static void pSeries_cmo_feature_init(void) 896{ 897 char *ptr, *key, *value, *end; 898 int call_status; 899 int page_order = IOMMU_PAGE_SHIFT_4K; 900 901 pr_debug(" -> fw_cmo_feature_init()\n"); 902 spin_lock(&rtas_data_buf_lock); 903 memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE); 904 call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, 905 NULL, 906 CMO_CHARACTERISTICS_TOKEN, 907 __pa(rtas_data_buf), 908 RTAS_DATA_BUF_SIZE); 909 910 if (call_status != 0) { 911 spin_unlock(&rtas_data_buf_lock); 912 pr_debug("CMO not available\n"); 913 pr_debug(" <- fw_cmo_feature_init()\n"); 914 return; 915 } 916 917 end = rtas_data_buf + CMO_MAXLENGTH - 2; 918 ptr = rtas_data_buf + 2; /* step over strlen value */ 919 key = value = ptr; 920 921 while (*ptr && (ptr <= end)) { 922 /* Separate the key and value by replacing '=' with '\0' and 923 * point the value at the string after the '=' 924 */ 925 if (ptr[0] == '=') { 926 ptr[0] = '\0'; 927 value = ptr + 1; 928 } else if (ptr[0] == '\0' || ptr[0] == ',') { 929 /* Terminate the string containing the key/value pair */ 930 ptr[0] = '\0'; 931 932 if (key == value) { 933 pr_debug("Malformed key/value pair\n"); 934 /* Never found a '=', end processing */ 935 break; 936 } 937 938 if (0 == strcmp(key, "CMOPageSize")) 939 page_order = simple_strtol(value, NULL, 10); 940 else if (0 == strcmp(key, "PrPSP")) 941 CMO_PrPSP = simple_strtol(value, NULL, 10); 942 else if (0 == strcmp(key, "SecPSP")) 943 CMO_SecPSP = simple_strtol(value, NULL, 10); 944 value = key = ptr + 1; 945 } 946 ptr++; 947 } 948 949 /* Page size is returned as the power of 2 of the page size, 950 * convert to the page size in bytes before returning 951 */ 952 CMO_PageSize = 1 << page_order; 953 pr_debug("CMO_PageSize = %lu\n", CMO_PageSize); 954 955 if (CMO_PrPSP != -1 || CMO_SecPSP != -1) { 956 pr_info("CMO enabled\n"); 957 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, 958 CMO_SecPSP); 959 powerpc_firmware_features |= FW_FEATURE_CMO; 960 pSeries_coalesce_init(); 961 } else 962 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, 963 CMO_SecPSP); 964 spin_unlock(&rtas_data_buf_lock); 965 pr_debug(" <- fw_cmo_feature_init()\n"); 966} 967 968/* 969 * Early initialization. Relocation is on but do not reference unbolted pages 970 */ 971static void __init pseries_init(void) 972{ 973 pr_debug(" -> pseries_init()\n"); 974 975#ifdef CONFIG_HVC_CONSOLE 976 if (firmware_has_feature(FW_FEATURE_LPAR)) 977 hvc_vio_init_early(); 978#endif 979 if (firmware_has_feature(FW_FEATURE_XDABR)) 980 ppc_md.set_dabr = pseries_set_xdabr; 981 else if (firmware_has_feature(FW_FEATURE_DABR)) 982 ppc_md.set_dabr = pseries_set_dabr; 983 984 if (firmware_has_feature(FW_FEATURE_SET_MODE)) 985 ppc_md.set_dawr = pseries_set_dawr; 986 987 pSeries_cmo_feature_init(); 988 iommu_init_early_pSeries(); 989 990 pr_debug(" <- pseries_init()\n"); 991} 992 993/** 994 * pseries_power_off - tell firmware about how to power off the system. 995 * 996 * This function calls either the power-off rtas token in normal cases 997 * or the ibm,power-off-ups token (if present & requested) in case of 998 * a power failure. If power-off token is used, power on will only be 999 * possible with power button press. If ibm,power-off-ups token is used 1000 * it will allow auto poweron after power is restored. 1001 */ 1002static void pseries_power_off(void) 1003{ 1004 int rc; 1005 int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); 1006 1007 if (rtas_flash_term_hook) 1008 rtas_flash_term_hook(SYS_POWER_OFF); 1009 1010 if (rtas_poweron_auto == 0 || 1011 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) { 1012 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1); 1013 printk(KERN_INFO "RTAS power-off returned %d\n", rc); 1014 } else { 1015 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL); 1016 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc); 1017 } 1018 for (;;); 1019} 1020 1021static int __init pSeries_probe(void) 1022{ 1023 if (!of_node_is_type(of_root, "chrp")) 1024 return 0; 1025 1026 /* Cell blades firmware claims to be chrp while it's not. Until this 1027 * is fixed, we need to avoid those here. 1028 */ 1029 if (of_machine_is_compatible("IBM,CPBW-1.0") || 1030 of_machine_is_compatible("IBM,CBEA")) 1031 return 0; 1032 1033 pm_power_off = pseries_power_off; 1034 1035 pr_debug("Machine is%s LPAR !\n", 1036 (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); 1037 1038 pseries_init(); 1039 1040 return 1; 1041} 1042 1043static int pSeries_pci_probe_mode(struct pci_bus *bus) 1044{ 1045 if (firmware_has_feature(FW_FEATURE_LPAR)) 1046 return PCI_PROBE_DEVTREE; 1047 return PCI_PROBE_NORMAL; 1048} 1049 1050struct pci_controller_ops pseries_pci_controller_ops = { 1051 .probe_mode = pSeries_pci_probe_mode, 1052}; 1053 1054define_machine(pseries) { 1055 .name = "pSeries", 1056 .probe = pSeries_probe, 1057 .setup_arch = pSeries_setup_arch, 1058 .init_IRQ = pseries_init_irq, 1059 .show_cpuinfo = pSeries_show_cpuinfo, 1060 .log_error = pSeries_log_error, 1061 .pcibios_fixup = pSeries_final_fixup, 1062 .restart = rtas_restart, 1063 .halt = rtas_halt, 1064 .panic = pseries_panic, 1065 .get_boot_time = rtas_get_boot_time, 1066 .get_rtc_time = rtas_get_rtc_time, 1067 .set_rtc_time = rtas_set_rtc_time, 1068 .calibrate_decr = generic_calibrate_decr, 1069 .progress = rtas_progress, 1070 .system_reset_exception = pSeries_system_reset_exception, 1071 .machine_check_early = pseries_machine_check_realmode, 1072 .machine_check_exception = pSeries_machine_check_exception, 1073#ifdef CONFIG_KEXEC_CORE 1074 .machine_kexec = pSeries_machine_kexec, 1075 .kexec_cpu_down = pseries_kexec_cpu_down, 1076#endif 1077#ifdef CONFIG_MEMORY_HOTPLUG_SPARSE 1078 .memory_block_size = pseries_memory_block_size, 1079#endif 1080}; 1081